公开(公告)号：US20120037906A1

公开(公告)日：2012-02-16

申请号：US13115088

申请日：2011-05-24

申请人： Hye-Young RYU ,  Woo-Geun LEE ,  Young-Joo CHOI ,  Kyoung-Jae CHUNG ,  Jin-Won LEE ,  Seung-Ha CHOI ,  Hee-Jun BYEON ,  Pil-Sang YUN

发明人： Hye-Young RYU ,  Woo-Geun LEE ,  Young-Joo CHOI ,  Kyoung-Jae CHUNG ,  Jin-Won LEE ,  Seung-Ha CHOI ,  Hee-Jun BYEON ,  Pil-Sang YUN

IPC分类号： H01L29/786 ,  H01L21/44

CPC分类号： H01L27/1214 ,  H01L27/1225 ,  H01L27/1255

摘要： A thin film transistor array substrate capable of reducing degradation of a device due to degradation of an oxide semiconductor pattern and a method of fabricating the same are provided. The thin film transistor array substrate may include an insulating substrate on which a gate electrode is formed, a gate insulating film formed on the insulating substrate, an oxide semiconductor pattern disposed on the gate insulating film, an anti-etching pattern formed on the oxide semiconductor pattern, and a source electrode and a drain electrode formed on the anti-etching pattern. The oxide semiconductor pattern may include an edge portion positioned between the source electrode and the drain electrode, and the edge portion may include at least one conductive region and at least one non-conductive region.

摘要翻译： 提供了能够降低由于氧化物半导体图案的劣化引起的器件劣化的薄膜晶体管阵列基板及其制造方法。 薄膜晶体管阵列基板可以包括其上形成有栅极的绝缘基板，形成在绝缘基板上的栅极绝缘膜，设置在栅极绝缘膜上的氧化物半导体图案，形成在氧化物半导体上的抗蚀刻图案 图案，以及形成在防蚀刻图案上的源电极和漏电极。 氧化物半导体图案可以包括位于源电极和漏电极之间的边缘部分，并且边缘部分可以包括至少一个导电区域和至少一个非导电区域。

公开(公告)号：US20110193076A1

公开(公告)日：2011-08-11

申请号：US12957743

申请日：2010-12-01

申请人： Pil-Sang YUN ,  Ki-Won KIM ,  Hye-Young RYU ,  Woo-Geun LEE ,  Seung-Ha CHOI ,  Jae-Hyoung YOUN ,  Kyoung-Jae CHUNG ,  Young-Wook LEE ,  Je-Hun LEE ,  Kap-Soo YOON ,  Do-Hyun KIM ,  Dong-Ju YANG ,  Young-Joo CHOI

发明人： Pil-Sang YUN ,  Ki-Won KIM ,  Hye-Young RYU ,  Woo-Geun LEE ,  Seung-Ha CHOI ,  Jae-Hyoung YOUN ,  Kyoung-Jae CHUNG ,  Young-Wook LEE ,  Je-Hun LEE ,  Kap-Soo YOON ,  Do-Hyun KIM ,  Dong-Ju YANG ,  Young-Joo CHOI

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/41733 ,  H01L21/44 ,  H01L21/441 ,  H01L21/465 ,  H01L21/475 ,  H01L21/47573 ,  H01L21/47635 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

摘要： A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.

摘要翻译： 薄膜晶体管面板包括绝缘基板，设置在绝缘基板上的栅极绝缘层，设置在栅极绝缘层上的氧化物半导体层，设置在氧化物半导体层上的蚀刻停止器，以及设置在源极电极和漏极上的 在蚀刻停止器上。

公开(公告)号：US20110272696A1

公开(公告)日：2011-11-10

申请号：US13092882

申请日：2011-04-22

申请人： Hye-Young RYU ,  Jin-Won LEE ,  Woo-Geun LEE ,  Hee-Jun BYEON ,  Xun ZHU

发明人： Hye-Young RYU ,  Jin-Won LEE ,  Woo-Geun LEE ,  Hee-Jun BYEON ,  Xun ZHU

IPC分类号： H01L29/786 ,  H01L33/08 ,  H01L21/44

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/3272 ,  H01L51/5253 ,  H01L2227/323

摘要： A thin film transistor panel includes a substrate, a light blocking layer on the substrate, a first protective film on the light blocking layer, a first electrode and a second electrode on the first protective film, an oxide semiconductor layer on a portion of the first protective film exposed between the first electrode and the second electrode, an insulating layer, a third electrode overlapping with the oxide semiconductor layer and on the insulating layer, and a fourth electrode on the insulating layer. The light blocking layer includes first sidewalls, and the first protective film includes second sidewalls. The first and the second sidewalls are disposed along substantially the same line.

摘要翻译： 薄膜晶体管面板包括基板，基板上的阻光层，遮光层上的第一保护膜，第一保护膜上的第一电极和第二电极，第一保护膜的一部分上的氧化物半导体层 在第一电极和第二电极之间暴露的保护膜，绝缘层，与氧化物半导体层重叠的绝缘层和绝缘层上的第四电极。 遮光层包括第一侧壁，并且第一保护膜包括第二侧壁。 第一和第二侧壁沿着基本相同的线设置。

公开(公告)号：US20120018720A1

公开(公告)日：2012-01-26

申请号：US13177783

申请日：2011-07-07

申请人： Jae-Woo PARK ,  Dong-Hoon LEE ,  Sung-Haeng CHO ,  Woo-Geun LEE ,  Hye-Young RYU ,  Young-Joo CHOI

发明人： Jae-Woo PARK ,  Dong-Hoon LEE ,  Sung-Haeng CHO ,  Woo-Geun LEE ,  Hye-Young RYU ,  Young-Joo CHOI

IPC分类号： H01L29/786 ,  H01L21/44

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/458

摘要： A display substrate includes a gate line extending in a first direction on a base substrate, a data line on the base substrate and extending in a second direction crossing the first direction, a gate insulating layer on the gate line, a thin-film transistor and a pixel electrode. The thin-film transistor includes a gate electrode electrically connected the gate line, an oxide semiconductor pattern, and source and drain electrodes on the oxide semiconductor pattern and spaced apart from each other. The oxide semiconductor pattern includes a first semiconductor pattern including indium oxide and a second semiconductor pattern including indium-free oxide. The pixel electrode is electrically connected the drain electrode.

摘要翻译： 显示基板包括在基底基板上沿第一方向延伸的栅极线，在基底基板上的数据线，并且沿与第一方向交叉的第二方向延伸，栅极线上的栅极绝缘层，薄膜晶体管和 像素电极。 薄膜晶体管包括栅电极，电极连接栅极线，氧化物半导体图案以及氧化物半导体图案上的源电极和漏电极并彼此间隔开。 氧化物半导体图案包括包括氧化铟的第一半导体图案和包含无铟氧化物的第二半导体图案。 像素电极与漏电极电连接。

公开(公告)号：US20130099240A1

公开(公告)日：2013-04-25

申请号：US13650528

申请日：2012-10-12

申请人： Hyun-Jung LEE ,  Sung-Haeng CHO ,  Woo-Geun LEE ,  Jang-Hoon HA ,  Hee-Jun BYEON ,  Ji-Yun HONG ,  Ji-Soo OH

发明人： Hyun-Jung LEE ,  Sung-Haeng CHO ,  Woo-Geun LEE ,  Jang-Hoon HA ,  Hee-Jun BYEON ,  Ji-Yun HONG ,  Ji-Soo OH

IPC分类号： H01L29/786 ,  H01L21/34

CPC分类号： H01L29/78693 ,  H01L27/1225 ,  H01L29/41733 ,  H01L29/78606 ,  H01L29/7869

摘要： A Thin Film Transistor (TFT) includes a substrate, a semiconductor layer disposed on the substrate a first source electrode and a first drain electrode spaced apart from each other on the semiconductor layer, a channel area disposed in the semiconductor layer between the first source electrode and the first drain electrode, an etching prevention layer disposed on the channel area, the first source electrode, and the first drain electrode and a second source electrode in contact with the first source electrode, and a second drain electrode in contact with the first drain electrode.

公开(公告)号：US20110227063A1

公开(公告)日：2011-09-22

申请号：US13046130

申请日：2011-03-11

申请人： Pil-Sang YUN ,  Young-Wook LEE ,  Woo-Geun LEE

发明人： Pil-Sang YUN ,  Young-Wook LEE ,  Woo-Geun LEE

IPC分类号： H01L29/786 ,  H01L33/00

CPC分类号： H01L21/467 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/7869

摘要： Provided is an oxide thin-film transistor (TFT) substrate that may enhance the display quality of a display device and a method of fabricating the same via a simple process. The oxide TFT substrate includes: a substrate, a gate line, a data line, an oxide TFT, and a pixel electrode. An oxide layer of the oxide TFT includes a first region that has semiconductor characteristics and a channel, and a second region that is conductive and surrounds the first region. A portion of the first region is electrically connected to the pixel electrode, and the second region is electrically connected to the data line.

摘要翻译： 提供了可以通过简单的处理来提高显示装置的显示质量的氧化物薄膜晶体管（TFT）基板及其制造方法。 氧化物TFT基板包括：基板，栅极线，数据线，氧化物TFT和像素电极。 氧化物TFT的氧化物层包括具有半导体特性的第一区域和沟道，以及导电并围绕第一区域的第二区域。 第一区域的一部分电连接到像素电极，并且第二区域电连接到数据线。

公开(公告)号：US20080299712A1

公开(公告)日：2008-12-04

申请号：US12192531

申请日：2008-08-15

申请人： Woo-Geun LEE ,  Hye-Young RYU ,  Sang-Gab KIM ,  Jang-Soo KIM

发明人： Woo-Geun LEE ,  Hye-Young RYU ,  Sang-Gab KIM ,  Jang-Soo KIM

IPC分类号： H01L21/336

CPC分类号： H01L27/1288 ,  H01L21/32134 ,  H01L21/76838 ,  H01L27/1214 ,  H01L29/66765

摘要： A method of manufacturing a thin film transistor array panel includes forming a gate line including a gate electrode, forming a gate insulating layer on the gate line, forming a semiconductor stripe on the gate insulating layer; forming ohmic contacts on the semiconductor stripe, forming a data line including a source electrode and a drain electrode on the ohmic contacts, depositing a passivation layer on the data line and the drain electrode, and forming a pixel electrode connected to the drain electrode. The formation of the data line and the drain electrode, the ohmic contacts, and the semiconductor stripe includes depositing an intrinsic silicon layer, an extrinsic silicon layer, and a conductor layer on the gate insulating layer, forming a photoresist including a second portion corresponding to a channel area between the source electrode and the drain electrode, and a first portion corresponding to a wire area on the data line and the drain electrode, wherein the first portion is thicker than the second portion, etching the conductor layer corresponding to a remaining area except for the wire and the channel area using the photoresist as an etch mask, removing the second portion to expose the conductor layer on the channel areas, etching the intrinsic silicon layer and the extrinsic silicon layer on the remaining area, etching the conductor layer and the extrinsic silicon layer on the channel areas, and removing the first portion.

摘要翻译： 制造薄膜晶体管阵列面板的方法包括：形成包括栅电极的栅极线，在栅极线上形成栅绝缘层，在栅绝缘层上形成半导体条; 在半导体条上形成欧姆接触，在欧姆接触上形成包括源电极和漏电极的数据线，在数据线和漏电极上沉积钝化层，并形成连接到漏电极的像素电极。 数据线和漏电极，欧姆接触和半导体条纹的形成包括在栅绝缘层上沉积本征硅层，非本征硅层和导体层，形成光致抗蚀剂，其包括对应于 源极电极和漏极电极之间的沟道区域，以及对应于数据线和漏极电极的导线区域的第一部分，其中第一部分比第二部分厚，蚀刻对应于剩余区域的导体层 除了使用光致抗蚀剂作为蚀刻掩模的导线和沟道区域之外，去除第二部分以暴露沟道区域上的导体层，蚀刻剩余区域上的本征硅层和非本征硅层，蚀刻导体层和 在通道区域上的非本征硅层，以及去除第一部分。

公开(公告)号：US20070187741A1

公开(公告)日：2007-08-16

申请号：US11690702

申请日：2007-03-23

申请人： Woo-Geun LEE ,  Hye-Young RYU

发明人： Woo-Geun LEE ,  Hye-Young RYU

IPC分类号： H01L29/94

CPC分类号： G02F1/1368 ,  H01L27/1255

摘要： In a thin film transistor substrate, a method of manufacturing the same, and a display apparatus having the same, a thin film transistor, a gate member, and a storage member are formed on an insulating substrate. The gate member has a gate line and a gate electrode electrically connected to the gate line, and the storage member has a storage line, a first storage electrode, and a second storage electrode. A data member is formed on an active layer. The data member includes a data line crossing the gate line, a third storage electrode overlapped with the first storage electrode and a fourth storage electrode overlapped with the second storage electrode. Thus, a capacitance variation of a storage capacitor may be prevented, thereby improving display quality of a display apparatus.

摘要翻译： 在绝缘基板上形成薄膜晶体管基板及其制造方法及具有该薄膜晶体管基板的显示装置，薄膜​​晶体管，栅极部件和存储部件。 栅极部件具有与栅极线电连接的栅极线和栅电极，并且存储部件具有存储线，第一存储电极和第二存储电极。 在有源层上形成数据元件。 数据构件包括与栅极线交叉的数据线，与第一存储电极重叠的第三存储电极和与第二存储电极重叠的第四存储电极。 因此，可以防止存储电容器的电容变化，从而提高显示装置的显示质量。

公开(公告)号：US20120211753A1

公开(公告)日：2012-08-23

申请号：US13328658

申请日：2011-12-16

申请人： Ki-Won KIM ,  Je-Hun LEE ,  Sung-Haeng CHO ,  Woo-Geun LEE ,  Kap-Soo YOON ,  Do-Hyun KIM ,  Seung-Ha CHOI

发明人： Ki-Won KIM ,  Je-Hun LEE ,  Sung-Haeng CHO ,  Woo-Geun LEE ,  Kap-Soo YOON ,  Do-Hyun KIM ,  Seung-Ha CHOI

IPC分类号： H01L29/786 ,  H01L21/336 ,  H01L33/00

CPC分类号： H01L27/1225 ,  H01L27/1288

摘要： In a display substrate and a method of manufacturing the display substrate, the display substrate includes a data line, a channel pattern, an insulating pattern and a pixel electrode. The data line extends in a direction on a base substrate. The channel pattern is disposed in a separate region between an input electrode connected to the data line and an output electrode spaced apart from the input electrode. The channel pattern makes contact with the input electrode and the output electrode on the input and output electrodes. The insulating pattern is spaced apart from the channel pattern on the base substrate and includes a contact hole exposing the output electrode. The pixel electrode is formed on the insulating pattern to make contact with the output electrode through the contact hole. Thus, a damage of the oxide semiconductor layer may be minimized and a manufacturing process may be simplified.

摘要翻译： 在显示基板和显示基板的制造方法中，显示基板包括数据线，通道图案，绝缘图案和像素电极。 数据线沿着基底基板上的方向延伸。 通道图案设置在与数据线连接的输入电极和与输入电极间隔开的输出电极之间的分离区域中。 通道图案与输入电极和输出电极上的输出电极接触。 绝缘图案与基底基板上的沟道图案间隔开，并且包括暴露输出电极的接触孔。 像素电极形成在绝缘图案上，以通过接触孔与输出电极接触。 因此，可以使氧化物半导体层的损伤最小化，并且可以简化制造工艺。

公开(公告)号：US20120104384A1

公开(公告)日：2012-05-03

申请号：US13193459

申请日：2011-07-28

申请人： Young-Joo CHOI ,  Jae-Won SONG ,  Xun ZHU ,  Sang-Wan JIN ,  Woo-Geun LEE

发明人： Young-Joo CHOI ,  Jae-Won SONG ,  Xun ZHU ,  Sang-Wan JIN ,  Woo-Geun LEE

IPC分类号： H01L29/786 ,  H01L21/44

CPC分类号： H01L27/1225 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

摘要： A thin-film transistor (TFT) includes a gate electrode, an oxide semiconductor pattern, a source electrode, a drain electrode and an etch stopper. The gate electrode is formed on a substrate. The oxide semiconductor pattern is disposed in an area overlapping with the gate electrode. The source electrode is partially disposed on the oxide semiconductor pattern. The drain electrode is spaced apart from the source electrode, faces the source electrode, and is partially disposed on the oxide semiconductor pattern. The etch stopper has first and second end portions. The first end portion is disposed between the oxide semiconductor pattern and the source electrode, and the second end portion is disposed between the oxide semiconductor pattern and the drain electrode. A sum of first and second overlapping length is between about 30% and about 99% of a total length of the etch stopper.

摘要翻译： 薄膜晶体管（TFT）包括栅电极，氧化物半导体图案，源电极，漏电极和蚀刻停止器。 栅电极形成在基板上。 氧化物半导体图案设置在与栅电极重叠的区域中。 源电极部分地设置在氧化物半导体图案上。 漏电极与源极间隔开，面对源电极，部分地设置在氧化物半导体图案上。 蚀刻停止器具有第一和第二端部。 第一端部设置在氧化物半导体图案和源电极之间，第二端部设置在氧化物半导体图案和漏电极之间。 第一和第二重叠长度之和在蚀刻停止器的总长度的约30％至约99％之间。