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    Method of forming a SOI transistor having a self-aligned body contact
    2.
    发明授权
    Method of forming a SOI transistor having a self-aligned body contact 失效
    形成具有自对准体接触的SOI晶体管的方法

    公开(公告)号：US5405795A

    公开(公告)日：1995-04-11

    申请号：US268380

    申请日：1994-06-29

    申请人： Klaus D. Beyer ,  Taqi N. Buti ,  Chang-Ming Hsieh ,  Louis L. Hsu

    发明人： Klaus D. Beyer ,  Taqi N. Buti ,  Chang-Ming Hsieh ,  Louis L. Hsu

    IPC分类号： H01L21/336 ,  H01L29/786 ,  H01L21/265

    CPC分类号： H01L29/66772 ,  H01L29/41783 ,  H01L29/78612 ,  Y10S148/15

    摘要： An SOI transistor has a self-aligned body contact formed through an extension to the gate, thereby forming the body contact with minimal increase in area and also avoiding the need to tie the source to the body, as in prior art schemes that passed the body contact through the source. The body contact aperture is formed by raising the source and drain to define an initial aperture, depositing a conformal layer that is etched to create aperture-defining sidewalls and etching the contact aperture using these sidewalls to define sidewall support members that support insulating sidewalls to isolate the collection electrode from both the gate and from the source and drain.

    摘要翻译： SOI晶体管具有通过对门的延伸形成的自对准体接触，从而以最小的面积增加形成身体接触，并且还避免了将源连接到身体的需要，如通过身体的现有技术方案 通过来源联系。 身体接触孔通过提高源极和漏极以形成初始孔径而形成，沉积被蚀刻以形成孔限定侧壁的共形层并且使用这些侧壁蚀刻接触孔以限定支撑绝缘侧壁以隔离的侧壁支撑构件 收集电极来自闸门和源极和漏极。

    Air-filled isolation trench with chemically vapor deposited silicon dioxide cap
    4.
    发明授权
    Air-filled isolation trench with chemically vapor deposited silicon dioxide cap 失效
    充气隔离沟槽，化学气相沉积二氧化硅盖

    公开(公告)号：US5098856A

    公开(公告)日：1992-03-24

    申请号：US717267

    申请日：1991-06-18

    申请人： Klaus D. Beyer ,  Louis L. Hsu ,  Subodh K. Kulkarni

    发明人： Klaus D. Beyer ,  Louis L. Hsu ,  Subodh K. Kulkarni

    IPC分类号： H01L21/76 ,  H01L21/764

    CPC分类号： H01L21/764

    摘要： A process for forming air-filled isolation trenches in a semiconductor substrate by a conformal chemical vapor deposition (CVD) of a silicon dioxide layer over the passivated surface of the semiconductor substrate in which intersecting trenches have been formed and partially filled with a material that can subsequentially be removed from under the CVD silicon dioxide layer, such materials include water soluble glasses and polymeric materials, such as a polyimide. The CVD silicon dioxide is etched back to the passivated surface of the semiconductor substrate, forming openings in the layer at the trench intersections that extend to the trench fill material. The fill material is removed through these openings. A CVD silicon dioxide layer is deposited to fill the openings, leaving a silicon dioxide cap bridging the air-filled trench. Water soluble glasses that may be used to fill the trench include BSG glass (B.sub.2 O.sub.3 content greater than 55%) and germanosilicate glass (GeO.sub.2 content greater than 50%). A polymer fill, such as a polyimide, if used, may be removed by plasma etching in O.sub.2.

    Method of producing a thin silicon-on-insulator layer
    5.
    发明授权
    Method of producing a thin silicon-on-insulator layer 失效
    制造薄的绝缘体上硅层的方法

    公开(公告)号：US5234535A

    公开(公告)日：1993-08-10

    申请号：US988655

    申请日：1992-12-10

    申请人： Klaus D. Beyer ,  Louis L. Hsu ,  Victor J. Silvestri ,  Andrie S. Yapsir

    发明人： Klaus D. Beyer ,  Louis L. Hsu ,  Victor J. Silvestri ,  Andrie S. Yapsir

    IPC分类号： H01L21/02 ,  H01L21/20 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/762

    CPC分类号： H01L21/2007 ,  H01L21/76251 ,  Y10S148/012 ,  Y10S148/135 ,  Y10S438/981

    摘要： A method of forming a thin silicon SOI layer by wafer bonding, the thin silicon SOI layer being substantially free of defects upon which semiconductor structures can be subsequently formed, is disclosed. The method comprises the steps of:a) providing a first wafer comprising a silicon substrate of a first conductivity type, a diffusion layer of a second conductivity type formed thereon and having a first etch characteristic, a thin epitaxial layer of the second conductivity type formed upon the diffusion layer and having a second etch characteristic different from the first etch characteristic of the diffusion layer, and a thin oxide layer formed upon the thin epitaxial layer;b) providing a second wafer comprising a silicon substrate having a thin oxide layer formed on a surface thereof;c) wafer bonding said first wafer to said second wafer;d) removing the silicon substrate of said first wafer in a controlled mechanical manner; ande) removing the diffusion layer of said first wafer using a selective dry low energy plasma process to expose the underlying thin epitaxial layer, the selective dry low energy plasma process providing an etch ratio of the first etch characteristic to the second etch characteristic such that the diffusion layer is removed with minimal formation of any shallow plasma radiation damage to the exposed underlying thin epitaxial layer.

    Reach-through isolation silicon-on-insulator device
    7.
    发明授权
    Reach-through isolation silicon-on-insulator device 失效
    隔离绝缘体上的隔离器器件

    公开(公告)号：US5391911A

    公开(公告)日：1995-02-21

    申请号：US231100

    申请日：1994-04-22

    申请人： Klaus D. Beyer ,  Andrie S. Yapsir

    发明人： Klaus D. Beyer ,  Andrie S. Yapsir

    IPC分类号： H01L21/764 ,  H01L21/76 ,  H01L21/762 ,  H01L27/12 ,  H01L27/04

    CPC分类号： H01L21/76264 ,  H01L21/76289 ,  Y10S148/05 ,  Y10S148/164

    摘要： A method and the resulting product for isolating lightly doped silicon islands from each other and from a common substrate. The substrate is covered with a first heavily doped epi layer. The first layer is covered with a lightly doped second epi layer. A pair of spaced deep trenches are provided which extend from the top surface of the second layer, through the first layer and into the substrate. The interior walls of the trenches are lined with oxide. A pair of heavily doped reach-through diffusions extending from said top surface to the first layer is oriented perpendicularly to the deep trenches and fully extends between the trenches. The heavily doped reach-through diffusions and the contiguous first layer are removed by a single anisotropic etching step to yield silicon islands isolated by air except where the islands contact the oxide-lined deep trenches. The air isolation preferably is partially replaced with other dielectric material.

    摘要翻译： 一种方法和所得到的产品，用于将共同的衬底彼此分离轻掺杂的硅岛。 衬底被第一重掺杂外延层覆盖。 第一层被轻掺杂的第二外延层覆盖。 提供一对间隔的深沟槽，其从第二层的顶表面延伸穿过第一层并进入衬底。 沟槽的内壁衬有氧化物。 从所述顶表面延伸到第一层的一对重掺杂的贯穿扩散层垂直于深沟槽定向并在沟槽之间完全延伸。 通过单个各向异性蚀刻步骤去除重掺杂的通孔扩散和相邻的第一层，以产生除空气与氧化物衬里的深沟槽接触的空气，由空气隔离。 空气隔离优选地部分地被其它介电材料替代。

    Oxynitride shallow trench isolation and method of formation
    8.
    发明授权
    Oxynitride shallow trench isolation and method of formation 有权
    氮氧化物浅沟槽隔离和形成方法

    公开(公告)号：US06709951B2

    公开(公告)日：2004-03-23

    申请号：US10246252

    申请日：2002-09-18

    申请人： Klaus D. Beyer ,  Fen F. Jamin ,  Patrick R. Varekamp

    发明人： Klaus D. Beyer ,  Fen F. Jamin ,  Patrick R. Varekamp

    IPC分类号： H01L2176

    CPC分类号： H01L21/76224

    摘要： An oxynitride material is used to form shallow trench isolation regions in an integrated circuit structure. The oxynitride may be used for both the trench liner and trench fill material. The oxynitride liner is formed by nitriding an initially formed oxide trench liner. The oxynitride trench fill material is formed by directly depositing a high density plasma (HDP) oxide mixture of SiH4 and O2 and adding a controlled amount of NH3 to the plasma mixture. The resultant oxynitride structure is much more resistant to trench fill erosion by wet etch, for example, yet results in minimal stress to the surrounding silicon. To further reduce stress, the nitrogen concentration may be varied by varying the proportion of O2 to NH3 in the plasma mixture so that the nitrogen concentration is maximum at the top of the fill material.

    摘要翻译： 氧氮化物材料用于在集成电路结构中形成浅沟槽隔离区。 氧氮化物可以用于沟槽衬垫和沟槽填充材料。 氧氮化物衬垫通过氮化最初形成的氧化物沟槽衬垫而形成。 氧氮化物沟槽填充材料通过直接沉积SiH 4和O 2的高密度等离子体（HDP）氧化物混合物并且将等量的NH 3加入到等离子体混合物中而形成。 所得到的氮氧化物结构例如通过湿法蚀刻对沟槽填充侵蚀的抵抗性更高，但是对周围硅的应力最小。 为了进一步减少应力，可以通过改变等离子体混合物中的O 2与NH 3的比例来改变氮浓度，从而在填充材料的顶部的氮浓度最大。

    Reach-through isolation etching method for silicon-on-insulator devices
    9.
    发明授权
    Reach-through isolation etching method for silicon-on-insulator devices 失效
    绝缘体上硅器件的透光隔离蚀刻方法

    公开(公告)号：US5306659A

    公开(公告)日：1994-04-26

    申请号：US37855

    申请日：1993-03-29

    申请人： Klaus D. Beyer ,  Andrie S. Yapsir

    发明人： Klaus D. Beyer ,  Andrie S. Yapsir

    IPC分类号： H01L21/764 ,  H01L21/76 ,  H01L21/762 ,  H01L27/12

    CPC分类号： H01L21/76264 ,  H01L21/76289 ,  Y10S148/05 ,  Y10S148/164

    摘要： A method and the resulting product for isolating lightly doped silicon islands from each other and from a common substrate. The substrate is covered with a first heavily doped epi layer. The first layer is covered with a lightly doped second epi layer. A pair of spaced deep trenches are provided which extend from the top surface of the second layer, through the first layer and into the substrate. The interior walls of the trenches are lined with oxide. A pair of heavily doped reach-through diffusions extending from said top surface to the first layer is oriented perpendicularly to the deep trenches and fully extends between the trenches. The heavily doped reach-through diffusions and the contiguous first layer are removed by a single anisotropic etching step to yield silicon islands isolated by air except where the islands contact the oxide-lined deep trenches. The air isolation preferably is partially replaced with other dielectric material.

    摘要翻译： 一种方法和所得到的产品，用于将共同的衬底彼此分离轻掺杂的硅岛。 衬底被第一重掺杂外延层覆盖。 第一层被轻掺杂的第二外延层覆盖。 提供一对间隔的深沟槽，其从第二层的顶表面延伸穿过第一层并进入衬底。 沟槽的内壁衬有氧化物。 从所述顶表面延伸到第一层的一对重掺杂的贯穿扩散层垂直于深沟槽定向并在沟槽之间完全延伸。 通过单个各向异性蚀刻步骤去除重掺杂的通孔扩散和相邻的第一层，以产生除空气与氧化物衬里的深沟槽接触的空气，由空气隔离。 空气隔离优选地部分地被其它介电材料替代。