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1.发明授权Power transmission system, power transmission/communication system and reader and/or writer 失效电力传输系统，电力传输/通信系统以及读写器
公开(公告)号：US06164532A
公开(公告)日：2000-12-26
申请号：US72173
申请日：1998-05-05
CPC分类号： G06K7/10336 , G06K7/0008 , G06K19/0723 , H02J5/005 , H02J50/12 , H02J50/80
摘要： The present invention provides a power transmission/communication system for transmitting power from a reader and/or writer to an IC card by an electromagnetic wave and performing transmission or transmission and reception of a communication signal between the reader and/or writer and the IC card by an electromagnetic wave, wherein the intensity of a magnetic field induced by the electromagnetic wave outputted from the reader and/or writer, i.e., the magnitude of power induced thereby and the time required to transmit the power are controlled.
摘要翻译： 本发明提供了一种用于通过电磁波从读取器和/或写入器向IC卡发送电力并在读取器和/或写入器与IC卡之间进行通信信号的发送或发送和接收的电力传输/通信系统 通过电磁波，其中由读取器和/或写入器输出的电磁波感应的磁场的强度，即由此引起的功率的大小以及发送功率所需的时间被控制。
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2.发明授权Reader/writer having coil arrangements to restrain electromagnetic field intensity at a distance 失效读/写器具有线圈排列，以一定距离限制电磁场强度公开(公告)号：US06176433B1
公开(公告)日：2001-01-23
申请号：US09079226
申请日：1998-05-15
IPC分类号： G06K1906
CPC分类号： G06K7/10346 , G06K19/0701 , G06K19/0715
摘要： The present invention provides a reader and/or writer for performing both the supply of operating power to an IC card and transmission of a communication signal to the IC card or transmission and reception thereof to and from the IC card, wherein a main coil or a spiral antenna for generating an electromagnetic field for the two or at least power supply, and auxiliary coils or spiral antennas for generating magnetic fields opposite in phase to the electromagnetic field generated by the main coil or spiral antenna to thereby restrain the intensity of the electromagnetic field in the distance are provided side by side.
摘要翻译： 本发明提供一种读取器和/或写入器，用于执行向IC卡提供工作电源和向IC卡发送通信信号或者向IC卡发送和接收IC卡，其中主线圈或 用于产生用于两个或至少电源的电磁场的螺旋天线和用于产生与由主线圈或螺旋天线产生的电磁场相反的磁场的辅助线圈或螺旋天线，从而抑制电磁场的强度 在距离上并排设置。
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公开(公告)号：US5499269A
公开(公告)日：1996-03-12
申请号：US275393
申请日：1994-07-15
申请人： Ryozo Yoshino
发明人： Ryozo Yoshino
CPC分类号： H04L5/14
摘要： A transmission-reception circuit, including a transmitter circuit and a receiver circuit connected to each end of a transmission line, for transmitting and receiving a signal to another receiver circuit and from another transmitter circuit at the other end across the transmission line, wherein in order to enable logical decision on a receiving signal to be made accurately and secure high reliability in a fully duplex simultaneous two-way communication, power supply lines are laid at opposite ends of the transmission line and threshold voltages for logical decision on a signal received by the receiver circuit are supplied from a power unit used for the transmitter circuit and the receiver circuit at the other end of the transmission line.
摘要翻译： 一种发送接收电路，包括连接到传输线的每一端的发射机电路和接收机电路，用于在另一端通过传输线路向另一接收机电路和另一发射机电路发送和接收信号，其中按顺序 为了使接收信号的逻辑判定能够在全双工同时双向通信中准确地确保高可靠性，电力线被布置在传输线的相对端，并且阈值电压用于对由 接收机电路从用于发射机电路的功率单元和传输线另一端的接收机电路提供。
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公开(公告)号：US5052022A
公开(公告)日：1991-09-24
申请号：US378281
申请日：1989-07-11
申请人： Shigeo Nishita , Ryozo Yoshino , Masato Hirai
发明人： Shigeo Nishita , Ryozo Yoshino , Masato Hirai
CPC分类号： H04L12/422 , H04L25/247 , H04J3/0685 , H04L7/033
摘要： A PLL circuit for generating an AC output signal synchronized with an AC input signal applied thereto with a phase offset with respect to the input signal includes, in one embodiment, a charge pump circuit capable of varying the phase offset depending on the frequency of the AC input signal. In a signal transmission network system including a plurality of nodes coupled to a signal transmission line and distanced from one another by various repeat lengths of transmission path, each node has a repeater including such PLL circuit to suppress jitter caused by individual repeat length of transmission over the transmission line and still remaining in an equalized AC signal in each node.
摘要翻译： 用于产生与施加到其上的相对于输入信号相位偏移的AC输入信号同步的AC输出信号的PLL电路在一个实施例中包括能够根据AC的频率改变相位偏移的电荷泵电路 输入信号。 在包括耦合到信号传输线并且通过传输路径的各种重复长度的彼此远离的多个节点的信号传输网络系统中，每个节点具有包括这样的PLL电路的中继器，以抑制由各个重复传输长度引起的抖动 传输线并且仍然保持在每个节点中的均衡的AC信号中。
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公开(公告)号：US4783791A
公开(公告)日：1988-11-08
申请号：US38753
申请日：1987-04-15
申请人： Ryozo Yoshino
发明人： Ryozo Yoshino
摘要： A multiple reproducing repeater station system having a plurality of repeater stations connected in tandem. Each of the repeater stations comprises a logical circuit for decoding data from a pulse-modulated signal transmitted from the preceding repeater station and delivering decoded data to a processing circuit, and a PLL for extracting a clock signal from the pulse-modulated signal. The PLL has an operational response time which is so adjusted as to be different from a data delay time due to a logical operation within the logical circuit.
摘要翻译： 具有串联连接的多个中继站的多重复制中继站系统。 每个中继站包括逻辑电路，用于对从前一个中继站发送的脉冲调制信号中的数据进行解码，并将解码的数据传送到处理电路;以及PLL，用于从脉冲调制信号中提取时钟信号。 PLL具有由于逻辑电路内的逻辑运算而被调整为不同于数据延迟时间的操作响应时间。
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公开(公告)号：US4697047A
公开(公告)日：1987-09-29
申请号：US891886
申请日：1986-08-01
申请人： Masato Hirai , Masami Kurata , Ryozo Yoshino
发明人： Masato Hirai , Masami Kurata , Ryozo Yoshino
CPC分类号： H04L12/42 , F02F2001/241
摘要： A relay circuit comprise first and second relays having respective terminals at which positive cross-talk of a signal of positive polarity is produced when the other terminals to which the positive polarity signal is applied are in the make and break states, respectively, and third and fourth relays having respective terminals at which negative cross-talk of a signal of negative polarity is produced when the other terminals to which the negative polarity signal is applied are in the make and break states, respectively, wherein with regards to the terminals where the cross-talk occurs, the first and fourth relays are connected to each other and said second and third relays are connected to each other, respectively.
摘要翻译： 一个继电器电路包括具有相应端子的第一和第二继电器，分别在施加正极性信号的其它端子分别处于制动和断开状态时产生正极性信号的正串扰，第三和第二继电器 第四继电器具有各自的端子，当施加负极性信号的其他端子分别处于制造和断开状态时，产生负极性信号的负串扰，其中对于交叉 - 发生，第一和第四继电器彼此连接，并且所述第二和第三继电器分别彼此连接。
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7.发明授权D/A conversion device and method and charged particle beam exposure apparatus and method 失效D / A转换装置及方法及带电粒子束曝光装置及方法公开(公告)号：US07557357B2
公开(公告)日：2009-07-07
申请号：US11729898
申请日：2007-03-28
申请人： Takamasa Satoh , Koichi Hidaka , Ryozo Yoshino
发明人： Takamasa Satoh , Koichi Hidaka , Ryozo Yoshino
IPC分类号： H03M1/10
CPC分类号： H03M1/1047 , H01J37/1477 , H01J2237/1504 , H03M1/66
摘要： The present invention is related to a D/A conversion device, it is provided with a first D/A conversion circuit which receives input of digital data composed of plural bits and outputs a corresponding electric output signal, and a second D/A conversion circuit which receives input of a correction code for the digital data and which outputs a corresponding electric correction signal, wherein the first and second D/A conversion circuits are connected to each other at their respective output terminals so that the electric output signal is corrected by the electric correction signal. The D/A conversion device comprises: storing means 105 for storing correction codes each for one bit of the digital data, the correction codes being determined in correlation with the first D/A conversion circuit 11; and calculating means 107 for performing serial entry and addition of the correction codes each for one bit of the digital data, and outputting a correction code for all bits of the digital data.
摘要翻译： 本发明涉及一种D / A转换装置，它具有一个第一D / A转换电路，它接收由多个比特组成的数字数据的输入并输出相应的电输出信号，以及一个第二D / A转换电路 其接收数字数据的校正码的输入并输出相应的电校正信号，其中第一和第二D / A转换电路在它们各自的输出端彼此连接，使得电输出信号由 电校正信号。 D / A转换装置包括：存储装置105，用于存储每个数字数据的一位的校正码，校正码与第一D / A转换电路11相关确定; 以及用于对数字数据的一位执行校正码的串行输入和相加的计算装置107，并输出数字数据的所有比特的校正码。
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8.发明申请D/A conversion device and method and charged particle beam exposure apparatus and method 失效D / A转换装置及方法及带电粒子束曝光装置及方法公开(公告)号：US20080054185A1
公开(公告)日：2008-03-06
申请号：US11729898
申请日：2007-03-28
申请人： Takamasa Satoh , Koichi Hidaka , Ryozo Yoshino
发明人： Takamasa Satoh , Koichi Hidaka , Ryozo Yoshino
CPC分类号： H03M1/1047 , H01J37/1477 , H01J2237/1504 , H03M1/66
摘要： The present invention is related to a D/A conversion device, it is provided with a first D/A conversion circuit which receives input of digital data composed of plural bits and outputs a corresponding electric output signal, and a second D/A conversion circuit which receives input of a correction code for the digital data and which outputs a corresponding electric correction signal, wherein the first and second D/A conversion circuits are connected to each other at their respective output terminals so that the electric output signal is corrected by the electric correction signal. The D/A conversion device comprises: storing means 105 for storing correction codes each for one bit of the digital data, the correction codes being determined in correlation with the first D/A conversion circuit 11; and calculating means 107 for performing serial entry and addition of the correction codes each for one bit of the digital data, and outputting a correction code for all bits of the digital data.
摘要翻译： 本发明涉及一种D / A转换装置，它具有一个第一D / A转换电路，它接收由多个比特组成的数字数据的输入并输出相应的电输出信号，以及一个第二D / A转换电路 其接收数字数据的校正码的输入并输出相应的电校正信号，其中第一和第二D / A转换电路在它们各自的输出端彼此连接，使得电输出信号由 电校正信号。 D / A转换装置包括：存储装置105，用于存储每个数字数据的一位的校正码，校正码与第一D / A转换电路11相关确定; 以及用于对数字数据的一位执行校正码的串行输入和相加的计算装置107，并输出数字数据的所有比特的校正码。
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公开(公告)号：US4675884A
公开(公告)日：1987-06-23
申请号：US812921
申请日：1985-12-23
CPC分类号： H03M5/12
摘要： A decoding circuit is operative to decode a differential Manchester code consisting of four symbols "J", "K", "1" and "0" each composed of two consecutive signal elements. For detection of the symbol "J" and consequent determination of the symbol boundary, the decoding circuit has a circuit configuration which takes advantage of the fact that the symbol "K" immediately follows the symbol "J" and three consecutive signal elements, two of which are included in the symbol "J" and one of which is for a symbol immediately preceding the symbol "J", have the same polarity. To prevent an error that a second occurrence of the symbol "J" is detected after completion of detection of the symbol "J", the decoding circuit has an additional circuit configuration which inhibits the detection of the symbol "J" until the symbol "0" or the symbol "1", for example, is detected.
摘要翻译： 解码电路用于对由每个由两个连续的信号元素组成的四个符号“J”，“K”，“1”和“0”组成的差分曼彻斯特码进行解码。 为了检测符号“J”并随后确定符号边界，解码电路具有利用符号“K”紧跟在符号“J”之后的事实的电路结构，以及三个连续的信号元素 它们包括在符号“J”中，其中一个用于紧邻符号“J”之前的符号，具有相同的极性。 为了防止在完成符号“J”的检测之后检测到符号“J”的第二次发生的错误，解码电路具有禁止符号“J”的检测直到符号“0”的附加电路配置 “或例如符号”1“。
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公开(公告)号：US20130130087A1
公开(公告)日：2013-05-23
申请号：US13812085
申请日：2012-06-28
申请人： Hitoshi Kawaguchi , Ryozo Yoshino , Yuji Kodera , Koichi Kajiyama
发明人： Hitoshi Kawaguchi , Ryozo Yoshino , Yuji Kodera , Koichi Kajiyama
IPC分类号： H01M10/50
CPC分类号： H01M10/647 , H01M2/0275 , H01M2/1077 , H01M2/347 , H01M10/052 , H01M10/617 , H01M10/653 , H01M10/6555 , H01M10/658
摘要： A non-aqueous electrolyte battery module of the invention includes: a plurality of non-aqueous electrolyte batteries, a plurality of heat dissipating members, a plurality of heat insulating members, and an exterior casing housing the non-aqueous electrolyte batteries, the heat dissipating members and the heat insulating members, the non-aqueous electrolyte batteries each includes a battery element and a flexible exterior member housing the battery element, the non-aqueous electrolyte batteries are laminated with the heat dissipating members interposed therebetween to form a battery laminate, ends of the heat dissipating members are in tight pressing contact with an inner face of the exterior casing, and the heat insulating members are disposed between the exterior casing and opposite ends of the battery laminate in a laminating direction thereof.
摘要翻译： 本发明的非水电解质电池模块包括：多个非水电解质电池，多个散热构件，多个绝热构件和容纳非水电解质电池的外壳，散热 构件和绝热构件，非水电解质电池各自包括电池元件和容纳电池元件的柔性外部构件，非水电解质电池层叠有散热构件，以形成电池层叠体，端部 所述散热构件与所述外部壳体的内表面紧密地按压接触，并且所述隔热构件沿其层叠方向设置在所述电池层叠体的外部壳体和相对端之间。
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