Compound semiconductor device and manufacturing method thereof
    4.
    发明授权
    Compound semiconductor device and manufacturing method thereof 有权
    化合物半导体器件及其制造方法

    公开(公告)号:US08816408B2

    公开(公告)日:2014-08-26

    申请号:US12721052

    申请日:2010-03-10

    摘要: A compound semiconductor device includes a compound semiconductor laminated structure; a source electrode, a drain electrode, and a gate electrode formed over the compound semiconductor laminated structure; a first protective film formed over the compound semiconductor laminated structure between the source electrode and the gate electrode and including silicon; and a second protective film formed over the compound semiconductor laminated structure between the drain electrode and the gate electrode and including more silicon than the first protective film.

    摘要翻译: 化合物半导体器件包括化合物半导体层叠结构; 源电极,漏电极和形成在化合物半导体层叠结构上的栅电极; 在所述源电极和所述栅电极之间并且包括硅的所述化合物半导体层叠结构上形成的第一保护膜; 以及形成在所述漏电极和所述栅电极之间的所述化合物半导体层叠结构上并且包含比所述第一保护膜更多的硅的第二保护膜。

    COMPOUND SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    6.
    发明申请
    COMPOUND SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
    化合物半导体器件及其制造方法

    公开(公告)号:US20100244104A1

    公开(公告)日:2010-09-30

    申请号:US12721052

    申请日:2010-03-10

    IPC分类号: H01L29/812 H01L21/337

    摘要: A compound semiconductor device includes a compound semiconductor laminated structure; a source electrode, a drain electrode, and a gate electrode formed over the compound semiconductor laminated structure; a first protective film formed over the compound semiconductor laminated structure between the source electrode and the gate electrode and including silicon; and a second protective film formed over the compound semiconductor laminated structure between the drain electrode and the gate electrode and including more silicon than the first protective film.

    摘要翻译: 化合物半导体器件包括化合物半导体层叠结构; 源电极,漏电极和形成在化合物半导体层叠结构上的栅电极; 在所述源电极和所述栅电极之间并且包括硅的所述化合物半导体层叠结构上形成的第一保护膜; 以及形成在所述漏电极和所述栅电极之间的所述化合物半导体层叠结构上并且包含比所述第一保护膜更多的硅的第二保护膜。

    Compound semiconductor device and method of manufacturing the same

    公开(公告)号:US08581261B2

    公开(公告)日:2013-11-12

    申请号:US13276830

    申请日:2011-10-19

    IPC分类号: H01L29/778

    摘要: Two layers of protection films are formed such that a sheet resistance at a portion directly below the protection film is higher than that at a portion directly below the protection film. The protection films are formed, for example, of SiN film, as insulating films. The protection film is formed to be higher, for instance, in hydrogen concentration than the protection film so that the protection film is higher in refractive index the protection film. The protection film is formed to cover a gate electrode and extend to the vicinity of the gate electrode on an electron supplying layer. The protection film is formed on the entire surface to cover the protection film. According to this configuration, the gate leakage is significantly reduced by a relatively simple configuration to realize a highly-reliable compound semiconductor device achieving high voltage operation, high withstand voltage, and high output.

    Compound semiconductor device with T-shaped gate electrode
    8.
    发明授权
    Compound semiconductor device with T-shaped gate electrode 有权
    具有T形栅电极的复合半导体器件

    公开(公告)号:US08183558B2

    公开(公告)日:2012-05-22

    申请号:US13023146

    申请日:2011-02-08

    IPC分类号: H01L29/06

    摘要: A compound semiconductor device includes a compound semiconductor substrate; epitaxially grown layers formed over the compound semiconductor substrate and including a channel layer and a resistance lowering cap layer above the channel layer; source and drain electrodes in ohmic contact with the channel layer; recess formed by removing the cap layer between the source and drain electrodes; a first insulating film formed on an upper surface of the cap layer and having side edges at positions retracted from edges, or at same positions as the edges of the cap layer in a direction of departing from the recess; a second insulating film having gate electrode opening and formed covering a semiconductor surface in the recess and the first insulating film; and a gate electrode formed on the recess via the gate electrode opening.

    摘要翻译: 化合物半导体器件包括化合物半导体衬底; 在化合物半导体衬底上形成的外延生长层,并且在沟道层上方包括沟道层和电阻降低覆盖层; 源极和漏极与沟道层欧姆接触; 通过去除源极和漏极之间的覆盖层形成的凹陷; 第一绝缘膜,其形成在所述盖层的上表面上,并且在从所述盖层的边缘离开所述凹部的边缘处或与所述盖层的边缘相同的位置处具有侧边缘; 第二绝缘膜,具有栅极电极开口并形成为覆盖所述凹部中的半导体表面和所述第一绝缘膜; 以及通过栅电极开口形成在凹部上的栅电极。

    Semiconductor device and method of manufacturing the same
    9.
    发明授权
    Semiconductor device and method of manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号:US08163653B2

    公开(公告)日:2012-04-24

    申请号:US13099510

    申请日:2011-05-03

    申请人: Kozo Makiyama

    发明人: Kozo Makiyama

    IPC分类号: H01L21/302 H01L21/461

    摘要: A semiconductor device includes a substrate, a compound semiconductor layer formed over the substrate, and a protective insulating film composed of silicon nitride, which is formed over a surface of the compound semiconductor layer and whose film density in an intermediate portion is lower than that in a lower portion.

    摘要翻译: 半导体器件包括衬底,形成在衬底上的化合物半导体层和由氮化硅组成的保护绝缘膜,其形成在化合物半导体层的表面上,其中间部分的膜密度低于 下部。

    Method of processing resist, semiconductor device, and method of producing the same

    公开(公告)号:US20100187576A1

    公开(公告)日:2010-07-29

    申请号:US12659970

    申请日:2010-03-26

    IPC分类号: H01L29/808

    摘要: A surface component film (2) is etched using a resist (3) as a mask, and the surface component film (2) is patterned according to the shape of an aperture (3a). This results in a step portion (4) having the same shape as the aperture (3a), with the sidewall (4a) of the step portion (4) exposed through the aperture (3a). The aperture (3a) is spin-coated with a shrink agent, reacted at a first temperature, and developed to shrink the aperture (3a). To control the shrinkage with high accuracy, in the first round of reaction, the aperture is shrunk by, for example, about half of the desired shrinkage. The aperture (3a) is further spin-coated with a shrink agent, reacted at a second temperature, and developed to shrink the aperture (3a). In this embodiment, the second-round shrink process will result in the desired aperture length. The second temperature is adjusted based on the shrinkage in the first round. With respect to a resist using short-wavelength light (short-wavelength resist) or a resist using electron beam (electron beam resist), a minute aperture can be obtained with stable shrink effect and accurate control of the length thereof.