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    Power supply circuit for driving power transistor
    1.
    发明授权
    Power supply circuit for driving power transistor 失效

    公开(公告)号：US06580625B2

    公开(公告)日：2003-06-17

    申请号：US10086834

    申请日：2002-03-04

    申请人： Kraisorn Throngnumchai ,  Hiroyuki Kaneko ,  Yoshio Shimoida ,  Toshirou Karaki

    发明人： Kraisorn Throngnumchai ,  Hiroyuki Kaneko ,  Yoshio Shimoida ,  Toshirou Karaki

    IPC分类号： H02M324

    CPC分类号： H03K17/605 ,  H02M1/08 ,  H03K17/04213 ,  H03K17/666

    摘要： There are included a switching circuit for flowing pulse electrical current through a primary winding of a transformer, a half wave rectification circuit or a full wave rectification circuit for extracting electrical current from a secondary winding of the transformer while this pulse electrical current flows, and an electrical current regulation circuit which controls the magnitude of the electrical current which is extracted from the secondary winding of the transformer according to the collector voltage of the power transistor. Since the most suitable pulse electrical current is made directly from the direct current power supply and is supplied to the base of the power transistor, there is no requirement to provide any DC-DC converter, and it is possible to reduce the size and the cost of the power supply circuit for driving the power transistor.

    Semiconductor protective control unit for controlling output transistors connected to inductive load
    2.
    发明授权
    Semiconductor protective control unit for controlling output transistors connected to inductive load 失效
    用于控制连接到感性负载的输出晶体管的半导体保护控制单元

    公开(公告)号：US06683777B2

    公开(公告)日：2004-01-27

    申请号：US09745734

    申请日：2000-12-26

    申请人： Yoshio Shimoida ,  Kraisorn Throngnumchai ,  Toshiro Karaki

    发明人： Yoshio Shimoida ,  Kraisorn Throngnumchai ,  Toshiro Karaki

    IPC分类号： H01H4732

    CPC分类号： H03K17/0826 ,  H03K17/08126

    摘要： A protective control unit for controlling a highside-output transistor and a lowside-output transistor connected in series is provided. The highside-output transistor has a first main electrode region connected to a power supply, a second main electrode region and a first control electrode. The lowside-output transistor has a third main electrode region connected to the second main electrode region, a fourth electrode region connected to ground and a second control electrode. And an inductive load is connected to a connecting point between the second and the third electrode regions. The protective control unit of the present invention has a highside-drive circuit. The highside-drive circuit pulls out charges stored in the highside-output transistor, through the first control electrode, during the periods when the highside-output transistor is in the end of reverse conducting state and reverse recovery state. The charges are pulled out by short-circuiting between the first control electrode and the second main electrode region during the periods when the highside-output transistor is in the end of reverse conducting state and reverse recovery state. Or, the charges are pulled out by a providing a potential having an opposite polarity to the charges during the periods when the highside-output transistor is in the end of reverse conducting state and reverse recovery state.

    摘要翻译： 提供了用于控制串联连接的高边输出晶体管和低边输出晶体管的保护控制单元。 高边输出晶体管具有连接到电源，第二主电极区域和第一控制电极的第一主电极区域。 低边输出晶体管具有连接到第二主电极区域的第三主电极区域，连接到地的第四电极区域和第二控制电极。 并且感性负载连接到第二和第三电极区域之间的连接点。 本发明的保护控制单元具有高侧驱动电路。 在高边输出晶体管处于反向导通状态和反向恢复状态的结束期间，高边驱动电路通过第一控制电极拉出存储在高边输出晶体管中的电荷。 在高边输出晶体管处于反向导通状态和反向恢复状态的结束期间，通过第一控制电极和第二主电极区域之间的短路来拉出电荷。 或者，通过在高边输出晶体管处于反向导通状态和反向恢复状态的结束期间提供与电荷具有相反极性的电位来拉出电荷。

    BATTERY
    3.
    发明申请
    BATTERY 有权
    电池

    公开(公告)号：US20120156552A1

    公开(公告)日：2012-06-21

    申请号：US13392949

    申请日：2010-07-23

    申请人： Yasuhito Miyazaki ,  Takuya Kinoshita ,  Takaaki Abe ,  Yoshio Shimoida

    发明人： Yasuhito Miyazaki ,  Takuya Kinoshita ,  Takaaki Abe ,  Yoshio Shimoida

    IPC分类号： H01M2/02 ,  H01M2/30

    CPC分类号： H01M2/26 ,  H01M2/22 ,  H01M2/30 ,  H01M10/0413 ,  H01M10/0525 ,  H01M10/0585

    摘要： Disclosed is a battery having an improved life. Specifically disclosed is a battery which comprises an electric power generating element in which one or more unit cell layers are stacked, each being constituted by sequentially laminating or stacking a positive electrode, an electrolyte and a negative electrode; a first collector plate which is provided on the outermost positive electrode surface of the electric power generating element; a second collector plate which is provided on the outermost negative electrode surface of the electric power generating element; a convex or protruding portion provided on the first collector plate and/or the second collector plate with a width that is not less than a half of the width of the end edge of the collector plate; and a terminal which is attached to the convex portion for retrieving electric current from the convex portion.

    摘要翻译： 公开了具有改善寿命的电池。 具体公开了一种电池，其包括其中堆叠一个或多个单元电池层的发电元件，其分别通过顺序层叠或堆叠正电极，电解质和负电极而构成; 设置在所述发电元件的最外侧正极面上的第一集电板; 设置在所述发电元件的最外侧负极面上的第二集电板; 设置在所述第一集电板和/或所述第二集电板上的凸部或突出部的宽度不小于所述集电板的端缘宽度的一半的宽度; 以及附接到凸部以从凸部取回电流的端子。

    RESIN COMPOSITION AND ORGANIC-ELECTROLYTE BATTERY
    4.
    发明申请
    RESIN COMPOSITION AND ORGANIC-ELECTROLYTE BATTERY 有权
    树脂组合物和有机电解质电池

    公开(公告)号：US20120156546A1

    公开(公告)日：2012-06-21

    申请号：US13325647

    申请日：2011-12-14

    申请人： Hiroshi Amano ,  Keiji Ogino ,  Kenji Hosaka ,  Ryouichi Senbokuya ,  Yoshio Shimoida ,  Hideaki Horie

    发明人： Hiroshi Amano ,  Keiji Ogino ,  Kenji Hosaka ,  Ryouichi Senbokuya ,  Yoshio Shimoida ,  Hideaki Horie

    IPC分类号： H01M2/08 ,  C08L63/00

    CPC分类号： H01M2/06 ,  C08G59/24 ,  C08G59/26 ,  C08G59/4014 ,  C08G59/4021 ,  C08G59/50 ,  C08L63/00 ,  H01M2/08 ,  H01M2/30 ,  H01M4/661 ,  H01M10/05 ,  H01M10/052 ,  H01M10/0585 ,  C08L2666/22

    摘要： Provided is a resin composition superior in the adhesiveness to a metal and having high organic solvent resistance, particularly, a resin composition preferable as a sealant for an organic electrolyte battery, which shows superior adhesiveness to a terminal or a collector made of a highly heat resistant metal such as stainless steel and nickel, does not easily develop degradation even when contacted with an organic electrolytic solution at a high temperature, and does not easily influence an electrolytic solution, and a highly reliable organic electrolyte battery wherein leaching of an electrolytic solution from an electrolyte layer is prevented by the resin composition.A resin composition containing (A) an epoxy resin containing at least (E1) an epoxy resin having an aromatic ring and an alicyclic skeleton and (B) a latent curing agent.

    摘要翻译： 提供一种与金属的粘合性优异且耐溶剂性高的树脂组合物，特别是优选作为有机电解质电池用密封剂的树脂组合物，该组合物对由耐高温性构成的端子或集电体表现出优异的粘附性 金属如不锈钢和镍，即使在高温下与有机电解质接触时也不容易发生降解，并且不容易影响电解液，以及高可靠性的有机电解质电池，其中电解溶液从 通过树脂组合物防止电解质层。 一种树脂组合物，其含有（A）至少含有（E1）具有芳香环和脂环骨架的环氧树脂的环氧树脂和（B）潜伏性固化剂。

    Method of manufacturing semiconductor device
    6.
    发明授权
    Method of manufacturing semiconductor device 有权

    公开(公告)号：US07989295B2

    公开(公告)日：2011-08-02

    申请号：US13014190

    申请日：2011-01-26

    申请人： Tetsuya Hayashi ,  Masakatsu Hoshi ,  Yoshio Shimoida ,  Hideaki Tanaka ,  Shigeharu Yamagami

    发明人： Tetsuya Hayashi ,  Masakatsu Hoshi ,  Yoshio Shimoida ,  Hideaki Tanaka ,  Shigeharu Yamagami

    IPC分类号： H01L21/336

    CPC分类号： H01L29/7828 ,  H01L29/0623 ,  H01L29/1608 ,  H01L29/267 ,  H01L29/66068

    摘要： A semiconductor substrate made of a semiconductor material is prepared, and a hetero semiconductor region is formed on the semiconductor substrate to form a heterojunction in an interface between the hetero semiconductor region and the semiconductor substrate. The hetero semiconductor region is made of a semiconductor material having a bandgap different from that of the semiconductor material, and a part of the hetero semiconductor region includes a film thickness control portion whose film thickness is thinner than that of the other part thereof. By oxidizing the hetero semiconductor region with a thickness equal to the film thickness of the film thickness control portion, a gate insulating film adjacent to the heterojunction is formed. A gate electrode is formed on the gate insulating film. This makes it possible to manufacture a semiconductor device including the gate insulating film with a lower ON resistance, and with a higher insulating characteristic and reliability.

    Semiconductor device and method of producing the same
    7.
    发明授权
    Semiconductor device and method of producing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US07671383B2

    公开(公告)日：2010-03-02

    申请号：US11714214

    申请日：2007-03-06

    申请人： Tetsuya Hayashi ,  Masakatsu Hoshi ,  Yoshio Shimoida ,  Hideaki Tanaka ,  Shigeharu Yamagami

    发明人： Tetsuya Hayashi ,  Masakatsu Hoshi ,  Yoshio Shimoida ,  Hideaki Tanaka ,  Shigeharu Yamagami

    IPC分类号： H01L29/732

    CPC分类号： H01L29/267 ,  H01L21/0475 ,  H01L29/0623 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/4236 ,  H01L29/66068 ,  H01L29/7828

    摘要： A semiconductor device, includes: a first conductivity type semiconductor base having a main face; a hetero semiconductor region contacting the main face of the semiconductor base and forming a hetero junction in combination with the semiconductor base, the semiconductor base and the hetero semiconductor region in combination defining a junction end part; a gate insulating film defining a junction face in contact with the semiconductor base and having a thickness; and a gate electrode disposed adjacent to the junction end part via the gate insulating film and defining a shortest point in a position away from the junction end part by a shortest interval, a line extending from the shortest point to a contact point vertically relative to the junction face, forming such a distance between the contact point and the junction end part as to be smaller than the thickness of the gate insulating film contacting the semiconductor base.

    摘要翻译： 一种半导体器件，包括：具有主面的第一导电型半导体基底; 与半导体基板的主面接触并与半导体基底结合形成异质结的异质半导体区域，半导体基底和异质半导体区域组合形成连接端部; 限定与半导体基底接触并具有厚度的接合面的栅极绝缘膜; 以及栅电极，其经由所述栅极绝缘膜与所述接合端部相邻设置，并且在远离所述接合端部的位置中以最短间隔限定最短点，从所述最短点到接触点相对于所述接合端垂直延伸的线 接合面在接触点和接合端部之间形成的距离小于与半导体基底接触的栅极绝缘膜的厚度。

    Method of manufacturing semiconductor device
    9.
    发明授权
    Method of manufacturing semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号：US07531396B2

    公开(公告)日：2009-05-12

    申请号：US11374418

    申请日：2006-03-14

    申请人： Tetsuya Hayashi ,  Masakatsu Hoshi ,  Yoshio Shimoida ,  Hideaki Tanaka

    发明人： Tetsuya Hayashi ,  Masakatsu Hoshi ,  Yoshio Shimoida ,  Hideaki Tanaka

    IPC分类号： H01L21/338 ,  H01L21/066

    CPC分类号： H01L29/66068 ,  H01L21/8213 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/267 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/7828

    摘要： A method of manufacturing a semiconductor device is disclosed. The semiconductor device includes a semiconductor body of a first conductivity type, a hetero semiconductor region adjacent to one main surface of the semiconductor body and having a band gap different from that of the semiconductor body, and a gate electrode formed in a junction portion between the hetero semiconductor region and the semiconductor body through a gate insulating film. The method includes a first process of forming a predetermined trench by using a mask layer having a predetermined opening on one main surface side of the semiconductor body, a second process of forming a buried region adjacent to at least a side wall of the trench and so as to extend from the trench, a third process of forming a hetero semiconductor layer so as to adjoin the semiconductor body and the buried region, and a fourth process of forming the hetero semiconductor region by patterning the hetero semiconductor layer.

    摘要翻译： 公开了制造半导体器件的方法。 半导体器件包括第一导电类型的半导体本体，与半导体本体的一个主表面相邻且具有与半导体本体不同的带隙的异质半导体区域，以及形成在该半导体器件之间的接合部分中的栅电极 异质半导体区域和半导体本体通过栅极绝缘膜。 该方法包括通过使用在半导体主体的一个主表面侧上具有预定开口的掩模层来形成预定沟槽的第一工艺，形成与沟槽的至少侧壁相邻的掩埋区域的第二工艺 从沟槽延伸，形成与半导体本体和掩埋区相邻的异质半导体层的第三工序，以及通过图案化杂半导体层形成异质半导体区的第四工序。