公开(公告)号：US20090242907A1

公开(公告)日：2009-10-01

申请号：US12408875

申请日：2009-03-23

申请人： Kunio HOSOYA ,  Saishi FUJIKAWA ,  Takahiro KASAHARA

发明人： Kunio HOSOYA ,  Saishi FUJIKAWA ,  Takahiro KASAHARA

IPC分类号： H01L33/00 ,  H01L21/18

CPC分类号： H01L21/84 ,  G02F2202/105 ,  H01L27/3262 ,  H01L27/3293 ,  H01L29/66772 ,  H01L51/52

摘要： To achieve enlargement and high definition of a display portion, a single crystal semiconductor film is used as a transistor in a pixel, and the following steps are included: bonding a plurality of single crystal semiconductor substrates to a base substrate; separating part of the plurality of single crystal semiconductor substrates to form a plurality of regions each comprising a single crystal semiconductor film over the base substrate; forming a plurality of transistors each comprising the single crystal semiconductor film as a channel formation region; and forming a plurality of pixel electrodes over the region provided with the single crystal semiconductor film and a region not provided with the single crystal semiconductor film. Some of the transistors electrically connecting to the pixel electrodes formed over the region not provided with the single crystal semiconductor film are formed in the region provided with the single crystal semiconductor film.

摘要翻译： 为了实现显示部分的放大和高清晰度，在像素中使用单晶半导体膜作为晶体管，并且包括以下步骤：将多个单晶半导体衬底接合到基底衬底; 分离所述多个单晶半导体衬底的一部分以在所述基底衬底上形成各自包括单晶半导体膜的多个区域; 形成各自包含所述单晶半导体膜作为沟道形成区域的多个晶体管; 以及在设置有单晶半导体膜的区域和未设置单晶半导体膜的区域上形成多个像素电极。 电连接到形成在未设置单晶半导体膜的区域上的像素电极的一些晶体管形成在设置有单晶半导体膜的区域中。

公开(公告)号：US20120299027A1

公开(公告)日：2012-11-29

申请号：US13567215

申请日：2012-08-06

申请人： Kunio HOSOYA ,  Saishi FUJIKAWA ,  Takahiro KASAHARA

发明人： Kunio HOSOYA ,  Saishi FUJIKAWA ,  Takahiro KASAHARA

IPC分类号： H01L33/62

CPC分类号： H01L21/84 ,  G02F2202/105 ,  H01L27/3262 ,  H01L27/3293 ,  H01L29/66772 ,  H01L51/52

摘要： To achieve enlargement and high definition of a display portion, a single crystal semiconductor film is used as a transistor in a pixel, and the following steps are included: bonding a plurality of single crystal semiconductor substrates to a base substrate; separating part of the plurality of single crystal semiconductor substrates to form a plurality of regions each comprising a single crystal semiconductor film over the base substrate; forming a plurality of transistors each comprising the single crystal semiconductor film as a channel formation region; and forming a plurality of pixel electrodes over the region provided with the single crystal semiconductor film and a region not provided with the single crystal semiconductor film. Some of the transistors electrically connecting to the pixel electrodes formed over the region not provided with the single crystal semiconductor film are formed in the region provided with the single crystal semiconductor film.

摘要翻译： 为了实现显示部分的放大和高清晰度，在像素中使用单晶半导体膜作为晶体管，并且包括以下步骤：将多个单晶半导体衬底接合到基底衬底; 分离所述多个单晶半导体衬底的一部分以在所述基底衬底上形成各自包括单晶半导体膜的多个区域; 形成各自包含所述单晶半导体膜作为沟道形成区域的多个晶体管; 以及在设置有单晶半导体膜的区域和未设置单晶半导体膜的区域上形成多个像素电极。 电连接到形成在未设置单晶半导体膜的区域上的像素电极的一些晶体管形成在设置有单晶半导体膜的区域中。

公开(公告)号：US20090111198A1

公开(公告)日：2009-04-30

申请号：US12254560

申请日：2008-10-20

申请人： Saishi FUJIKAWA ,  Kunio HOSOYA ,  Yoko CHIBA

发明人： Saishi FUJIKAWA ,  Kunio HOSOYA ,  Yoko CHIBA

IPC分类号： H01L21/336 ,  H01L33/00

CPC分类号： H01L27/1288 ,  G02F2001/13606 ,  G02F2001/136231 ,  G02F2001/136236 ,  G02F2001/13625 ,  G02F2201/50 ,  H01L21/0273 ,  H01L21/31144 ,  H01L21/32139 ,  H01L27/1214

摘要： A manufacturing method of the present invention includes a process using a first multi-tone mask, in which a first conductive layer in which a transparent conductive layer and a metal layer are stacked over a substrate, a gate electrode formed of a first conductive layer, and a pixel electrode formed of a single layer of the transparent conductive layer are formed, a process using a second multi-tone mask, in which a contact hole to the pixel electrode, and an island of an i-type semiconductor layer and an n+ type semiconductor layer are formed after a gate insulating film, the i-type semiconductor layer, and the n+ type semiconductor layer are formed, a process using a third photomask, in which a source electrode and a drain electrode are formed after a second conductive layer is formed, and a process using a fourth photomask, in which an opening region is formed after a protective film is deposited.

摘要翻译： 本发明的制造方法包括使用第一多色调掩模的工艺，其中在衬底上堆叠透明导电层和金属层的第一导电层，由第一导电层形成的栅电极， 形成由透明导电层的单层形成的像素电极，使用第二多色调掩模的处理，其中与像素电极的接触孔和i型半导体层的岛和n + 在栅极绝缘膜，i型半导体层和n +型半导体层形成之后形成使用第三光掩模的工艺，其中在第二导电层之后形成源电极和漏电极 以及使用第四光掩模的方法，其中在保护膜沉积之后形成开口区域。

公开(公告)号：US20090159885A1

公开(公告)日：2009-06-25

申请号：US12336614

申请日：2008-12-17

申请人： Shunpei YAMAZAKI ,  Kunio HOSOYA ,  Yasutaka SUZUKI ,  Saishi FUJIKAWA

发明人： Shunpei YAMAZAKI ,  Kunio HOSOYA ,  Yasutaka SUZUKI ,  Saishi FUJIKAWA

IPC分类号： H01L29/861 ,  H01L29/04

CPC分类号： H01L29/66765 ,  H01L27/1222 ,  H01L27/124 ,  H01L29/04 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/78696

摘要： A thin film transistor which includes a microcrystalline semiconductor film over a gate electrode with a gate insulating film interposed therebetween to be in an inner region in which end portions of microcrystalline semiconductor film are in an inside of end portions of the gate electrode, an amorphous semiconductor film which covers top and side surfaces of the microcrystalline semiconductor film, and an impurity semiconductor film to which an impurity element imparting one conductivity is added, and which forms a source region and a drain region, wherein the microcrystalline semiconductor film includes an impurity element serving as a donor is provided to reduce off current of a thin film transistor, to reduce reverse bias current of a diode, and to improve an image quality of a display device using a thin film transistor.

摘要翻译： 一种薄膜晶体管，其在栅极电极上方具有栅极绝缘膜，该微晶半导体膜位于其内部区域，其中微晶半导体膜的端部位于栅电极的端部的内部，非晶半导体 覆盖微晶半导体膜的顶表面和侧表面的膜，以及添加了赋予一种导电性的杂质元素的杂质半导体膜，并且形成源区和漏区，其中微晶半导体膜包括供给的杂质元素 为了降低薄膜晶体管的电流而减小二极管的反向偏置电流，并且提高使用薄膜晶体管的显示装置的图像质量，作为供体被提供。

公开(公告)号：US20120149157A1

公开(公告)日：2012-06-14

申请号：US13398883

申请日：2012-02-17

申请人： Kunio HOSOYA ,  Saishi FUJIKAWA

发明人： Kunio HOSOYA ,  Saishi FUJIKAWA

IPC分类号： H01L21/336

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/78609 ,  H01L29/78678

摘要： A first resist pattern is formed by exposure using a first multi-tone photomask, and a first conductive layer, a first insulating layer, a first semiconductor layer, and a second semiconductor layer are etched, so that an island-shaped single layer and an island-shaped stack are formed. Here, sidewalls are formed on side surfaces of the island-shaped single layer and the island-shaped stack. Further, a second resist pattern is formed by exposure using a second multi-tone photomask, and a second conductive layer and the second semiconductor layer are etched, so that a thin film transistor, a pixel electrode, and a connection terminal are formed. After that, a third resist pattern is formed by exposure from a rear side using metal layers of the first conductive layer and the second conductive layer as masks, and the third insulating layer are etched, so that a protective insulating layer is formed.

摘要翻译： 通过使用第一多色调光掩模的曝光形成第一抗蚀剂图案，并且蚀刻第一导电层，第一绝缘层，第一半导体层和第二半导体层，使得岛状单层和 形成岛状叠层。 这里，在岛状单层和岛状叠层的侧面形成有侧壁。 此外，通过使用第二多色调光掩模的曝光形成第二抗蚀剂图案，并且蚀刻第二导电层和第二半导体层，从而形成薄膜晶体管，像素电极和连接端子。 之后，使用第一导电层和第二导电层的金属层作为掩模从后侧曝光形成第三抗蚀剂图案，并且蚀刻第三绝缘层，从而形成保护绝缘层。

公开(公告)号：US20100304538A1

公开(公告)日：2010-12-02

申请号：US12842070

申请日：2010-07-23

申请人： Kunio HOSOYA ,  Saishi FUJIKAWA

发明人： Kunio HOSOYA ,  Saishi FUJIKAWA

IPC分类号： H01L21/84 ,  H01L21/336

CPC分类号： H01L27/1237 ,  H01L27/1214 ,  H01L27/127

摘要： To reduce variation among TFTs in manufacture of a semiconductor device including n-type thin film transistors and p-type thin film transistors. Further, another object of the present invention is to reduce the number of masks and manufacturing steps, and manufacturing time. A method of manufacturing a semiconductor device includes forming an island-shaped semiconductor layer of a first thin film transistor, then, forming an island-shaped semiconductor layer of the second thin film transistor. In the formation of the island-shaped semiconductor layer of the second thin film transistor, a gate insulating film in contact with the island-shaped semiconductor layer of the second thin film transistor is used as a protection film (an etching stopper film) for the island-shaped semiconductor layer of the first thin film transistor.

摘要翻译： 为了减少在包括n型薄膜晶体管和p型薄膜晶体管的半导体器件的制造中的TFT之间的变化。 此外，本发明的另一个目的是减少掩模的数量和制造步骤以及制造时间。 制造半导体器件的方法包括形成第一薄膜晶体管的岛状半导体层，然后形成第二薄膜晶体管的岛状半导体层。 在第二薄膜晶体管的岛状半导体层的形成中，使用与第二薄膜晶体管的岛状半导体层接触的栅极绝缘膜作为保护膜（蚀刻停止膜） 第一薄膜晶体管的岛状半导体层。

公开(公告)号：US20120176559A1

公开(公告)日：2012-07-12

申请号：US13421933

申请日：2012-03-16

申请人： Saishi FUJIKAWA ,  Kunio Hosoya

发明人： Saishi FUJIKAWA ,  Kunio Hosoya

IPC分类号： G02F1/136 ,  H01L33/08

CPC分类号： G02F1/13394 ,  G02F1/133512 ,  G02F1/1362

摘要： When a columnar spacer is provided in a region overlapping with a TFT, there is a concern that pressure will be applied when attaching a pair of substrates to each other, which may result in the TFT being adversely affected and a crack forming. A dummy layer is formed of an inorganic material below a columnar spacer which is formed in a position overlapping with the TFT. The dummy layer is located in the position overlapping with the TFT, so that pressure applied to the TFT in a step of attaching the pair of substrates is distributed and relieved. The dummy layer is preferably formed of the same material as a pixel electrode so that it is formed without an increase in the number of processing steps.

摘要翻译： 当在与TFT重叠的区域中设置柱状间隔物时，担心当将一对基板彼此连接时施加压力，这可能导致TFT受到不利影响和形成裂纹。 虚设层由形成在与TFT重叠的位置的柱状间隔物下方的无机材料形成。 虚设层位于与TFT重叠的位置，从而在安装一对基板的步骤中施加到TFT的压力被分配和释放。 虚拟层优选由与像素电极相同的材料形成，使得其形成而不增加处理步骤的数量。

公开(公告)号：US20090206342A1

公开(公告)日：2009-08-20

申请号：US12366067

申请日：2009-02-05

申请人： Kunio HOSOYA ,  Saishi FUJIKAWA ,  Yukie SUZUKI

发明人： Kunio HOSOYA ,  Saishi FUJIKAWA ,  Yukie SUZUKI

IPC分类号： H01L29/786

CPC分类号： H01L27/0296 ,  H01L27/124 ,  H01L27/1248

摘要： An object is to reduce an occupied area of a protection circuit. Another object is to increase the reliability of a display device including the protection circuit. The protection circuit includes a first wiring over a substrate, an insulating film over the first wiring, and a second wiring over the insulating film.

摘要翻译： 目的是减少保护电路的占用面积。 另一个目的是提高包括保护电路的显示装置的可靠性。 保护电路包括在基板上的第一布线，第一布线上的绝缘膜和绝缘膜上的第二布线。

公开(公告)号：US20090117691A1

公开(公告)日：2009-05-07

申请号：US12255382

申请日：2008-10-21

申请人： Saishi FUJIKAWA ,  Kunio Hosoya ,  Yoko Chiba

发明人： Saishi FUJIKAWA ,  Kunio Hosoya ,  Yoko Chiba

IPC分类号： H01L21/336

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L29/66765

摘要： To achieve electro-optical devices typified by active matrix liquid crystal display devices with higher productivity and yield and lower manufacturing cost by reducing the number of steps of manufacturing a terminal portion and a pixel portion having an inverted staggered thin film transistor, specifically by reducing the number of photomasks used in a photolithography process. In view of this object, a photomask (multitone photomask) formed in such a manner that a light-transmitting substrate is provided with a transmitting portion, a partially-transmitting portion having a function of reducing light intensity, and a light-blocking portion is employed. Moreover, a lift-off method which does not require an etching step in patterning of a source electrode and a drain electrode of the pixel portion and a source wiring that extends to the terminal portion is employed.

摘要翻译： 为了通过减少制造端子部分的步骤数量和具有倒置交错薄膜晶体管的像素部分来实现以有效矩阵液晶显示装置为代表的电光装置，具有更高的生产率和产量，并且降低了制造成本，具体地说， 在光刻工艺中使用的光掩模的数量。 鉴于此目的，以透光基板设置透光部分，具有降低光强度的部分透光部分和遮光部分的方式形成的光掩模（多音光掩模）是 雇用。 此外，采用不需要在像素部分的源电极和漏电极图案化的蚀刻步骤和延伸到端子部分的源极布线的剥离方法。

公开(公告)号：US20110241008A1

公开(公告)日：2011-10-06

申请号：US13162791

申请日：2011-06-17

申请人： Shunpei YAMAZAKI ,  Satoshi MURAKAMI ,  Masahiko HAYAKAWA ,  Kiyoshi KATO ,  Mitsuaki OSAME ,  Takashi HIROSUE ,  Saishi FUJIKAWA

发明人： Shunpei YAMAZAKI ,  Satoshi MURAKAMI ,  Masahiko HAYAKAWA ,  Kiyoshi KATO ,  Mitsuaki OSAME ,  Takashi HIROSUE ,  Saishi FUJIKAWA

IPC分类号： H01L33/08

CPC分类号： H01L27/1244 ,  G02F1/136204 ,  H01L21/76804 ,  H01L21/76831 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/3244 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78621 ,  H01L29/78645 ,  H01L51/0037 ,  Y10S257/906 ,  Y10S257/908

摘要： A semiconductor display device with an interlayer insulating film in which surface levelness is ensured with a limited film formation time, heat treatment for removing moisture does not take long, and moisture in the interlayer insulating film is prevented from escaping into a film or electrode adjacent to the interlayer insulating film. A TFT is formed and then a nitrogen-containing inorganic insulating film that transmits less moisture compared to organic resin film is formed so as to cover the TFT. Next, organic resin including photosensitive acrylic resin is applied and an opening is formed by partially exposing the organic resin film to light. The organic resin film where the opening is foamed, is then covered with a nitrogen-containing inorganic insulating film which transmits less moisture than organic resin film does. Thereafter, the gate insulating film and the two layers of the nitrogen-containing inorganic insulating films are partially etched away in the opening of the organic resin film to expose the active layer of the TFT.

摘要翻译： 具有层间绝缘膜的半导体显示装置，其中以有限的成膜时间确保表面水平度，用于除去水分的热处理不需要很长时间，并且防止层间绝缘膜中的水分逸出到邻近的膜或电极 层间绝缘膜。 形成TFT，然后形成与有机树脂膜相比传递较少水分的含氮无机绝缘膜，以覆盖TFT。 接下来，施加包含感光性丙烯酸树脂的有机树脂，并通过将有机树脂膜部分地曝光而形成开口。 然后将开口发泡的有机树脂膜用含有无机绝缘膜覆盖，所述无机绝缘膜比有机树脂膜透湿少。 此后，在有机树脂膜的开口部分将栅极绝缘膜和含氮无机绝缘膜的两层部分地蚀刻掉，以暴露TFT的有源层。