公开(公告)号：US08665605B2

公开(公告)日：2014-03-04

申请号：US12552846

申请日：2009-09-02

申请人： Kuo-Hua Chen ,  Ming-Chiang Lee ,  Tsung-Hsun Lee ,  Chen-Chuan Fan

发明人： Kuo-Hua Chen ,  Ming-Chiang Lee ,  Tsung-Hsun Lee ,  Chen-Chuan Fan

IPC分类号： H05K7/00

CPC分类号： H05K1/0298 ,  H01L23/3128 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H05K1/0271 ,  H05K1/09 ,  H05K1/116 ,  H05K2201/09781

摘要： A substrate structure and a package structure using the same are provided. The substrate structure includes a number of traces, a substrate core and a number of first metal tiles. The substrate core has a first surface and a second surface opposite to the first surface. The first metal tiles are disposed on one of the first surface and the second surface, the minimum pitch between adjacent two of the first metal tiles is the minimum process pitch.

摘要翻译： 提供了使用其的基板结构和封装结构。 衬底结构包括许多迹线，衬底芯和多个第一金属片。 衬底芯具有与第一表面相对的第一表面和第二表面。 第一金属瓦片设置在第一表面和第二表面中的一个上，相邻的第二金属瓦片之间的最小间距是最小的处理间距。

公开(公告)号：US20100206622A1

公开(公告)日：2010-08-19

申请号：US12552846

申请日：2009-09-02

申请人： Kuo-Hua Chen ,  Ming-Chiang Lee ,  Tsung-Hsun Lee ,  Chen-Chuan Fan

发明人： Kuo-Hua Chen ,  Ming-Chiang Lee ,  Tsung-Hsun Lee ,  Chen-Chuan Fan

IPC分类号： H05K1/09 ,  H05K1/00 ,  H05K1/16

CPC分类号： H05K1/0298 ,  H01L23/3128 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H05K1/0271 ,  H05K1/09 ,  H05K1/116 ,  H05K2201/09781

摘要： A substrate structure and a package structure using the same are provided. The substrate structure includes a number of traces, a substrate core and a number of first metal tiles. The substrate core has a first surface and a second surface opposite to the first surface. The first metal tiles are disposed on one of the first surface and the second surface, the minimum pitch between adjacent two of the first metal tiles is the minimum process pitch.

摘要翻译： 提供了使用其的基板结构和封装结构。 衬底结构包括许多迹线，衬底芯和多个第一金属片。 衬底芯具有与第一表面相对的第一表面和第二表面。 第一金属瓦片设置在第一表面和第二表面中的一个上，相邻的第二金属瓦片之间的最小间距是最小的处理间距。

公开(公告)号：US08378466B2

公开(公告)日：2013-02-19

申请号：US12622393

申请日：2009-11-19

申请人： Chi-Tsung Chiu ,  Kuo-Hsien Liao ,  Wei-Chi Yih ,  Yu-Chi Chen ,  Chen-Chuan Fan

发明人： Chi-Tsung Chiu ,  Kuo-Hsien Liao ,  Wei-Chi Yih ,  Yu-Chi Chen ,  Chen-Chuan Fan

IPC分类号： H01L23/552 ,  H01L39/00 ,  H01L23/58 ,  H01L23/62

CPC分类号： H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/552 ,  H01L24/19 ,  H01L24/96 ,  H01L2221/68359 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01052 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19041 ,  H01L2924/3025

摘要： Described herein are wafer-level semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes: (1) a semiconductor device; (2) a package body covering lateral surfaces of the semiconductor device, a lower surface of the package body and a lower surface of the semiconductor device defining a front surface; (3) a set of redistribution layers disposed adjacent to the front surface, the set of redistribution layers including a grounding element that includes a connection surface electrically exposed adjacent to at least one lateral surface of the set of redistribution layers; and (4) an EMI shield disposed adjacent to the package body and electrically connected to the connection surface of the grounding element. The grounding element provides an electrical pathway to ground electromagnetic emissions incident upon the EMI shield.

摘要翻译： 这里描述的是具有EMI屏蔽和相关方法的晶片级半导体器件封装。 在一个实施例中，半导体器件封装包括：（1）半导体器件; （2）覆盖半导体器件的侧表面的封装体，封装体的下表面和限定前表面的半导体器件的下表面; （3）一组邻近前表面设置的再分配层，该重新分布层包括接地元件，该接地元件包括与该再分配层组的至少一个侧表面相邻地电暴露的连接表面; 和（4）邻近封装主体设置并电连接到接地元件的连接表面的EMI屏蔽层。 接地元件提供入射到EMI屏蔽上的接地电磁辐射的电路。

公开(公告)号：US08212339B2

公开(公告)日：2012-07-03

申请号：US12770645

申请日：2010-04-29

申请人： Kuo-Hsien Liao ,  Jian-Cheng Chen ,  Chen-Chuan Fan ,  Chi-Tsung Chiu ,  Chih-Pin Hung

发明人： Kuo-Hsien Liao ,  Jian-Cheng Chen ,  Chen-Chuan Fan ,  Chi-Tsung Chiu ,  Chih-Pin Hung

IPC分类号： H01L23/552 ,  H01L21/78

CPC分类号： H01L23/552 ,  H01L21/6835 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2221/68331 ,  H01L2224/16225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/0401

摘要： Described herein are semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes a grounding element disposed adjacent to a periphery of a substrate unit and at least partially extending between an upper surface and a lower surface of the substrate unit. The grounding element includes an indented portion that is disposed adjacent to a lateral surface of the substrate unit. The semiconductor device package also includes an EMI shield that is electrically connected to the grounding element and is inwardly recessed adjacent to the indented portion of the grounding element.

摘要翻译： 这里描述的是具有EMI屏蔽和相关方法的半导体器件封装。 在一个实施例中，半导体器件封装包括邻近衬底单元的周边设置并至少部分地在衬底单元的上表面和下表面之间延伸的接地元件。 接地元件包括与衬底单元的侧表面相邻设置的凹入部分。 半导体器件封装还包括EMI屏蔽，其电连接到接地元件并且与接地元件的凹入部分相邻地向内凹陷。

公开(公告)号：US20110115060A1

公开(公告)日：2011-05-19

申请号：US12622393

申请日：2009-11-19

申请人： Chi-Tsung Chiu ,  Kuo-Hsien Liao ,  Wei-Chi Yih ,  Yui-Chi Chen ,  Chen-Chuan Fan

发明人： Chi-Tsung Chiu ,  Kuo-Hsien Liao ,  Wei-Chi Yih ,  Yui-Chi Chen ,  Chen-Chuan Fan

IPC分类号： H01L23/552 ,  H01L21/56

CPC分类号： H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/552 ,  H01L24/19 ,  H01L24/96 ,  H01L2221/68359 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01052 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19041 ,  H01L2924/3025

摘要： Described herein are wafer-level semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes: (1) a semiconductor device; (2) a package body covering lateral surfaces of the semiconductor device, a lower surface of the package body and a lower surface of the semiconductor device defining a front surface; (3) a set of redistribution layers disposed adjacent to the front surface, the set of redistribution layers including a grounding element that includes a connection surface electrically exposed adjacent to at least one lateral surface of the set of redistribution layers; and (4) an EMI shield disposed adjacent to the package body and electrically connected to the connection surface of the grounding element. The grounding element provides an electrical pathway to ground electromagnetic emissions incident upon the EMI shield.

摘要翻译： 这里描述的是具有EMI屏蔽和相关方法的晶片级半导体器件封装。 在一个实施例中，半导体器件封装包括：（1）半导体器件; （2）覆盖半导体器件的侧表面的封装体，封装体的下表面和限定前表面的半导体器件的下表面; （3）一组邻近前表面设置的再分配层，该重新分布层包括接地元件，该接地元件包括与该再分配层组的至少一个侧表面相邻地电暴露的连接表面; 和（4）邻近封装主体设置并电连接到接地元件的连接表面的EMI屏蔽层。 接地元件提供入射到EMI屏蔽上的接地电磁辐射的电路。

公开(公告)号：US20100207259A1

公开(公告)日：2010-08-19

申请号：US12770645

申请日：2010-04-29

申请人： Kuo-Hsien Liao ,  Jian-Cheng Chen ,  Chen-Chuan Fan ,  Chi-Tsung Chiu ,  Chih-Pin Hung

发明人： Kuo-Hsien Liao ,  Jian-Cheng Chen ,  Chen-Chuan Fan ,  Chi-Tsung Chiu ,  Chih-Pin Hung

IPC分类号： H01L23/552 ,  H01L21/78

CPC分类号： H01L23/552 ,  H01L21/6835 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2221/68331 ,  H01L2224/16225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/0401

摘要： Described herein are semiconductor device packages with EMI shielding and related methods. In one embodiment, a semiconductor device package includes a grounding element disposed adjacent to a periphery of a substrate unit and at least partially extending between an upper surface and a lower surface of the substrate unit. The grounding element includes an indented portion that is disposed adjacent to a lateral surface of the substrate unit. The semiconductor device package also includes an EMI shield that is electrically connected to the grounding element and is inwardly recessed adjacent to the indented portion of the grounding element.

摘要翻译： 这里描述的是具有EMI屏蔽和相关方法的半导体器件封装。 在一个实施例中，半导体器件封装包括邻近衬底单元的周边设置并至少部分地在衬底单元的上表面和下表面之间延伸的接地元件。 接地元件包括与衬底单元的侧表面相邻设置的凹入部分。 半导体器件封装还包括EMI屏蔽，其电连接到接地元件并且与接地元件的凹入部分相邻地向内凹陷。

公开(公告)号：US20100184255A1

公开(公告)日：2010-07-22

申请号：US12550959

申请日：2009-08-31

申请人： Chien LIU ,  Wen-Yuen Chuang ,  Chung-Yao Kao ,  Tsang-Hung Ou ,  Chih-Huang Chang ,  Wei-Chi Yih ,  Chen-Chuan Fan

发明人： Chien LIU ,  Wen-Yuen Chuang ,  Chung-Yao Kao ,  Tsang-Hung Ou ,  Chih-Huang Chang ,  Wei-Chi Yih ,  Chen-Chuan Fan

IPC分类号： H01L21/56

CPC分类号： H01L21/561 ,  H01L23/3114 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2224/0401

摘要： A manufacturing method for package structure is provided. The manufacturing method includes the follow steps. Firstly, a substrate is provided. Next, a number of chips are provided. Then, the chips are electrically connected with the substrate. After that, the chips are encapsulated with a sealant, so that the chips and the substrate form a package. Then, the package is adhered by a vacuum force. Afterwards, the adhered package is singulated to form many package structures along the portion between adjacent two of airways.

摘要翻译： 提供一种封装结构的制造方法。 制造方法包括以下步骤。 首先，提供基板。 接下来，提供多个芯片。 然后，芯片与衬底电连接。 之后，用密封剂封装芯片，使得芯片和基板形成封装。 然后，通过真空力附着包装。 之后，将附着的包装物沿着相邻的两个气道之间的部分分开形成许多包装结构。