摘要:
The present invention relates to an image sensor module and a manufacturing method thereof, especially to a wafer level chip size package (WL-CSP) realized by directly contacting an image sensor chip wafer to a glass wafer on which an IR filter coating layer is deposited, an electrode rearrangement and a dicing process, a miniaturized image sensor module using this wafer level chip size package (WL-CSP) and a method thereof. The CMOS image sensor module using a wafer level chip size package technology according to the present invention comprises: an image sensor chip wafer having a partition with a lattice structure formed at portions except an image sensing area; and a glass wafer with an IR filter coating layer and a metal electrode; and wherein the image sensor chip wafer and the glass wafer form an electric contact and a chip sealing by a flip-chip bonding; and wherein a solder bump and a non solder bump are formed after a metal wiring is rearranged on a lower surface of the glass wafer. According to the present invention, it is possible to realize a cheap wafer level chip size package (WL-CSP) using the existing wafer processing and the metal deposition processing equipments. Further, an image sensor module with smaller thickness and area than the existing CSP package can be realized. Moreover, an image sensor module with a smaller area than the existing COG package can be realized.
摘要:
The present invention relates to an image sensor module and a manufacturing method thereof, especially to a wafer level chip size package (WL-CSP) realized by directly contacting an image sensor chip wafer to a glass wafer on which an IR filter coating layer is deposited, an electrode rearrangement and a dicing process, a miniaturized image sensor module using this wafer level chip size package (WL-CSP) and a method thereof. The CMOS image sensor module using a wafer level chip size package technology according to the present invention comprises: an image sensor chip wafer having a partition with a lattice structure formed at portions except an image sensing area; and a glass wafer with an IR filter coating layer and a metal electrode; and wherein the image sensor chip wafer and the glass wafer form an electric contact and a chip sealing by a flip-chip bonding; and wherein a solder bump and a non solder bump are formed after a metal wiring is rearranged on a lower surface of the glass wafer. According to the present invention, it is possible to realize a cheap wafer level chip size package (WL-CSP) using the existing wafer processing and the metal deposition processing equipments. Further, an image sensor module with smaller thickness and area than the existing CSP package can be realized. Moreover, an image sensor module with a smaller area than the existing COG package can be realized.
摘要:
Disclosed is a wafer level chip size package for an image sensor module and a manufacturing method thereof, more particularly to a small size image sensor module characterized by a structure where a glass formed with an I/R cut-off filter (layer) is assembled onto an image sensor chip by a polymer partition wall and a solder bump is formed on an electrode of the rear side of a chip connected by a through-hole formed on each I/O electrode of an image sensor chip and a wafer level chip size package process for realizing the module. The method for manufacturing a wafer level chip size package for an image sensor module, the method comprises: bonding an image sensor wafer glass and a glass wafer to form a through-hole on the image sensor wafer; filling the through-hole formed on the image sensor wafer with an exciting material; and forming a solder bump at the end of the exciting material to be connected with the circuit formed PCB substrate. According to the present invention, the existing equipments for wafer processing and metal deposition are used. Therefore, it is possible to realize a cost-effective wafer level chip size package and an image sensor module having the minimum thickness in a thickness direction than the existing wafer level chip size package for image sensor and the same area as an image sensor chip.
摘要:
The method of the present invention comprises the steps of: providing an IC chip having I/O pads, each having a non-solder bump such as Au or Cu stud bump or Ni\Cu\Au bump formed thereon, and a substrate having metal electrodes formed thereon; applying a film-type non-conductive adhesive (NCA) to the chip or substrate, the adhesive including solid-phase bisphenol A type epoxy resin, liquid-phase bisphenol F type epoxy resin, solid-phase phenoxy resin, methylethylketone/toluene solvent, liquid-phase hardener, and non-conductive particles; and thermo-compressing the IC chip to the substrate so that the non-solder bump and the metal electrode can be mechanically and electrically connected. The NCA of the present invention has high reliability since it has lower thermal expansion coefficient and dielectric constant than conventional NCAs and has excellent mechanical and electrical characteristics. In addition, the NCA can be effectively selected at need and applied to diverse processes since it can be made to a form of paste rather than film. The method of the present invention is harmless to the environment since it does not employ conventional solder bumps using solder as a chief ingredient.