公开(公告)号：US08972776B2

公开(公告)日：2015-03-03

申请号：US13788303

申请日：2013-03-07

Applicant: LSI Corporation

Inventor： Leonid Baryudin ,  Alex G. Tang ,  Earl T. Cohen

IPC: G06F11/00 ,  G06F12/02 ,  G06F11/07

CPC classification number: G06F12/0246 ,  G06F11/0793 ,  G06F11/1008 ,  G06F12/02 ,  G06F2211/109 ,  G06F2212/7205 ,  G11C16/3418 ,  G11C29/82 ,  G11C2029/0409 ,  G11C2029/0411

Abstract: An apparatus includes a non-volatile memory and a controller. The non-volatile memory includes a plurality of R-blocks. The controller is coupled to the non-volatile memory. The controller is configured to (i) write data using the R-blocks as a unit of allocation and (ii) perform recycling operations selectively on either an entire one of the R-blocks or a portion less than all of one of the R-blocks.

Abstract translation: 一种装置包括非易失性存储器和控制器。 非易失性存储器包括多个R块。 控制器耦合到非易失性存储器。 控制器被配置为（i）使用R块作为分配单元来写入数据，以及（ii）选择性地在R块中的整个R块或小于全部R块中的一部分执行再循环操作 块。

公开(公告)号：US20140281767A1

公开(公告)日：2014-09-18

申请号：US13804495

申请日：2013-03-14

Applicant: LSI CORPORATION

Inventor： AbdelHakim S. Alhussien ,  Erich F. Haratsch ,  Earl T. Cohen ,  Yunxiang Wu

IPC: G06F11/10 ,  G11C29/50

CPC classification number: G06F11/1048 ,  G06F11/1072 ,  G11C16/34 ,  G11C16/3404 ,  G11C29/52 ,  H03M13/458

Abstract: A method for applying a sequence of sensing/read reference voltages in a read channel includes (A) setting a read window based on an estimate of a read channel, (B) setting first, second, and third values of a sequence of sensing voltages to values corresponding to different ones of (i) a left-hand limit of the read window, (ii) a right-hand limit of the read window; and (iii) a point central to the read window, (C) determining whether first, second and third reads are successful, and (D) if the first, second and third reads are not successful, setting fourth and fifth values of the sequence of sensing voltages to values corresponding to different ones of (i) a point between the left-hand limit and the point central to the read window and (ii) a point between the right-hand limit and the point central to the read window.

Abstract translation: 在读通道中应用感测/读取参考电压序列的方法包括（A）基于读通道的估计设置读窗口，（B）设置感测电压序列的第一，第二和第三值 对应于（i）读取窗口的左侧限制的不同值的值，（ii）读取窗口的右侧限制; 和（iii）读取窗口中心的点，（C）确定第一，第二和第三读取是否成功，以及（D）如果第一，第二和第三读取不成功，则设置序列的第四和第五值 感测电压到对应于（i）左侧极限与读取窗口中心点之间的点的值相对应的值，以及（ii）右侧极限与读取窗口中心点之间的点。

公开(公告)号：US20140237162A1

公开(公告)日：2014-08-21

申请号：US13768215

申请日：2013-02-15

Applicant: LSI CORPORATION

Inventor： Christopher Brewer ,  Earl T. Cohen

IPC: G06F12/02

CPC classification number: G06F3/0613 ,  G06F3/0659 ,  G06F3/0688 ,  G06F9/38 ,  G06F12/0246 ,  G06F13/1694 ,  G06F13/385 ,  G11C5/04

Abstract: A system includes a control processor, a non-volatile memory device interface, and a micro-sequencer. The control processor may be configured to receive commands and send responses via a command interface. The non-volatile memory device interface may be configured to couple the system to one or more non-volatile memory devices. The micro-sequencer is generally coupled to (i) the control processor and (ii) the non-volatile memory device interface. The micro-sequencer includes a control store readable by the micro-sequencer and writable by the control processor. In response to receiving a particular one of the commands, the control processor is enabled to cause the micro-sequencer to begin executing at a location in the control store according to the particular command and the micro-sequencer is enabled to perform at least a portion of the particular command according to a protocol of the one or more non-volatile memory devices coupled to the non-volatile memory device interface.

Abstract translation: 系统包括控制处理器，非易失性存储器件接口和微定序器。 控制处理器可以被配置为经由命令接口接收命令并发送响应。 非易失性存储器设备接口可以被配置为将系统耦合到一个或多个非易失性存储器设备。 微定序器通常耦合到（i）控制处理器和（ii）非易失性存储器件接口。 微定序器包括可由微定序器读取并由控制处理器写入的控制存储器。 响应于接收到特定的一个命令，控制处理器能够使得微定序器根据特定命令开始在控制存储器中的一个位置执行，并且微定序器能够执行至少一部分 根据耦合到非易失性存储器设备接口的一个或多个非易失性存储器件的协议来执行特定命令。

公开(公告)号：US20140208003A1

公开(公告)日：2014-07-24

申请号：US14055336

申请日：2013-10-16

Applicant: LSI Corporation

Inventor： Earl T. Cohen

IPC: G06F12/02

CPC classification number: G06F12/1009 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0659 ,  G06F3/0661 ,  G06F3/0679 ,  G06F11/1068 ,  G06F12/02 ,  G06F12/0246 ,  G06F12/0292 ,  G06F12/04 ,  G06F12/10 ,  G06F2212/2022 ,  G06F2212/401 ,  G06F2212/7201 ,  G06F2212/7202 ,  G11C16/08 ,  G11C29/04 ,  G11C29/52

Abstract: A method for using a variable-size flash transition layer is disclosed. Step (A) receives a read request to read data corresponding to a logical block address from a nonvolatile memory. Step (B) reads a particular entry of a map to obtain (i) a physical address of a particular page of the nonvolatile memory, (ii) an offset in the particular page to compressed data previously stored and (iii) a length of the compressed data. The particular entry is associated with the logical block address. Step (C) converts the offset and the length to (i) an address of a given read unit in the particular page and (ii) a number of the read units to be read. Step (D) reads from the particular page at most the number of the read units starting from the given read unit. An offset and length granularity are finer than one read unit.

Abstract translation: 公开了一种使用可变尺寸闪光过渡层的方法。 步骤（A）从非易失性存储器接收读取对应于逻辑块地址的数据的读取请求。 步骤（B）读取地图的特定条目以获得（i）非易失性存储器的特定页面的物理地址，（ii）特定页面中的偏移量与先前存储的压缩数据，以及（iii） 压缩数据。 特定条目与逻辑块地址相关联。 步骤（C）将偏移和长度转换为（i）特定页面中的给定读取单元的地址，以及（ii）要读取的读取单元的数量。 步骤（D）从特定页面读取至多从给定读取单元开始的读取单元的数量。 偏移和长度粒度比一个读取单元更精细。

公开(公告)号：US20140164881A1

公开(公告)日：2014-06-12

申请号：US13804671

申请日：2013-03-14

Applicant: LSI CORPORATION

Inventor： Zhengang Chen ,  Earl T. Cohen ,  Jeremy Werner ,  Erich F. Haratsch

IPC: G06F11/10

CPC classification number: G06F11/1068 ,  G06F11/1666 ,  G06F11/20 ,  G11C16/00 ,  G11C29/028 ,  G11C29/52 ,  G11C2029/0409 ,  G11C2029/0411

Abstract: An apparatus includes a non-volatile memory and a controller. The controller is operatively coupled to the non-volatile memory and configured to perform read and write operations on the non-volatile memory using codewords as a unit of read access. The controller includes an error correction engine configured to perform an error correction on codewords read from the non-volatile memory, and, if the error correction fails, to perform one or more retry procedures. The controller is further configured to perform one or more background procedures as a result of the error correction or one or more of the retry procedures not being successful and send an error message as a result of all of the retry procedures not being successful. The one or more background procedures are directed to determining a cause of the error correction failure.

Abstract translation: 一种装置包括非易失性存储器和控制器。 控制器可操作地耦合到非易失性存储器并且被配置为使用作为读取访问的单元的码字来对非易失性存储器执行读取和写入操作。 所述控制器包括错误校正引擎，其被配置为对从所述非易失性存储器读取的码字执行错误校正，并且如果所述错误校正失败，则执行一个或多个重试过程。 控制器还被配置为作为纠错的结果执行一个或多个后台过程，或者一个或多个重试过程不成功，并且由于所有重试过程不成功而发送错误消息。 一个或多个背景程序涉及确定纠错失败的原因。

公开(公告)号：US20140047170A1

公开(公告)日：2014-02-13

申请号：US14022781

申请日：2013-09-10

Applicant: LSI Corporation

Inventor： Earl T. Cohen ,  Leonid Baryudin

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7205

Abstract: Described embodiments provide a media controller that processes requests including a logical address and address range. A map of the media controller determines physical addresses of a media associated with the logical address and address range of the request. The map is a multi-level map having a plurality of leaf-level map pages that are stored in the media, with a subset of the leaf-level map pages stored in a map cache. Based on the logical address and address range, it is determined whether a corresponding leaf-level map page is stored in the map cache. If the leaf-level map page is stored in the map cache, a cache index and control indicators of the map cache entry are returned in order to enforce ordering rules that selectively enable access to a corresponding leaf-level map page based on the control indicators and a determined request type.

Abstract translation: 描述的实施例提供了处理包括逻辑地址和地址范围的请求的媒体控制器。 媒体控制器的映射表确定与请求的逻辑地址和地址范围相关联的媒体的物理地址。 该地图是具有存储在媒体中的多个叶级别地图页面的多级地图，叶级地图页面的子集存储在地图高速缓存中。 基于逻辑地址和地址范围，确定对应的叶级别地图页是否存储在地图高速缓存中。 如果叶级地图页面存储在地图高速缓存中，则返回地图高速缓存条目的高速缓存索引和控制指示符，以便强制执行排序规则，以便基于控制指示器有选择地启用对相应叶级别地图页面的访问 和确定的请求类型。

公开(公告)号：US09021332B2

公开(公告)日：2015-04-28

申请号：US13798864

申请日：2013-03-13

Applicant: LSI Corporation

Inventor： Erich F. Haratsch ,  Jeremy Werner ,  Zhengang Chen ,  Earl T. Cohen ,  Yunxiang Wu ,  Ning Chen

IPC: G11C29/00 ,  G06F11/10 ,  H03M13/37 ,  H03M13/00 ,  H03M13/11 ,  H03M13/39 ,  H03M13/41

CPC classification number: G06F11/1068 ,  G06F11/1012 ,  G11C29/52 ,  H03M13/1102 ,  H03M13/1108 ,  H03M13/1111 ,  H03M13/3707 ,  H03M13/3905 ,  H03M13/41 ,  H03M13/45 ,  H03M13/6561

Abstract: An apparatus having a circuit and one or more processor is disclosed. The circuit is configured to receive a codeword from a memory. The memory is nonvolatile. The codeword generally has one or more errors. The processors are configured to generate read data by decoding the codeword repeatedly. The decoding includes a soft-decision decoding that uses a plurality of parameters calculated by (i) a first procedure, (ii) a second procedure in response to a plurality of failures of the decoding to converge using the first procedure and (iii) a third procedure in response to another failure of the decoding to converge using the second procedure.

Abstract translation: 公开了一种具有电路和一个或多个处理器的装置。 电路被配置为从存储器接收码字。 存储器是非易失性的。 码字通常具有一个或多个错误。 处理器被配置为通过重复地解码码字来生成读取数据。 解码包括软判决解码，其使用通过（i）第一过程计算的多个参数，（ii）响应于解码的多个故障使用第一过程收敛的第二过程，以及（iii） 响应于使用第二过程的解码收敛的另一个故障的第三过程。

公开(公告)号：US20140258587A1

公开(公告)日：2014-09-11

申请号：US13796264

申请日：2013-03-12

Applicant: LSI CORPORATION

Inventor： Leonid Baryudin ,  Earl T. Cohen ,  Alex G. Tang

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7209

Abstract: An apparatus having a nonvolatile memory and a controller. The memory stores information in multiple pages. The information includes data units and headers. Each data unit is associated with a respective identifier in an address space of the apparatus and a respective location in the memory, has a respective header having the respective identifier, and is associated with a respective time stamp. Multiple headers include ones of the time stamps. The controller is configured to (i) read information stored in the pages, (ii) determine an order in which the data units were written based on the time stamps, (iii) locate based on the order (a) each last-written occurrence of the respective identifiers and (b) the respective locations of the data units associated with the last-written occurrences, and (iv) rebuild a map of the controller according to the respective locations of each last-written occurrence of each respective identifier.

Abstract translation: 一种具有非易失性存储器和控制器的装置。 内存将信息存储在多个页面中。 信息包括数据单元和标题。 每个数据单元与设备的地址空间中的相应标识符相关联，并且存储器中的相应位置具有相应标题，并且与相应的时间戳相关联。 多个标题包括时间戳中的一个。 控制器被配置为（i）读取存储在页面中的信息，（ii）基于时间戳确定写入数据单元的顺序，（iii）基于顺序（a）每个最后写入的事件 和（b）与最后写入的事件相关联的数据单元的相应位置，以及（iv）根据每个相应标识符的每个最后写入的发生的相应位置来重建控制器的映射。

公开(公告)号：US20140208046A1

公开(公告)日：2014-07-24

申请号：US13748260

申请日：2013-01-23

Applicant: LSI CORPORATION

Inventor： Leonid Baryudin ,  Earl T. Cohen

IPC: G06F12/12 ,  G06F12/02

CPC classification number: G11C16/00 ,  G06F3/0605 ,  G06F3/0644 ,  G06F3/0679 ,  G06F11/20 ,  G06F12/0246

Abstract: Described embodiments detect an impending out-of-space (OOS) condition of a media. On startup, a media controller determines whether an impending OOS indicator is set from a previous startup. If the impending OOS indicator is not set, it is determined whether a free pool size has reached a threshold. The free pool is blocks of the solid-state media available to be written with data. If the free pool size has not reached the first threshold, while the startup time is less than a maximum startup time, garbage collection is performed on the solid-state media to accumulate blocks to the free pool. If the startup time reaches the maximum startup time and the free pool size has not reached the threshold, the impending OOS indicator is set and the media is operated in impending OOS mode. Otherwise, if the free pool size reaches the threshold, the media is operated in normal mode.

Abstract translation: 描述的实施例检测媒体的即将消失的空间（OOS）状况。 在启动时，媒体控制器确定是否从先前的启动设置即将发生的OOS指示符。 如果即将发生的OOS指示符未设置，则确定空闲池大小是否达到阈值。 可用池是可用数据写入的固态媒体块。 如果可用池大小尚未达到第一个阈值，而启动时间小于最大启动时间，则在固态介质上执行垃圾收集，以将块累积到可用池。 如果启动时间达到最大启动时间，可用池大小尚未达到阈值，则即将发生的OOS指示灯设置，媒体即将进入OOS模式。 否则，如果空闲池大小达到阈值，介质将以正常模式运行。

公开(公告)号：US20140208004A1

公开(公告)日：2014-07-24

申请号：US14060799

申请日：2013-10-23

Applicant: LSI Corporation

Inventor： Earl T. Cohen ,  Sumit Puri

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F3/064 ,  G06F12/121 ,  G06F2212/401 ,  G06F2212/7201 ,  Y02D10/13

Abstract: A method for using a partitioned flash transition layer is disclosed. Step (A) receives, at an apparatus from a host, a write command having first write data. Step (B) generates second write data by compressing the first write data in the apparatus. The second write data generally has a variable size. Step (C) stores the second write data at a physical location in a nonvolatile memory. The physical location is a next unwritten location. Step (D) returns, from the apparatus to the host in response to the write command, an indication of the physical location.

Abstract translation: 公开了一种使用分隔闪光过渡层的方法。 步骤（A）在主机的装置处接收具有第一写入数据的写命令。 步骤（B）通过压缩装置中的第一写入数据来产生第二写入数据。 第二写入数据通常具有可变大小。 步骤（C）将第二写入数据存储在非易失性存储器中的物理位置处。 物理位置是下一个不成文的位置。 响应于写入命令，步骤（D）从设备返回到主机，指示物理位置。