Structure and method for fabricating dielectric resonator
    2.
    发明申请
    Structure and method for fabricating dielectric resonator 审中-公开
    制造介质谐振器的结构和方法

    公开(公告)号:US20020179935A1

    公开(公告)日:2002-12-05

    申请号:US09865429

    申请日:2001-05-29

    Applicant: MOTOROLA, INC.

    Inventor: James S. Irwin

    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. A portion of the accommodating buffer layer may be used to form a dielectric for a dielectric resonance. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials. The use of monocrystalline dielectric material as an overlying layer is disclosed to facilitate the fabrication of on chip high frequency communications devices such as dielectric resonators with direct interface to compound semiconductor material in the integrated circuit. The provision of on chip resonators through the use of dielectric material in the form of a monocrystalline layer facilitates high frequency communications circuits on a single integrated circuit that may include materials such as thin film crystalline materials used as resonators including dielectric resonators.

    Abstract translation: 通过形成用于生长单晶层的柔性衬底,可以将单晶材料的高质量外延层生长在覆盖单晶衬底(例如大硅晶片)上。 实现顺应性衬底的形成的一种方式包括首先在硅晶片上生长容纳缓冲层。 容纳缓冲层是通过氧化硅的非晶界面层与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 容纳缓冲层与下面的硅晶片和上覆的单晶材料层晶格匹配。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。 容纳缓冲层的一部分可以用于形成用于介电共振的电介质。 此外,顺应性衬底的形成可以包括利用表面活性剂增强的外延,将单晶硅外延生长到单晶氧化物上,以及Zintl相材料的外延生长。 公开了使用单晶电介质材料作为覆盖层,以促进片上高频通信设备的制造,例如与集成电路中的化合物半导体材料直接接口的介质谐振器。 通过使用单晶层形式的介电材料来提供片上谐振器有助于单个集成电路上的高频通信电路,其可以包括诸如用作包括介质谐振器的谐振器的薄膜晶体材料的材料。

    Apparatus for generating an oscillating reference signal and method of manufacture therefore
    3.
    发明申请
    Apparatus for generating an oscillating reference signal and method of manufacture therefore 审中-公开
    因此,用于产生振荡参考信号的装置和制造方法

    公开(公告)号:US20020181915A1

    公开(公告)日:2002-12-05

    申请号:US09870833

    申请日:2001-06-01

    Applicant: MOTOROLA, INC.

    Abstract: An apparatus for generating an oscillating reference signal at a reference frequency includes: (a) a light conveying element having a first end and a second end; the light conveying element conveying substantially all light received or reflected at one end to the other end; the light conveying element having a light transmission path intermediate the first end and the second end; the transmission path being related to the reference frequency; (b) a light transmitting element oriented to introduce light into the light conveying element at one end of the light conveying element; and (c) a light receiving element oriented to receive the transmitted light at one end of the light conveying element. The light conveying element, the light transmitting element and the light receiving element are implemented in a monolithic structure arranged on a single substrate.

    Abstract translation: 用于产生参考频率的振荡参考信号的装置包括:(a)具有第一端和第二端的光传输元件; 所述光传送元件基本上将在一端接收或反射的所有光传送到另一端; 光传输元件具有在第一端和第二端之间的光传输路径; 所述传输路径与所述参考频率相关; (b)光传输元件,其定向成将光引入光传输元件的一端; 以及(c)光接收元件,其定向成在所述光输送元件的一端处接收透射光。 光输送元件,透光元件和光接收元件以布置在单个基板上的整体结构来实现。

    Structure and method for fabricating high Q varactor diodes
    4.
    发明申请
    Structure and method for fabricating high Q varactor diodes 审中-公开
    制造高Q变容二极管的结构和方法

    公开(公告)号:US20020179957A1

    公开(公告)日:2002-12-05

    申请号:US09865447

    申请日:2001-05-29

    Applicant: MOTOROLA, INC.

    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer includes a layer of conductive metallic oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. A diode is formed on the overlying monocrystalline material layer, which is a gallium arsenide layer. Optionally, the accommodating buffer layer may include a non-conductive oxide layer on the conductive metallic oxide layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.

    Abstract translation: 通过形成用于生长单晶层的柔性衬底,可以将单晶材料的高质量外延层生长在覆盖单晶衬底(例如大硅晶片)上。 实现顺应性衬底的形成的一种方式包括首先在硅晶片上生长容纳缓冲层。 容纳缓冲层包括通过氧化硅的非晶界面层与硅晶片间隔开的导电金属氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 容纳缓冲层与下面的硅晶片和上覆的单晶材料层晶格匹配。 在作为砷化镓层的上覆单晶材料层上形成二极管。 可选地,容纳缓冲层可以在导电金属氧化物层上包括非导电氧化物层。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。 此外,顺应性衬底的形成可以包括利用表面活性剂增强的外延,将单晶硅外延生长到单晶氧化物上,以及Zintl相材料的外延生长。

    Composite semiconductor structure and device with optical testing elements
    5.
    发明申请
    Composite semiconductor structure and device with optical testing elements 审中-公开
    复合半导体结构和器件与光学测试元件

    公开(公告)号:US20020179930A1

    公开(公告)日:2002-12-05

    申请号:US09870835

    申请日:2001-06-01

    Applicant: MOTOROLA, INC.

    CPC classification number: G01R31/311

    Abstract: A composite semiconductor structure includes islands of noncompound semiconductor materials formed on a noncompound substrate, and an optical testing structure. In one embodiment, a scan chain runs through the noncompound substrate (and possibly also through the islands) and terminates in the islands at optical interface elements, one of which is an optical emitter and the other of which is an optical detector. A test device inputs test signals to, and reads test signals from, the scan chain by interfacing optically with the optical interface elements. In another embodiment, an optical detector is formed in the silicon substrate and an optical emitter is formed in the compound semiconductor material. A leaky waveguide communicating with the emitter overlies the detector, and detection by the detector of light emitted by the emitter is an indication of the absence of an intended circuit element between the detector and the leaky side of the waveguide.

    Abstract translation: 复合半导体结构包括形成在非复合衬底上的非复合半导体材料岛和光学测试结构。 在一个实施例中,扫描链穿过非复合衬底(并且可能还穿过岛)并终止在光学界面元件处的岛中,其中一个是光发射器,另一个是光学检测器。 测试设备通过与光学接口元件光学接口输入测试信号,并从扫描链中读取测试信号。 在另一个实施例中,在硅衬底中形成光学检测器,并且在化合物半导体材料中形成光发射器。 与发射器连通的泄漏波导覆盖在检测器上,并且由发射器发射的光的检测器的检测是在检测器和波导的泄漏侧之间不存在预期电路元件的指示。

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