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    Vehicle electronic system and vehicle
    1.
    发明授权
    Vehicle electronic system and vehicle 失效
    车辆电子系统和车辆

    公开(公告)号：US08150578B2

    公开(公告)日：2012-04-03

    申请号：US12335984

    申请日：2008-12-16

    申请人： Makoto Saen ,  Kenichi Osada ,  Shigeru Oho

    发明人： Makoto Saen ,  Kenichi Osada ,  Shigeru Oho

    IPC分类号： G06F7/00

    CPC分类号： G07C5/0816

    摘要： In a vehicle electronic system including a plurality of LSI boards, LSIS which cannot control a user interface such as image or audio directly issue a command for notifying a vehicle occupant of its own information via networks and an information control LSI receives the request to output a message. A mechanism for setting priority of processings regarding LSI status information notification to be lower than that of an apparatus control processing is provided in each of LSIs and networks so that real-time property of the apparatus control processing is maintained. In order to reduce network load regarding the LSI status information notification, a message content itself is stored in a memory in a vehicle information processing unit previously so that only an ID for identifying the message content is transmitted.

    摘要翻译： 在包括多个LSI板的车载电子系统中，无法控制诸如图像或音频的用户界面的LSIS直接发出用于通过网络通知车辆乘客自己的信息的命令，并且信息控制LSI接收输出 信息。 在LSI和网络的每一个中设置有用于将关于LSI状态信息通知的处理的优先级设置为低于设备控制处理的优先级的机制，从而保持设备控制处理的实时性。 为了减少关于LSI状态信息通知的网络负载，消息内容本身预先存储在车辆信息处理单元中的存储器中，从而仅发送用于识别消息内容的ID。

    VEHICLE ELECTRONIC SYSTEM AND VEHICLE
    2.
    发明申请
    VEHICLE ELECTRONIC SYSTEM AND VEHICLE 失效
    车辆电子系统和车辆

    公开(公告)号：US20090157252A1

    公开(公告)日：2009-06-18

    申请号：US12335984

    申请日：2008-12-16

    申请人： Makoto Saen ,  Kenichi Osada ,  Shigeru Oho

    发明人： Makoto Saen ,  Kenichi Osada ,  Shigeru Oho

    IPC分类号： G06F7/00

    CPC分类号： G07C5/0816

    摘要： In a vehicle electronic system including a plurality of LSI boards, LSIS which cannot control a user interface such as image or audio directly issue a command for notifying a vehicle occupant of its own information via networks and an information control LSI receives the request to output a message. A mechanism for setting priority of processings regarding LSI status information notification to be lower than that of an apparatus control processing is provided in each of LSIs and networks so that real-time property of the apparatus control processing is maintained. In order to reduce network load regarding the LSI status information notification, a message content itself is stored in a memory in a vehicle information processing unit previously so that only an ID for identifying the message content is transmitted.

    摘要翻译： 在包括多个LSI板的车载电子系统中，无法控制诸如图像或音频的用户界面的LSIS直接发出用于通过网络通知车辆乘客自己的信息的命令，并且信息控制LSI接收输出 信息。 在LSI和网络的每一个中设置有用于将关于LSI状态信息通知的处理的优先级设置为低于设备控制处理的优先级的机制，从而保持设备控制处理的实时性。 为了减少关于LSI状态信息通知的网络负载，消息内容本身预先存储在车辆信息处理单元中的存储器中，从而仅发送用于识别消息内容的ID。

    Semiconductor apparatus
    3.
    发明授权
    Semiconductor apparatus 有权
    半导体装置

    公开(公告)号：US08508968B2

    公开(公告)日：2013-08-13

    申请号：US13461848

    申请日：2012-05-02

    申请人： Makoto Saen ,  Kenichi Osada ,  Masanao Yamaoka ,  Tomonori Sekiguchi

    发明人： Makoto Saen ,  Kenichi Osada ,  Masanao Yamaoka ,  Tomonori Sekiguchi

    IPC分类号： G11C5/06 ,  G11C7/00 ,  H01L23/48 ,  H01L23/52

    CPC分类号： H01L25/0657 ,  G11C5/02 ,  H01L25/18 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/05599

    摘要： The need for mediation operation is eliminated by adoption of a connection topology in which a circuit for executing one transmission (TR—00T), and a circuit for executing a plurality of receptions (TR—10R, TR—20R, TR—30R) are connected to one penetration-electrode group (for example, TSVGL—0). In order to implement the connection topology even in the case of piling up a plurality of LSIs one after another, in particular, a programmable memory element for designating respective penetration-electrode ports for use in transmit, or for us in receive, and address allocation of the respective penetration-electrode ports is mounted in stacked LSIs.

    摘要翻译： 通过采用其中执行一次发送的电路（TR-00T）和用于执行多个接收（TR-10R，TR-20R，TR-30R）的电路的连接拓扑结构来消除对中介操作的需要 连接到一个穿透电极组（例如，TSVGL-0）。 为了实现连接拓扑，即使在堆叠多个LSI的情况下，尤其是用于指定用于发送的各个穿透电极端口或用于接收的可编程存储器元件，以及地址分配 各个贯通电极端口安装在堆叠的LSI中。

    Semiconductor integrated circuit device
    4.
    发明授权
    Semiconductor integrated circuit device 有权
    半导体集成电路器件

    公开(公告)号：US07899643B2

    公开(公告)日：2011-03-01

    申请号：US11935790

    申请日：2007-11-06

    申请人： Makoto Saen ,  Kenichi Osada ,  Tetsuya Yamada ,  Yusuke Kanno ,  Satoshi Misaka

    发明人： Makoto Saen ,  Kenichi Osada ,  Tetsuya Yamada ,  Yusuke Kanno ,  Satoshi Misaka

    IPC分类号： G01K1/12 ,  G06F19/00

    CPC分类号： G06F1/3228 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor integrated circuit device which consumes less power and enables real-time processing. The semiconductor integrated circuit device includes thermal sensors which detect temperature and determine whether the detection result exceeds reference values and output the result, and a control block capable of controlling the operations of arithmetic blocks based on the output signals of the thermal sensors. The control block returns to an operation state from a suspended state with an interrupt signal based on the output signals of the thermal sensors and determines the operation conditions of the arithmetic blocks to ensure that the temperature conditions of the arithmetic blocks are satisfied. Thereby, power consumption is reduced and real-time processing efficiency is improved.

    摘要翻译： 一种半导体集成电路器件，其消耗较少功率并实现实时处理。 半导体集成电路装置包括检测温度并确定检测结果是否超过参考值并输出结果的热传感器，以及能够基于热传感器的输出信号来控制运算块的操作的控制块。 控制块基于热传感器的输出信号从具有中断信号的挂起状态返回到操作状态，并且确定运算块的操作条件，以确保运算块的温度条件得到满足。 从而降低了功耗，提高了实时处理效率。

    SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    5.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 有权
    半导体集成电路设备

    公开(公告)号：US20080114967A1

    公开(公告)日：2008-05-15

    申请号：US11935790

    申请日：2007-11-06

    申请人： Makoto Saen ,  Kenichi Osada ,  Tetsuya Yamada ,  Yusuke Kanno ,  Satoshi Misaka

    发明人： Makoto Saen ,  Kenichi Osada ,  Tetsuya Yamada ,  Yusuke Kanno ,  Satoshi Misaka

    IPC分类号： G06F9/302

    CPC分类号： G06F1/3228 ,  H01L2924/0002 ,  H01L2924/00

    摘要： There is provided a semiconductor integrated circuit device which consumes less power and enables real-time processing. The semiconductor integrated circuit device comprises: thermal sensors which can detect temperature, determine whether the detection result exceeds each of the above reference values and output the result; and a control block capable of controlling the operations of arithmetic blocks based on the output signals of the thermal sensors, wherein the control block returns to an operation state from a suspended state with an interrupt signal based on the output signals of the thermal sensors and determines the operation conditions of the arithmetic blocks to ensure that the temperature conditions of the arithmetic blocks are satisfied. Thereby, power consumption is reduced and real-time processing efficiency is improved.

    摘要翻译： 提供了一种半导体集成电路器件，其消耗较少功率并实现实时处理。 半导体集成电路装置包括：可以检测温度的热传感器，确定检测结果是否超过上述参考值，并输出结果; 以及控制块，其能够基于所述热传感器的输出信号来控制运算块的运算，其中，所述控制块基于所述热传感器的输出信号，利用中断信号从暂停状态返回到运行状态，并且确定 运算块的操作条件，以确保运算块的温度条件得到满足。 从而降低了功耗，提高了实时处理效率。

    SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR DEVICE WITH THE SAME
    8.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR DEVICE WITH THE SAME 有权
    半导体集成电路和具有该半导体集成电路的半导体器件

    公开(公告)号：US20090031053A1

    公开(公告)日：2009-01-29

    申请号：US12172512

    申请日：2008-07-14

    申请人： Itaru Nonomura ,  Makoto Saen ,  Kenichi Osada

    发明人： Itaru Nonomura ,  Makoto Saen ,  Kenichi Osada

    IPC分类号： G06F13/20 ,  G06F13/00 ,  H03L7/00

    CPC分类号： G06F13/4045 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An interconnect configuration technology of making an access from an IP mounted on a semiconductor chip to an IP mounted on another semiconductor chip by transmitting and receiving a packet transferred through an interconnect built in a semiconductor chip among the chips using the 3D coupling technology. The device according to the technology has an initiator for transmitting an access request, a target for receiving the access request and transmitting an access response, a router for relaying the access request and the access response, and a 3D coupling circuit (three-dimensional transceiver) for performing communication with the outside, wherein the 3D coupling circuit is disposed adjacent to the router.

    摘要翻译： 一种互连配置技术，其通过使用3D耦合技术发送和接收通过内置在半导体芯片中的互连的芯片传输的分组，从安装在半导体芯片上的IP到安装在另一半导体芯片上的IP进行访问。 根据该技术的设备具有用于发送接入请求的发起者，用于接收接入请求并发送接入响应的目标，用于中继接入请求和接入响应的路由器，以及3D耦合电路（三维收发机 ），用于与外部进行通信，其中所述3D耦合电路邻近所述路由器设置。

    Semiconductor integrated circuit device and power consumption control device
    10.
    发明申请
    Semiconductor integrated circuit device and power consumption control device 有权
    半导体集成电路器件和功耗控制器件

    公开(公告)号：US20070083779A1

    公开(公告)日：2007-04-12

    申请号：US11542133

    申请日：2006-10-04

    申请人： Satoshi Misaka ,  Makoto Saen ,  Tetsuya Yamada ,  Keisuke Toyama ,  Kenichi Osada

    发明人： Satoshi Misaka ,  Makoto Saen ,  Tetsuya Yamada ,  Keisuke Toyama ,  Kenichi Osada

    IPC分类号： G06F1/00

    CPC分类号： G06F1/3203 ,  G06F1/329 ,  Y02D10/24 ,  Y02D50/20

    摘要： To perform execution scheduling of function blocks so as to control the total required power of the function blocks within a supplyable power budget value, and thereby realize stable operations at low power consumption. Function block identifiers are allotted to all the function blocks, and to a RAM area that a power consumption control device can read and write, a list to store identifiers and task priority, power mode value showing power states, and power mode time showing the holding time of power states can be linked. A single or plural link lists for controlling the schedules of tasks operating on the function blocks, a link list for controlling the function block in execution currently in high power mode, a link list for controlling the function block in stop currently in stop mode, and a link list for controlling the function block in execution currently in low power mode are allotted, and thereby the power source and the operation clock are controlled by the power consumption control device.

    摘要翻译： 执行功能块的执行调度，以便在可供电功率预算值内控制功能块的总需求功率，从而在低功耗下实现稳定的操作。 功能块标识符分配给所有功能块，以及功率控制装置可以读写的RAM区域，存储标识符和任务优先级的列表，显示功率状态的功率模式值和显示保持的功率模式时间 电力状态的时间可以联系起来。 用于控制在功能块上操作的任务的调度的单个或多个链接列表，用于控制当前处于高功率模式的执行中的功能块的链接列表，用于控制当前处于停止模式的停止功能块的链接列表，以及 分配用于控制当前处于低功率模式的执行功能块的链接列表，从而由功耗控制装置控制电源和操作时钟。