公开(公告)号：US5504348A

公开(公告)日：1996-04-02

申请号：US406644

申请日：1995-03-20

申请人： Mamoru Yoshida ,  Makoto Sasaki ,  Hiroyuki Okimoto ,  Tsutomu Nomoto ,  Shunichi Sato

发明人： Mamoru Yoshida ,  Makoto Sasaki ,  Hiroyuki Okimoto ,  Tsutomu Nomoto ,  Shunichi Sato

IPC分类号： G02F1/1362 ,  H01L29/04

CPC分类号： G02F1/136204

摘要： A thin film transistor array comprises an insulative substrate, a plurality of pixel electrodes arranged in a matrix on the insulative substrate, a plurality of thin film transistors connected respectively to the pixel electrodes, a plurality of address lines formed on the insulative substrate, each address line being connected to a plurality of control electrodes of the thin film transistors, and a plurality of data lines arranged on the insulative substrate in such a manner as to intersect the address lines, each data line being connected to a plurality of data input electrodes of the thin film transistors. A short-wiring is formed on the outside of a display region on the insulative substrate on which the pixel electrodes are arranged, and the short-wiring is connected to at least two of the address lines and the data lines by a two-terminal element having non-linear resistance characteristics defining voltage/current characteristics on the basis of a space charge limited current.

摘要翻译： 一种薄膜晶体管阵列，包括绝缘衬底，在绝缘衬底上以矩阵形式布置的多个像素电极，分别连接到像素电极的多个薄膜晶体管，形成在绝缘衬底上的多个地址线，每个地址 线连接到薄膜晶体管的多个控制电极以及以与地址线相交的方式布置在绝缘基板上的多条数据线，每条数据线连接到多个数据输入电极 薄膜晶体管。 在布置有像素电极的绝缘基板上的显示区域的外侧形成短布线，并且短路线通过两端子元件连接到至少两条地址线和数据线 具有基于空间电荷限制电流限定电压/电流特性的非线性电阻特性。

公开(公告)号：US4816885A

公开(公告)日：1989-03-28

申请号：US47130

申请日：1987-05-08

申请人： Mamoru Yoshida ,  Tsutomu Nomoto ,  Tomoo Araki ,  Tsukasa Watanabe

发明人： Mamoru Yoshida ,  Tsutomu Nomoto ,  Tomoo Araki ,  Tsukasa Watanabe

IPC分类号： G02F1/136 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/78 ,  H01L29/786

CPC分类号： G02F1/1368 ,  H01L27/12 ,  H01L29/78669

摘要： A thin-film transistor matrix comprises thin-film transistors formed on a dielectric substrate and arranged in rows and columns. Each of the transistors comprises a control electrode, an insulation film formed on the control electrode, a semiconductor film formed on the insulation film, a first main electrode formed on the semiconductor film, and a second main electrode formed on the semiconductor film. Row interconnection layers are provided for the respective rows to interconnect the control electrodes of the transistors of the respective rows. Column interconnection layers are provided for the respective columns to interconnect the first main electrodes in the respective columns. The insulation film and the semiconductor film are formed in the regions where the transistor is formed and in the regions where the column interconnection layer is formed.

摘要翻译： 薄膜晶体管矩阵包括形成在电介质基板上并以行和列布置的薄膜晶体管。 每个晶体管包括控制电极，形成在控制电极上的绝缘膜，形成在绝缘膜上的半导体膜，形成在半导体膜上的第一主电极和形成在半导体膜上的第二主电极。 针对相应的行设置行互连层以互连各行的晶体管的控制电极。 为相应的列提供列互连层以互连各个列中的第一主电极。 绝缘膜和半导体膜形成在形成晶体管的区域和形成列互连层的区域中。

公开(公告)号：US5070379A

公开(公告)日：1991-12-03

申请号：US540624

申请日：1990-06-19

申请人： Tsutomu Nomoto ,  Masumi Koizumi ,  Akihiko Nishiki

发明人： Tsutomu Nomoto ,  Masumi Koizumi ,  Akihiko Nishiki

IPC分类号： G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/336 ,  H01L27/12 ,  H01L29/49 ,  H01L29/78 ,  H01L29/786

CPC分类号： G02F1/1362 ,  H01L29/4908 ,  H01L29/78669

摘要： A TFT matrix for an active matrix display panel has a plurality of TFTs arranged in rows and columns to form a matrix array. Each of the TFT has a control electrode on a dielectric substrate, a first insulator film formed on the control electrode, a second insulator film formed on the first insulator film, a-Si semiconductor layer formed on the second insulator film, and first and second (drain and source) electrodes formed on the a-Si semiconductor layer. The matrix has a plurality of transparent electrodes that contact the second electrodes, row interconnection layers interconnecting the control electrodes of the TFTs of the respective rows, and column interconnection layers interconnecting the first electrodes of the TFTs of the respective columns. The control electrodes and the row interconnection layers (gate electrodes) are made of an alloy of tantalum with tungsten, nickel, cobalt, rhodium, or iridium. The first insulator is formed by anodizing the surface of the gate electrode. The gate electrode has low resistance, improving the quality of the display without impairing insulation performance.

摘要翻译： 用于有源矩阵显示面板的TFT矩阵具有排列成行和列的多个TFT，以形成矩阵阵列。 每个TFT在电介质基板上具有控制电极，形成在控制电极上的第一绝缘膜，形成在第一绝缘膜上的第二绝缘膜，形成在第二绝缘膜上的a-Si半导体层，以及第一和第二绝缘膜 （漏极和源极）电极形成在a-Si半导体层上。 该矩阵具有接触第二电极的多个透明电极，互连各行TFT的控制电极的行互连层和互连各列的TFT的第一电极的列互连层。 控制电极和行互连层（栅电极）由钽与钨，镍，钴，铑或铱的合金制成。 第一绝缘体通过阳极氧化栅电极的表面而形成。 栅电极具有低电阻，提高显示器的质量而不损害绝缘性能。

公开(公告)号：US5955748A

公开(公告)日：1999-09-21

申请号：US942302

申请日：1997-10-01

申请人： Yukio Nakamura ,  Mitsuhiko Ogihara ,  Masumi Taninaka ,  Takao Kusano ,  Masumi Koizumi ,  Hiroyuki Fujiwara ,  Makoto Ishimaru ,  Masaharu Nobori ,  Tsutomu Nomoto

发明人： Yukio Nakamura ,  Mitsuhiko Ogihara ,  Masumi Taninaka ,  Takao Kusano ,  Masumi Koizumi ,  Hiroyuki Fujiwara ,  Makoto Ishimaru ,  Masaharu Nobori ,  Tsutomu Nomoto

IPC分类号： B41J2/44 ,  B41J2/45 ,  B41J2/455 ,  H01L21/301 ,  H01L33/00 ,  H01L33/08 ,  H01L33/20 ,  H01L33/30 ,  H01L33/36 ,  H01L33/44

CPC分类号： B41J2/45 ,  H01L33/0008 ,  H01L33/20 ,  H01L33/44 ,  H01L2224/48137 ,  H01L33/0095

摘要： An end facet light emitting type LED has a slanted light emitting side wall relative to a substrate surface. A method for manufacturing end facet light emitting type light emitting devices prevents the pn-junction regions of the devices from being damaged while a semiconductor wafer is diced to separate light emitting devices from one another. A recess is formed on the semiconductor wafer having a depth which is deeper than the pn-junction. A portion to be cut during dicing of the wafer is vertically and horizontally separated from the pn-junction regions, so that if cracks occur when the wafer is diced, the cracks do not affect the light emitting characteristics of the devices.

摘要翻译： 端面发光型LED相对于基板表面具有倾斜的发光侧壁。 一种用于制造端面发光型发光器件的方法防止了在将半导体晶片切割以将发光器件彼此分离的同时，器件的pn结区域被损坏。 在半导体晶片上形成有比pn结深的深度的凹部。 在切割晶片期间待切割的部分与pn结区域垂直和水平分离，使得如果在切割晶片时发生裂纹，则裂纹不会影响器件的发光特性。

公开(公告)号：US5225364A

公开(公告)日：1993-07-06

申请号：US706267

申请日：1991-05-28

申请人： Tsutomu Nomoto ,  Masumi Koizumi ,  Akihiko Nishiki

发明人： Tsutomu Nomoto ,  Masumi Koizumi ,  Akihiko Nishiki

IPC分类号： G02F1/1362 ,  H01L29/49 ,  H01L29/786

CPC分类号： H01L29/4908 ,  G02F1/1362 ,  H01L29/78669 ,  H01L29/78678

摘要： A TFT matrix for an active matrix display panel has a plurality of TFTs arranged in rows and columns to form a matrix array. Each of the TFT has a control electrode on a dielectric substrate, a first insulator film formed on the control electrode, a second insulator film formed on the first insulator film, a-Si semiconductor layer formed on the second insulator film, and first and second (drain and source) electrodes formed on the a-Si semiconductor layer. The matrix has a plurality of transparent electrodes that contact the second electrodes, row interconnection layers interconnecting the control electrodes of the TFTs of the respective rows, and column interconnection layers interconnecting the first electrodes of the TFTs of the respective columns. The control electrodes and the row interconnection layers (gate electrodes) are made of an alloy of tantalum with tungsten, nickel, cobalt, rhodium, or iridium. The first insulator is formed by anodizing the surface of the gate electrode. The gate electrode has low resistance, improving the quality of the display without impairing insulation performance.

摘要翻译： 用于有源矩阵显示面板的TFT矩阵具有排列成行和列的多个TFT，以形成矩阵阵列。 每个TFT在电介质基板上具有控制电极，形成在控制电极上的第一绝缘膜，形成在第一绝缘膜上的第二绝缘膜，形成在第二绝缘膜上的a-Si半导体层，以及第一和第二绝缘膜 （漏极和源极）电极形成在a-Si半导体层上。 该矩阵具有与第二电极接触的多个透明电极，将各行的TFT的控制电极互连的行互连层和互连各列的TFT的第一电极的列互连层。 控制电极和行互连层（栅电极）由钽与钨，镍，钴，铑或铱的合金制成。 第一绝缘体通过阳极氧化栅电极的表面而形成。 栅电极具有低电阻，提高显示器的质量而不损害绝缘性能。

公开(公告)号：US06297842B1

公开(公告)日：2001-10-02

申请号：US08531753

申请日：1995-09-21

申请人： Masumi Koizumi ,  Yichao Jiang ,  Tsutomu Nomoto ,  Ichimatsu Abiko

发明人： Masumi Koizumi ,  Yichao Jiang ,  Tsutomu Nomoto ,  Ichimatsu Abiko

IPC分类号： B41J2447

CPC分类号： B41J2/451 ,  B41J2/45 ,  H01L27/32 ,  H01L51/5012 ,  H01L51/52 ,  H01L51/5203 ,  H01L51/5212 ,  H01L2224/48091 ,  H01L2224/4811 ,  H01L2224/48227 ,  H01L2251/5315 ,  H01L2251/533 ,  H01L2924/00014

摘要： A light-emitting array and its driving circuitry are integrated into a single device. The driving circuitry is formed in a semiconductor substrate and has an array of output terminals on a surface of the substrate. Organic electroluminescent elements are formed directly over the output terminals, in electrical contact with the output terminals. The electroluminescent elements are driven by direct current. An optical head assembly has one or more of these light-emitting arrays mounted on a printed circuit board.

摘要翻译： 发光阵列及其驱动电路集成到单个器件中。 驱动电路形成在半导体衬底中，并且在衬底的表面上具有输出端子阵列。 有机电致发光元件直接形成在输出端子上，与输出端子电接触。 电致发光元件由直流电驱动。 光头组件具有安装在印刷电路板上的这些发光阵列中的一个或多个。

公开(公告)号：US06174648B1

公开(公告)日：2001-01-16

申请号：US09109904

申请日：1998-07-02

申请人： Yoshitaka Terao ,  Tsutomu Nomoto ,  Akihiko Nishiki

发明人： Yoshitaka Terao ,  Tsutomu Nomoto ,  Akihiko Nishiki

IPC分类号： G03C500

CPC分类号： G02B6/3636 ,  G02B6/02138 ,  G02B6/02152 ,  G02B6/02209 ,  G02B6/362 ,  G02B6/3692

摘要： An optical filter is manufactured by placing a photosensitive optical fiber in a spiral arrangement on a fiber holder, preferably having a spiral groove for holding the fiber, and exposing the fiber to ultraviolet light through a phase mask having a spiral diffraction grating, forming an in-fiber Bragg grating. The fiber can be conveniently scanned by an ultraviolet beam as the fiber holder and phase mask turn on a rotating stage. The fiber can be compactly packaged between the fiber holder and a cover. The fiber holder and cover can be formed by coating a substrate with layers of polymer material, the spiral groove being formed by photolithographic patterning of one of the layers.

摘要翻译： 光学滤光器是通过将光纤光纤放置在光纤保持器上而制成的，该感光光纤优选地具有用于保持光纤的螺旋槽，并且通过具有螺旋衍射光栅的相位掩模将光纤暴露于紫外光，形成为 光纤布拉格光栅。 当光纤保持器和相位掩模转动在旋转台上时，纤维可以被紫外线束方便地扫描。 纤维可以紧密地包装在纤维架和盖子之间。 纤维保持器和盖可以通过用聚合物材料层涂覆基底而形成，螺旋槽通过其中一层的光刻图案形成。

公开(公告)号：US5539551A

公开(公告)日：1996-07-23

申请号：US168644

申请日：1993-12-16

申请人： Tsutomu Nomoto ,  Hideki Kamada ,  Ichiro Ohno

发明人： Tsutomu Nomoto ,  Hideki Kamada ,  Ichiro Ohno

IPC分类号： H01L27/12 ,  G02F1/136 ,  G02F1/1343 ,  H01L29/04 ,  H01L31/036

CPC分类号： H01L27/12

摘要： A plurality of address wiring layers and a plurality of data wiring layers are arranged to cross each other at a right angle. TFTs are respectively arranged at the intersections between the address wiring layers and the data wiring layers. The gate electrode of each TFT is connected to an address wiring layer for each row. The drain electrode of each TFT is connected to a data wiring layer for each column. Display electrodes are respectively arranged in the regions defined by the address wiring layers and the data wiring layers, and are connected to the source electrodes of the TFTs arranged in the respective regions. The data wiring layers and the source and drain electrodes of the TFTs each comprise the first layer serving as an ohmic barrier layer for a semiconductor layer, the second layer forming of a conductive material and serving as a main signal wiring layer, and the third layer serving as a battery reaction preventing layer.

摘要翻译： 多个地址布线层和多​​个数据布线层被布置成以直角彼此交叉。 TFT分别布置在地址布线层和数据布线层之间的交点处。 每个TFT的栅电极连接到每行的地址布线层。 每个TFT的漏电极连接到每列的数据布线层。 显示电极分别布置在由地址布线层和数据布线层限定的区域中，并且连接到布置在各个区域中的TFT的源电极。 TFT的数据布线层和源电极和漏电极各自包括用作半导体层的欧姆阻挡层的第一层，导电材料的第二层形成并用作主信号布线层，第三层 用作电池反应防止层。

公开(公告)号：US4859617A

公开(公告)日：1989-08-22

申请号：US201967

申请日：1988-06-03

申请人： Tsutomu Nomoto ,  Mamoru Yosida ,  Mikio Mouri ,  Tsukasa Watanabe

发明人： Tsutomu Nomoto ,  Mamoru Yosida ,  Mikio Mouri ,  Tsukasa Watanabe

IPC分类号： H01L27/12 ,  H01L21/28 ,  H01L21/30 ,  H01L21/336 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L29/66765 ,  H01L21/28008 ,  H01L21/3003 ,  Y10S438/909 ,  Y10S438/91 ,  Y10S438/913

摘要： In a thin-film transistor fabrication process using an amorphous silicon semiconductor layer, after the gate insulation layer is formed and before the a-Si semiconductor layer is formed, the surface of the gate insulation layer is treated with an H.sub.2 plasma. This treatment improves the transistor characteristics.

公开(公告)号：US06442312B1

公开(公告)日：2002-08-27

申请号：US09643684

申请日：2000-08-24

申请人： Yoshitaka Terao ,  Tsutomu Nomoto ,  Akihiko Nishiki

发明人： Yoshitaka Terao ,  Tsutomu Nomoto ,  Akihiko Nishiki

IPC分类号： G02B634

CPC分类号： G02B6/3636 ,  G02B6/02138 ,  G02B6/02152 ,  G02B6/02209 ,  G02B6/362 ,  G02B6/3692

摘要： An optical filter is manufactured by placing a photosensitive optical fiber in a spiral arrangement on a fiber holder, preferably having a spiral groove for holding the fiber, and exposing the fiber to ultraviolet light through a phase mask having a spiral diffraction grating, forming an in-fiber Bragg grating. The fiber can be conveniently scanned by an ultraviolet beam as the fiber holder and phase mask turn on a rotating stage. The fiber can be compactly packaged between the fiber holder and a cover. The fiber holder and cover can be formed by coating a substrate with layers of polymer material, the spiral groove being formed by photolithographic patterning of one of the layers.

摘要翻译： 光学滤光器是通过将光纤光纤放置在光纤保持器上而制成的，该感光光纤优选地具有用于保持光纤的螺旋槽，并且通过具有螺旋衍射光栅的相位掩模将光纤暴露于紫外光，形成为 光纤布拉格光栅。 当光纤保持器和相位掩模转动在旋转台上时，纤维可以被紫外线束方便地扫描。 纤维可以紧密地包装在纤维架和盖子之间。 纤维保持器和盖可以通过用聚合物材料层涂覆基底而形成，螺旋槽通过其中一层的光刻图案形成。