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    FREQUENCY MULTIPLIERS
    1.
    发明申请
    FREQUENCY MULTIPLIERS 有权
    频率乘法器

    公开(公告)号：US20160373094A1

    公开(公告)日：2016-12-22

    申请号：US15184342

    申请日：2016-06-16

    Applicant: Marvell World Trade LTD.

    Inventor： Mustafa Oguzhan YAYLA ,  Xiang Gao ,  Li Lin

    IPC: H03K5/00 ,  H03K3/03

    CPC classification number: H03K5/00006 ,  H03B19/14 ,  H03B2200/007 ,  H03B2202/05 ,  H03K3/0315

    Abstract: A system includes a signal generator and a signal combiner. The signal generator is configured to output a first signal having a first frequency and to output one or more signals having the first frequency and having phases shifted relative to the first signal by predetermined amounts. The signal combiner is configured to combine the first signal and the one or more signals to output a frequency multiplied second signal having a second frequency. The second frequency is greater than the first frequency.

    Abstract translation: 系统包括信号发生器和信号组合器。 信号发生器被配置为输出具有第一频率的第一信号，并输出具有第一频率的一个或多个信号，并且具有相对于第一信号相移一定预定量的相位。 信号组合器被配置为组合第一信号和一个或多个信号以输出具有第二频率的倍频的第二信号。 第二个频率大于第一个频率。

    Self-Biasing Radio Frequency Circuitry
    2.
    发明申请
    Self-Biasing Radio Frequency Circuitry 审中-公开
    自偏置射频电路

    公开(公告)号：US20140132349A1

    公开(公告)日：2014-05-15

    申请号：US14134223

    申请日：2013-12-19

    Applicant: MARVELL WORLD TRADE LTD.

    Inventor： Jinho Park ,  Yuan Lu ,  Li Lin

    IPC: H03F3/30

    CPC classification number: H03F3/3016 ,  H03F1/0272 ,  H03F1/083 ,  H03F3/195 ,  H03F3/3028 ,  H03F2200/294 ,  H03F2203/30021 ,  H03F2203/30027 ,  H03F2203/30031 ,  H03F2203/30033 ,  H03F2203/30036 ,  H03F2203/30084 ,  H03F2203/30117

    Abstract: The present disclosure describes self-biasing radio frequency circuitry. In some aspects a radio frequency (RF) signal is amplified via a circuit having a first transistor configured to source current to an output of the circuit and a second transistor configured to sink current from the output of the circuit, and another signal is provided, without active circuitry, from the output of the circuit to a gate of the first transistor effective to bias a voltage at the output of the circuit. By so doing, the output of the circuit can be biased without active circuitry which can reduce design complexity of and substrate area consumed by the circuit.

    Abstract translation: 本公开描述了自偏置射频电路。 在一些方面中，射频（RF）信号经由具有第一晶体管的电路被放大，该第一晶体管被配置为将电流源电流到电路的输出，以及第二晶体管，被配置为从电路的输出吸收电流，并且提供另一个信号， 没有有源电路，从电路的输出到第一晶体管的栅极有效地偏置电路输出处的电压。 通过这样做，电路的输出可以被偏置而没有有源电路，这可以降低电路消耗的设计复杂度和衬底面积。

    Self-biasing radio frequency circuitry
    3.
    发明授权
    Self-biasing radio frequency circuitry 有权
    自偏置射频电路

    公开(公告)号：US09362872B2

    公开(公告)日：2016-06-07

    申请号：US14134223

    申请日：2013-12-19

    Applicant: Marvell World Trade Ltd.

    Inventor： Jinho Park ,  Yuan Lu ,  Li Lin

    IPC: H03F3/26 ,  H03F3/30 ,  H03F1/02 ,  H03F1/08 ,  H03F3/195

    CPC classification number: H03F3/3016 ,  H03F1/0272 ,  H03F1/083 ,  H03F3/195 ,  H03F3/3028 ,  H03F2200/294 ,  H03F2203/30021 ,  H03F2203/30027 ,  H03F2203/30031 ,  H03F2203/30033 ,  H03F2203/30036 ,  H03F2203/30084 ,  H03F2203/30117

    Abstract: The present disclosure describes self-biasing radio frequency circuitry. In some aspects a radio frequency (RF) signal is amplified via a circuit having a first transistor configured to source current to an output of the circuit and a second transistor configured to sink current from the output of the circuit, and another signal is provided, without active circuitry, from the output of the circuit to a gate of the first transistor effective to bias a voltage at the output of the circuit. By so doing, the output of the circuit can be biased without active circuitry which can reduce design complexity of and substrate area consumed by the circuit.

    Abstract translation: 本公开描述了自偏置射频电路。 在一些方面中，射频（RF）信号经由具有第一晶体管的电路被放大，该第一晶体管被配置为将电流源电流到电路的输出，以及第二晶体管，被配置为从电路的输出吸收电流，并且提供另一个信号， 没有有源电路，从电路的输出到第一晶体管的栅极有效地偏置电路输出处的电压。 通过这样做，电路的输出可以被偏置而没有有源电路，这可以降低电路消耗的设计复杂度和衬底面积。

    METHOD AND APPARATUS FOR LOCAL OSCILLATOR
    4.
    发明申请
    METHOD AND APPARATUS FOR LOCAL OSCILLATOR 审中-公开
    本地振荡器的方法和装置

    公开(公告)号：US20130271229A1

    公开(公告)日：2013-10-17

    申请号：US13861125

    申请日：2013-04-11

    Applicant: MARVELL WORLD TRADE LTD

    Inventor： Xiang GAO ,  Chi-Hung Lin ,  Li Lin

    IPC: H03L7/06

    CPC classification number: H03L7/06 ,  H03L7/23

    Abstract: Aspects of the disclosure provide a local oscillator (LO) circuit that includes a first phase locked loop (PLL) circuit and a second PLL. The first PLL circuit is configured to generate a first oscillation signal having a first frequency based on a reference signal having a reference frequency. The second PLL circuit is configured to receive the first oscillation signal and generate a second oscillation signal having a second frequency based on the first oscillation signal.

    Abstract translation: 本公开的方面提供了包括第一锁相环（PLL）电路和第二PLL的本地振荡器（LO）电路。 第一PLL电路被配置为基于具有参考频率的参考信号产生具有第一频率的第一振荡信号。 第二PLL电路被配置为接收第一振荡信号并且基于第一振荡信号产生具有第二频率的第二振荡信号。

    Transformer circuits having transformers with figure eight and double figure eight nested structures
    6.
    发明授权
    Transformer circuits having transformers with figure eight and double figure eight nested structures 有权
    具有变压器的变压器电路具有图8和双数字8嵌套结构

    公开(公告)号：US09312060B2

    公开(公告)日：2016-04-12

    申请号：US14028835

    申请日：2013-09-17

    Applicant: Marvell World Trade Ltd.

    Inventor： Philip Godoy ,  David M. Signoff ,  Ming He ,  Li Lin

    IPC: H01F27/28 ,  H01F27/00 ,  H01F30/08

    CPC classification number: H01F27/006 ,  H01F27/2804 ,  H01F30/08 ,  H01F2027/2809

    Abstract: A transformer includes a first loops and second loops. The first loops include a first set of input terminals. The first loops include at least three loops that are conductively coupled to each other in series by first crossovers. The second loops include a first set of output terminals. The second loops include at least three loops that are conductively coupled to each other in series by second crossovers. Each of the second conductive loops is inductively coupled to and nested within a respective one of the first conductive loops.

    Abstract translation: 变压器包括第一环和第二环。 第一环路包括第一组输入端子。 第一环包括至少三个环，其通过第一交叉串联地相互导电地耦合。 第二环路包括第一组输出端子。 第二环路包括至少三个环路，其通过第二交叉串联地彼此导电耦合。 每个第二导电回路感应耦合到并嵌套在相应的一个第一导电回路中。

    Method and apparatus to calibrate frequency synthesizer
    8.
    发明授权
    Method and apparatus to calibrate frequency synthesizer 有权
    校准频率合成器的方法和装置

    公开(公告)号：US09356612B2

    公开(公告)日：2016-05-31

    申请号：US14540485

    申请日：2014-11-13

    Applicant: MARVELL WORLD TRADE LTD

    Inventor： Xiang Gao ,  Li Lin

    IPC: H03L7/085 ,  H03L7/197 ,  H03L7/18 ,  H03L7/099 ,  H03L7/091 ,  H03L7/183

    CPC classification number: H03L7/18 ,  H03L7/085 ,  H03L7/091 ,  H03L7/099 ,  H03L7/0992 ,  H03L7/183 ,  H03L7/197

    Abstract: Aspects of the disclosure provide a circuit that includes a detector, a loop filter and a controller. The detector is configured to generate a first signal indicative a timing difference between a reference clock signal and a feedback clock signal. The feedback clock signal is generated based on an oscillating signal from an oscillator. The oscillator includes a first tuning circuit and a second tuning circuit to tune a frequency of the oscillating signal. The loop filter is configured to filter out a portion of frequency components from the first signal to generate a second signal for tuning the first tuning circuit of the oscillator. The controller is configured to tune the second tuning circuit based on the first signal and the second signal.

    Abstract translation: 本公开的方面提供了一种包括检测器，环路滤波器和控制器的电路。 检测器被配置为产生指示参考时钟信号和反馈时钟信号之间的定时差的第一信号。 基于来自振荡器的振荡信号产生反馈时钟信号。 振荡器包括第一调谐电路和调谐振荡信号的频率的第二调谐电路。 环路滤波器被配置为从第一信号滤出一部分频率分量以产生用于调谐振荡器的第一调谐电路的第二信号。 控制器被配置为基于第一信号和第二信号来调谐第二调谐电路。

    METHOD AND APPARATUS TO CALIBRATE FREQUENCY SYNTHESIZER
    10.
    发明申请
    METHOD AND APPARATUS TO CALIBRATE FREQUENCY SYNTHESIZER 有权
    校准频率合成器的方法和装置

    公开(公告)号：US20150130544A1

    公开(公告)日：2015-05-14

    申请号：US14540485

    申请日：2014-11-13

    Applicant: MARVELL WORLD TRADE LTD

    Inventor： Xiang GAO ,  Li Lin

    IPC: H03L7/18

    CPC classification number: H03L7/18 ,  H03L7/085 ,  H03L7/091 ,  H03L7/099 ,  H03L7/0992 ,  H03L7/183 ,  H03L7/197

    Abstract: Aspects of the disclosure provide a circuit that includes a detector, a loop filter and a controller. The detector is configured to generate a first signal indicative a timing difference between a reference clock signal and a feedback clock signal. The feedback clock signal is generated based on an oscillating signal from an oscillator. The oscillator includes a first tuning circuit and a second tuning circuit to tune a frequency of the oscillating signal. The loop filter is configured to filter out a portion of frequency components from the first signal to generate a second signal for tuning the first tuning circuit of the oscillator. The controller is configured to tune the second tuning circuit based on the first signal and the second signal.

    Abstract translation: 本公开的方面提供了一种包括检测器，环路滤波器和控制器的电路。 检测器被配置为产生指示参考时钟信号和反馈时钟信号之间的定时差的第一信号。 基于来自振荡器的振荡信号产生反馈时钟信号。 振荡器包括第一调谐电路和调谐振荡信号的频率的第二调谐电路。 环路滤波器被配置为从第一信号滤出一部分频率分量以产生用于调谐振荡器的第一调谐电路的第二信号。 控制器被配置为基于第一信号和第二信号来调谐第二调谐电路。

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