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1.发明授权公开(公告)号：US07738299B2
公开(公告)日：2010-06-15
申请号：US11819172
申请日：2007-06-26
IPC分类号： G11C11/34
CPC分类号： G11C16/14
摘要： According to an example embodiment, an erase discharge method may include drawing charges accumulated in a floating gate of a floating gate type field effect transistor into a semiconductor substrate to perform an erase operation by applying a first voltage to a word line, a second voltage to an N-well and a P-well, and/or opening a bit line and a ground line. The word line may be grounded, and a discharge transistor connected to the bit line may be turned on. The N-well and the P-well may be grounded to discharge charges accumulated in the N-well and P-well.
摘要翻译： 根据示例实施例，擦除放电方法可以包括将浮置栅极型场效应晶体管的浮动栅极中累积的电荷绘制到半导体衬底中，以通过对字线施加第一电压来执行擦除操作，将第二电压 N阱和P阱，和/或打开位线和接地线。 字线可以接地，并且连接到位线的放电晶体管可以被接通。 N阱和P阱可以被接地以放电累积在N阱和P阱中的电荷。
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2.发明申请公开(公告)号：US20080123434A1
公开(公告)日：2008-05-29
申请号：US11819172
申请日：2007-06-26
IPC分类号： G11C16/14
CPC分类号： G11C16/14
摘要： According to an example embodiment, an erase discharge method may include drawing charges accumulated in a floating gate of a floating gate type field effect transistor into a semiconductor substrate to perform an erase operation by applying a first voltage to a word line, a second voltage to an N-well and a P-well, and/or opening a bit line and a ground line. The word line may be grounded, and a discharge transistor connected to the bit line may be turned on. The N-well and the P-well may be grounded to discharge charges accumulated in the N-well and P-well.
摘要翻译： 根据示例实施例，擦除放电方法可以包括将浮置栅极型场效应晶体管的浮动栅极中累积的电荷绘制到半导体衬底中，以通过对字线施加第一电压来执行擦除操作，将第二电压 N阱和P阱，和/或打开位线和接地线。 字线可以接地，并且连接到位线的放电晶体管可以被接通。 N阱和P阱可以被接地以放电累积在N阱和P阱中的电荷。
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3.发明授权Semiconductor memory device with a clock circuit for reducing power consumption in a standby state 有权具有用于在待机状态下降低功耗的时钟电路的半导体存储器件公开(公告)号：US09112488B2
公开(公告)日：2015-08-18
申请号：US13303153
申请日：2011-11-23
申请人： Hiroki Murakami
发明人： Hiroki Murakami
CPC分类号： H03K19/0016 , G11C5/147 , G11C5/148 , G11C7/1057 , G11C7/1084 , G11C7/225 , G11C16/20 , G11C16/30 , G11C2207/2227
摘要： A semiconductor device including a logic circuit capable of decreasing a leakage current occurred during a standby state is provided. The semiconductor device includes a power supply portion for supplying a first operation voltage or a second operation voltage smaller than the first operation voltage; a P-type low-threshold transistor Tp for receiving the first or the second operation voltage from the power supply portion; and a N-type transistor Tn connected between the transistor Tp and a base potential. The transistors Tp, Tn construct a logic circuit. The power supply portion supplies the first operation voltage to the source of the transistor Tp in the enable state, and supplies the second operation voltage in a standby state. The second operation voltage is set so that voltage amplitude between gate and source of each transistor Tp, Tn is larger than the threshold value of the transistors Tp, Tn.
摘要翻译： 提供一种包括能够减少在待机状态期间发生的漏电流的逻辑电路的半导体器件。 半导体器件包括用于提供第一操作电压的电源部分或小于第一操作电压的第二操作电压; 用于从电源部分接收第一或第二操作电压的P型低阈值晶体管Tp; 以及连接在晶体管Tp和基极之间的N型晶体管Tn。 晶体管Tp，Tn构成逻辑电路。 电源部在使能状态下将第一工作电压提供给晶体管Tp的源极，将第二工作电压供给到待机状态。 第二操作电压被设置为使得每个晶体管Tp，Tn的栅极和源极之间的电压幅度大于晶体管Tp，Tn的阈值。
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4.发明授权公开(公告)号：US09006021B2
公开(公告)日：2015-04-14
申请号：US13094043
申请日：2011-04-26
CPC分类号： H01L21/76843 , C23C16/0272 , C23C16/24 , C23C16/52 , H01L21/76876
摘要： The amorphous silicon film formation method includes forming a seed layer on the surface of a base by heating the base and flowing aminosilane-based gas onto the heated base; and forming an amorphous silicon film on the seed layer by heating the base, supplying silane-based gas containing no amino group onto the seed layer on the surface of the heated base, and thermally decomposing the silane-based gas containing no amino group.
摘要翻译： 非晶硅膜形成方法包括通过加热基底并将氨基硅烷基气体流动到加热的基底上在基底的表面上形成籽晶层; 通过加热基底，在加热的基体的表面上的种子层上供给不含氨基的硅烷系气体，将不含氨基的硅烷类气体进行热分解，在种子层上形成非晶硅膜。
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公开(公告)号：US08753984B2
公开(公告)日：2014-06-17
申请号：US13332691
申请日：2011-12-21
IPC分类号： H01L21/20
CPC分类号： C23C16/345 , C23C16/45525
摘要： A method of forming a silicon nitride film on the surface of an object to be processed, the method including forming a seed layer functioning as a seed of the silicon nitride film on the surface of the object to be processed by using at least an aminosilane-based gas, prior to forming the silicon nitride film on the surface of the object to be processed.
摘要翻译： 一种在待处理物体的表面上形成氮化硅膜的方法，该方法包括通过使用至少一种氨基硅烷化合物形成在待加工物体的表面上起氮化硅膜的晶种的种子层的作用， 在将待加工物体的表面上形成氮化硅膜之前。
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公开(公告)号：US20140033752A1
公开(公告)日：2014-02-06
申请号：US14113025
申请日：2011-06-01
申请人： Munehisa Gunjima , Hiroki Murakami
发明人： Munehisa Gunjima , Hiroki Murakami
IPC分类号： B60H1/00
CPC分类号： B60H1/00021 , B60H1/00207 , B60H1/00371 , B60H1/008 , B60H1/00849 , B60H2001/00221 , B61D27/0072
摘要： In vehicle air-conditioning devices including a refrigerant circuit having a compressor, an outdoor heat exchanger, an expansion device, and an indoor heat exchanger that are connected by refrigerant pipes to form a refrigeration cycle; an indoor air-sending device that supplies air to the indoor heat exchanger; and an outdoor air-sending device that supplies air to the outdoor heat exchanger, the refrigerant circuit is installed under the floor of a vehicle and uses carbon dioxide as the refrigerant.
摘要翻译： 在包括具有压缩机，室外热交换器，膨胀装置和室内热交换器的制冷剂回路的车辆用空调装置中，通过制冷剂管连接而形成制冷循环; 向室内热交换器供给空气的室内送风装置; 以及向室外热交换器供给空气的室外送风装置，将制冷剂回路安装在车辆的地板下方，并使用二氧化碳作为制冷剂。
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公开(公告)号：US20120287712A1
公开(公告)日：2012-11-15
申请号：US13303153
申请日：2011-11-23
申请人： Hiroki Murakami
发明人： Hiroki Murakami
IPC分类号： G11C16/04 , H03K19/00 , H03K19/20 , G11C5/06 , H03K19/096
CPC分类号： H03K19/0016 , G11C5/147 , G11C5/148 , G11C7/1057 , G11C7/1084 , G11C7/225 , G11C16/20 , G11C16/30 , G11C2207/2227
摘要： A semiconductor device including a logic circuit capable of decreasing a leakage current occurred during a standby state is provided. The semiconductor device includes a power supply portion for supplying a first operation voltage or a second operation voltage smaller than the first operation voltage; a P-type low-threshold transistor Tp for receiving the first or the second operation voltage from the power supply portion; and a N-type transistor Tn connected between the transistor Tp and a base potential. The transistors Tp, Tn construct a logic circuit. The power supply portion supplies the first operation voltage to the source of the transistor Tp in the enable state, and supplies the second operation voltage in a standby state. The second operation voltage is set so that voltage amplitude between gate and source of each transistor Tp, Tn is larger than the threshold value of the transistors Tp, Tn.
摘要翻译： 提供一种包括能够减少在待机状态期间发生的漏电流的逻辑电路的半导体器件。 半导体器件包括用于提供第一操作电压的电源部分或小于第一操作电压的第二操作电压; 用于从电源部分接收第一或第二操作电压的P型低阈值晶体管Tp; 以及连接在晶体管Tp和基极之间的N型晶体管Tn。 晶体管Tp，Tn构成逻辑电路。 电源部在使能状态下将第一工作电压提供给晶体管Tp的源极，将第二工作电压供给到待机状态。 第二操作电压被设置为使得每个晶体管Tp，Tn的栅极和源极之间的电压幅度大于晶体管Tp，Tn的阈值。
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公开(公告)号：US07835667B2
公开(公告)日：2010-11-16
申请号：US12025825
申请日：2008-02-05
申请人： Shigeo Ohno , Tsutomu Sugimoto , Tomoya Ichikawa , Yasuo Takayama , Yoji Yamaguchi , Yoshitaka Kuroda , Tohru Inoue , Kuniaki Tanaka , Takahiro Shinkawa , Hiroki Murakami
发明人： Shigeo Ohno , Tsutomu Sugimoto , Tomoya Ichikawa , Yasuo Takayama , Yoji Yamaguchi , Yoshitaka Kuroda , Tohru Inoue , Kuniaki Tanaka , Takahiro Shinkawa , Hiroki Murakami
IPC分类号： G03G15/02
CPC分类号： G03G15/0291 , G03G2215/027
摘要： A discharger includes: a discharge electrode member that is placed opposedly to a member to be charged; an opposed electrode member that is placed opposedly to the discharge electrode member; and a power source circuit that applies a discharge voltage for generating a discharge between the discharge electrode member and the opposed electrode member, and the electrode member having a surface that includes a covered layer covered by a covering material is formed on a surface opposed thereto, and the covering material containing a carbon atom, or a carbon atom and another atom or other plural atoms as a main component, and having an SP3 structure by a carbon atom.
摘要翻译： 放电器包括：与要充电的元件相对放置的放电电极元件; 与放电电极部件相对设置的对置电极部件; 以及电源电路，其施加用于在放电电极构件和相对电极构件之间产生放电的放电电压，并且具有包括被覆盖材料覆盖的覆盖层的表面的电极构件形成在与其相对的表面上， 和含有碳原子，碳原子和其它原子或其它多个原子作为主要成分并且具有通过碳原子的SP 3结构的覆盖材料。
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公开(公告)号：US07810052B2
公开(公告)日：2010-10-05
申请号：US11785897
申请日：2007-04-20
申请人： Katsushi Aoki , Junya Yamasaki , Hiroki Murakami
发明人： Katsushi Aoki , Junya Yamasaki , Hiroki Murakami
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： A logical-group creating unit creates a logical group from a cell included in a selected range of a logical drawing that is specified in a logical page. A logical-group extracting unit extracts a same/similar logical group by determining whether logical drawings of created logical groups are same or similar to each other. A pattern creating unit creates an implementation pattern of a logical group included in extracted same/similar logical group.
摘要翻译： 逻辑组创建单元从在逻辑页面中指定的逻辑绘图的选定范围中包括的单元创建逻辑组。 逻辑组提取单元通过确定所创建的逻辑组的逻辑图是否相同或相似来提取相同/相似的逻辑组。 模式创建单元创建包括在提取的相同/相似的逻辑组中的逻辑组的实现模式。
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公开(公告)号：US20100076601A1
公开(公告)日：2010-03-25
申请号：US12447784
申请日：2007-11-09
申请人： Kengo Matsuo , Hiroaki Imaizumi , Akio Ueda , Ichiro Yasuzumi , Hiroki Murakami , Hiroyuki Amada
发明人： Kengo Matsuo , Hiroaki Imaizumi , Akio Ueda , Ichiro Yasuzumi , Hiroki Murakami , Hiroyuki Amada
IPC分类号： B25J9/06
CPC分类号： B25J9/107 , B25J9/1633
摘要： The frog-leg-arm robot is provided with a torque motor connected to a wrist rotation shaft to supply torque to a rotation shaft to which the torque motor itself is connected and a control unit in which, when each of arms constituting the frog-leg-arm robot is able to shift from the present posture to any plurality of postures including a targeted posture by a driving device, the torque motor is electrically controlled so that the torque is supplied to the wrist rotation shaft in a direction in which each of the arms is able to shift to the targeted posture.
摘要翻译： 青蛙腿臂机器人设置有连接到腕部旋转轴的扭矩马达，以向与扭矩马达本身连接的旋转轴提供扭矩;以及控制单元，其中，当构成青蛙腿的每个臂 臂式机器人能够通过驱动装置从目前的姿态向包括目标姿态的任意多个姿势转换，扭矩电动机被电控制，使得扭矩沿着每个的方向被提供给腕部旋转轴 手臂能够转向目标姿势。
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