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    Semiconductor device
    2.
    发明申请
    Semiconductor device 审中-公开
    半导体器件

    公开(公告)号：US20060145228A1

    公开(公告)日：2006-07-06

    申请号：US11311268

    申请日：2005-12-20

    申请人： Masaru Kito ,  Ryota Katsumata ,  Hideaki Aochi ,  Nobutoshi Aoki ,  Masaki Kondo ,  Sanae Ito

    发明人： Masaru Kito ,  Ryota Katsumata ,  Hideaki Aochi ,  Nobutoshi Aoki ,  Masaki Kondo ,  Sanae Ito

    IPC分类号： H01L29/94

    CPC分类号： H01L29/66651 ,  H01L27/1087 ,  H01L27/10873 ,  H01L27/10894 ,  H01L29/1037 ,  H01L29/945

    摘要： A semiconductor memory device comprising a semiconductor substrate, element isolating regions formed on the semiconductor substrate, an element forming region provided between the element isolating regions on the semiconductor substrate, the element forming region having a protruding portion, a transistor having a channel formed in the protruding portion of the element forming region, and a capacitor formed in or on the semiconductor substrate to be connected to the transistor, wherein the protruding portion in the element forming region includes first and second inclined and opposed planes arranged along a channel width direction of the transistor, and an upper plane provided between the first and second inclined planes.

    摘要翻译： 一种半导体存储器件，包括半导体衬底，形成在半导体衬底上的元件隔离区域，设置在半导体衬底上的元件隔离区域之间的元件形成区域，具有突出部分的元件形成区域， 所述元件形成区域的突出部分和形成在所述半导体衬底中或与所述晶体管连接的电容器，其中所述元件形成区域中的所述突出部分包括沿着所述晶体管的沟道宽度方向布置的第一和第二倾斜和相对的平面 晶体管，以及设置在第一和第二倾斜平面之间的上平面。

    Semiconductor device
    3.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US07391068B2

    公开(公告)日：2008-06-24

    申请号：US11442352

    申请日：2006-05-30

    申请人： Masaru Kito ,  Ryota Katsumata ,  Hideaki Aochi ,  Nobutoshi Aoki ,  Masaki Kondo ,  Sanae Ito

    发明人： Masaru Kito ,  Ryota Katsumata ,  Hideaki Aochi ,  Nobutoshi Aoki ,  Masaki Kondo ,  Sanae Ito

    IPC分类号： H01L29/00

    CPC分类号： H01L29/1037 ,  H01L29/66795 ,  H01L29/7851 ,  H01L29/7853

    摘要： A semiconductor device comprising at least one FET formed on the semiconductor substrate, wherein the FET comprises a source region, a drain region, a channel region formed between the source and drain regions and including a plurality of projected epitaxial silicon regions arranged in a width direction of the channel region, each of the projected epitaxial silicon regions having a triangular ridge portion, a gate insulating film formed on the channel region, and a gate electrode formed on the gate insulating film.

    摘要翻译： 一种半导体器件，包括形成在所述半导体衬底上的至少一个FET，其中所述FET包括源极区，漏极区，形成在所述源极和漏极区之间的沟道区，并且包括沿宽度方向布置的多个投影外延硅区 的沟道区域，每个投影的外延硅区域具有三角形脊部分，形成在沟道区域上的栅极绝缘膜和形成在栅极绝缘膜上的栅电极。

    Semiconductor device
    4.
    发明申请
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US20060289905A1

    公开(公告)日：2006-12-28

    申请号：US11442352

    申请日：2006-05-30

    申请人： Masaru Kito ,  Ryota Katsumata ,  Hideaki Aochi ,  Nobutoshi Aoki ,  Masaki Kondo ,  Sanae Ito

    发明人： Masaru Kito ,  Ryota Katsumata ,  Hideaki Aochi ,  Nobutoshi Aoki ,  Masaki Kondo ,  Sanae Ito

    IPC分类号： H01L29/76

    CPC分类号： H01L29/1037 ,  H01L29/66795 ,  H01L29/7851 ,  H01L29/7853

    摘要： A semiconductor device comprising at least one FET formed on the semiconductor substrate, wherein the FET comprises a source region, a drain region, a channel region formed between the source and drain regions and including a plurality of projected epitaxial silicon regions arranged in a width direction of the channel region, each of the projected epitaxial silicon regions having a triangular ridge portion, a gate insulating film formed on the channel region, and a gate electrode formed on the gate insulating film.

    摘要翻译： 一种半导体器件，包括形成在所述半导体衬底上的至少一个FET，其中所述FET包括源极区，漏极区，形成在所述源极和漏极区之间的沟道区，并且包括沿宽度方向布置的多个投影外延硅区 的沟道区域，每个投影的外延硅区域具有三角形脊部分，形成在沟道区域上的栅极绝缘膜和形成在栅极绝缘膜上的栅电极。

    Semiconductor memory device
    6.
    发明授权
    Semiconductor memory device 有权
    半导体存储器件

    公开(公告)号：US08829623B2

    公开(公告)日：2014-09-09

    申请号：US12248483

    申请日：2008-10-09

    申请人： Nobutoshi Aoki ,  Takashi Izumida ,  Masaki Kondo ,  Fumitaka Arai

    发明人： Nobutoshi Aoki ,  Takashi Izumida ,  Masaki Kondo ,  Fumitaka Arai

    IPC分类号： H01L27/088 ,  H01L27/115

    CPC分类号： H01L27/11529 ,  H01L27/11524 ,  H01L27/11526

    摘要： According to an aspect of the present invention, there is provided a semiconductor memory device including: a semiconductor substrate having: a contact region; a select gate region; and a memory cell region; a first element isolation region formed in the contact region and having a first depth; a second element isolation region formed in the select gate region and having a second depth; and a third element isolation region formed in the memory cell region and having a third depth which is smaller than the first depth.

    摘要翻译： 根据本发明的一个方面，提供了一种半导体存储器件，包括：半导体衬底，具有：接触区域; 选择栅极区; 和存储单元区域; 形成在所述接触区域中并且具有第一深度的第一元件隔离区; 形成在所述选择栅极区中并具有第二深度的第二元件隔离区; 以及形成在所述存储单元区域中并且具有小于所述第一深度的第三深度的第三元件隔离区域。

    Semiconductor memory device
    7.
    发明授权
    Semiconductor memory device 有权
    半导体存储器件

    公开(公告)号：US08354706B2

    公开(公告)日：2013-01-15

    申请号：US12719193

    申请日：2010-03-08

    申请人： Takahisa Kanemura ,  Tomomi Kusaka ,  Takashi Izumida ,  Masaki Kondo ,  Nobutoshi Aoki

    发明人： Takahisa Kanemura ,  Tomomi Kusaka ,  Takashi Izumida ,  Masaki Kondo ,  Nobutoshi Aoki

    IPC分类号： H01L29/788

    CPC分类号： H01L29/7883 ,  G11C16/0441 ,  H01L21/28273 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/42324

    摘要： A semiconductor memory device according to an embodiment of the present invention includes a substrate, a first gate insulator formed on the substrate and serving as an F-N (Fowler-Nordheim) tunneling film, a first floating gate formed on the first gate insulator, a second gate insulator formed on the first floating gate and serving as an F-N tunneling film, a second floating gate formed on the second gate insulator, an intergate insulator formed on the second floating gate and serving as a charge blocking film, and a control gate formed on the intergate insulator, at least one of the first and second floating gates including a metal layer.

    摘要翻译： 根据本发明实施例的半导体存储器件包括衬底，形成在衬底上并用作FN（Fowler-Nordheim）隧穿膜的第一栅极绝缘体，形成在第一栅绝缘体上的第一浮栅，第二栅绝缘体 形成在第一浮栅上并用作FN隧穿膜的栅极绝缘体，形成在第二栅极绝缘体上的第二浮栅，形成在第二浮栅上并用作电荷阻挡膜的栅极绝缘体，以及形成在栅极绝缘体上的控制栅极 所述隔间绝缘体，所述第一和第二浮动栅极中的至少一个包括金属层。

    Semiconductor memory device
    8.
    发明授权
    Semiconductor memory device 有权
    半导体存储器件

    公开(公告)号：US08289782B2

    公开(公告)日：2012-10-16

    申请号：US12719420

    申请日：2010-03-08

    申请人： Takashi Izumida ,  Tomomi Kusaka ,  Masaki Kondo ,  Nobutoshi Aoki

    发明人： Takashi Izumida ,  Tomomi Kusaka ,  Masaki Kondo ,  Nobutoshi Aoki

    IPC分类号： G11C16/04

    CPC分类号： H01L29/7881 ,  G11C16/0408 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11531 ,  H01L29/42332 ,  H01L29/7887

    摘要： A semiconductor memory device according to an embodiment of the present invention includes a substrate, a gate insulator formed on the substrate and serving as an F-N (Fowler-Nordheim) tunneling film, a first floating gate formed on the gate insulator, a first intergate insulator formed on the first floating gate and serving as an F-N tunneling film, a second floating gate formed on the first intergate insulator, a second intergate insulator formed on the second floating gate and serving as a charge blocking film, and a control gate formed on the second intergate insulator.

    摘要翻译： 根据本发明的实施例的半导体存储器件包括：衬底，形成在衬底上并用作FN（Fowler-Nordheim）隧穿膜的栅极绝缘体，形成在栅极绝缘体上的第一浮栅，第一栅极绝缘体 形成在第一浮栅上并用作FN隧道膜，形成在第一栅极绝缘体上的第二浮栅，形成在第二浮栅上并用作电荷阻挡膜的第二栅极绝缘体，以及形成在第一浮栅上的控制栅 第二隔间绝缘子。

    Nonvolatile semiconductor memory device and method of manufacturing the same
    9.
    发明授权
    Nonvolatile semiconductor memory device and method of manufacturing the same 失效
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US08686488B2

    公开(公告)日：2014-04-01

    申请号：US13602634

    申请日：2012-09-04

    申请人： Masaki Kondo ,  Nobutoshi Aoki ,  Takashi Izumida ,  Tomomi Yoda

    发明人： Masaki Kondo ,  Nobutoshi Aoki ,  Takashi Izumida ,  Tomomi Yoda

    IPC分类号： H01L29/788 ,  H01L21/4763

    CPC分类号： H01L29/788 ,  H01L21/28273 ,  H01L27/11521 ,  H01L29/4916 ,  H01L29/66825 ,  H01L29/7883

    摘要： According to one embodiment, a nonvolatile semiconductor memory device includes a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a floating gate electrode formed on the gate insulating film, made of polysilicon containing a p-type impurity as a group XIII element, and having a lower film and an upper film stacked on the lower film, an inter-electrode insulating film formed on the floating gate electrode, and a control gate electrode formed on the inter-electrode insulating film. One of a concentration and an activation concentration of the p-type impurity in the upper film is higher than one of a concentration and an activation concentration of the p-type impurity in the lower film.

    摘要翻译： 根据一个实施例，非易失性半导体存储器件包括半导体衬底，形成在半导体衬底上的栅绝缘膜，形成在栅极绝缘膜上的浮栅，由含有p型杂质的多晶硅组成， 并且具有层叠在下膜上的下膜和上膜，形成在浮栅上的电极间绝缘膜和形成在电极间绝缘膜上的控制栅电极。 上膜中的p型杂质的浓度和活化浓度之一高于下膜中的p型杂质的浓度和活化浓度之一。

    SEMICONDUCTOR STORAGE DEVICE
    10.
    发明申请
    SEMICONDUCTOR STORAGE DEVICE 失效
    半导体存储设备

    公开(公告)号：US20100295112A1

    公开(公告)日：2010-11-25

    申请号：US12721757

    申请日：2010-03-11

    申请人： Takashi Izumida ,  Nobutoshi Aoki ,  Masaki Kondo ,  Takahisa Kanemura

    发明人： Takashi Izumida ,  Nobutoshi Aoki ,  Masaki Kondo ,  Takahisa Kanemura

    IPC分类号： H01L27/115

    CPC分类号： H01L21/28273 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/66825 ,  H01L29/7883

    摘要： A semiconductor storage device has a semiconductor substrate, a plurality of first insulating films formed on the semiconductor substrate with predetermined spacing therebetween, an element isolation region formed between the first insulating films in a first direction, a floating gate electrode comprising a first charge accumulation film formed on the first insulating film, a second charge accumulation film formed on the first charge accumulation film and having a width in a second direction orthogonal to the first direction smaller than the width of the first charge accumulation film, and a third charge accumulation film formed on the second charge accumulation film and having the width in the second direction larger than the width of the second charge accumulation film, a second insulating film formed on the second charge accumulation film and between the second charge accumulation film and the element isolation region, a third insulating film formed on the charge accumulation film and the element isolation region along the second direction, and a control gate electrode formed on the third insulating film.

    摘要翻译： 半导体存储装置具有半导体基板，在半导体基板上形成有规定间隔的多个第一绝缘膜，在第一方向上形成在第一绝缘膜之间的元件隔离区域，包括第一电荷累积膜的浮栅电极 形成在所述第一绝缘膜上的第二电荷累积膜，形成在所述第一电荷累积膜上并且具有与所述第一方向正交的第二方向的宽度小于所述第一电荷累积膜的宽度的第二电荷累积膜，以及形成的第三电荷累积膜 在第二电荷累积膜上并且具有大于第二电荷累积膜的宽度的第二方向的宽度，形成在第二电荷累积膜上以及在第二电荷累积膜和元件隔离区之间的第二绝缘膜， 形成在电荷累积膜上的第三绝缘膜 和沿着第二方向的元件隔离区域，以及形成在第三绝缘膜上的控制栅极电极。