公开(公告)号：US06534384B2

公开(公告)日：2003-03-18

申请号：US09324939

申请日：1999-06-03

申请人： Masatake Nakano ,  Katsuo Yoshizawa

发明人： Masatake Nakano ,  Katsuo Yoshizawa

IPC分类号： H01L2146

CPC分类号： H01L21/2007 ,  H01L21/76251 ,  H01L21/76256

摘要： A method for manufacturing an SOI wafer. The method includes forming an oxide film on a surface of at least one silicon wafer of two silicon wafers. The method also includes bonding the silicon wafers through the oxide film at room temperature to form a room temperature bond end, one of the two silicon wafers being a bond wafer. The method further includes heat treating the wafers in an oxidizing atmosphere to form a heat treatment bond end. Thereafter, an outer periphery of the bond wafer is removed from an outer peripheral edge of the bond wafer up to a region between the room temperature bond end and the heat treatment bond end. The thickness of the bond wafer is reduced to form an SOI layer.

摘要翻译： 一种制造SOI晶片的方法。 该方法包括在两个硅晶片的至少一个硅晶片的表面上形成氧化膜。 该方法还包括在室温下将硅晶片粘合通过氧化膜以形成室温结合端，两个硅晶片之一是接合晶片。 该方法还包括在氧化气氛中热处理晶片以形成热处理粘结端。 此后，将接合晶片的外周从接合晶片的外周边缘去除至室温接合端与热处理接合端之间的区域。 接合晶片的厚度减小以形成SOI层。

公开(公告)号：US07186628B2

公开(公告)日：2007-03-06

申请号：US10500381

申请日：2003-01-07

申请人： Masatake Nakano

发明人： Masatake Nakano

IPC分类号： H01L21/30

CPC分类号： H01L21/76254 ,  H01L21/3225 ,  H01L21/3226

摘要： When an SOI wafer is produced by using a bond wafer made of silicon single crystal to form an SOI layer and a base wafer made of silicon single crystal to be a support substrate, one silicon wafer selected from a group consisting of an epitaxial wafer, an FZ wafer, a nitrogen doped wafer, a hydrogen annealed wafer, an intrinsic gettering wafer, a nitrogen doped and annealed wafer, and an entire N-region wafer is used as the bond wafer. Thereby, even where a thin insulator film or a thin SOI layer is formed in the SOI wafer, COPs are hardly detected in inspection of the SOI layer after the SOI wafer was completed, and a high quality SOI wafer is provided.

摘要翻译： 当通过使用由硅单晶制成的接合晶片以形成SOI层和由硅单晶制成的基底晶片作为支撑衬底来制造SOI晶片时，选自由外延晶片， FZ晶片，氮掺杂晶片，氢退火晶片，固有吸杂晶片，氮掺杂和退火晶片以及整个N区晶片用作接合晶片。 由此，即使在SOI晶片中形成薄的绝缘膜或薄的SOI层的情况下，在SOI晶片的SOI晶片完成后的检查中几乎不检测到COP，也提供了高质量的SOI晶片。

公开(公告)号：US06900113B2

公开(公告)日：2005-05-31

申请号：US10296900

申请日：2001-05-29

申请人： Masatake Nakano ,  Isao Yokokawa ,  Kiyoshi Mitani

发明人： Masatake Nakano ,  Isao Yokokawa ,  Kiyoshi Mitani

IPC分类号： H01L21/30 ,  H01L21/46 ,  H01L21/762 ,  H01L27/12

CPC分类号： H01L21/76254 ,  Y10S438/974 ,  Y10S438/977

摘要： The present invention provides a method for producing a bonded wafer comprising at least an ion implantation process where at least either hydrogen ions or rare gas ions are implanted into a first wafer from its surface to form a micro bubble layer (implanted layer) in the first wafer, a bonding process where the surface subjected to the ion implantation of the first wafer is bonded to a surface of a second wafer, and a delamination process where the first wafer is delaminated at the micro bubble layer, wherein the ion implantation process is performed in divided multiple steps, and a bonded wafer. Thus, there are provided a method for producing a bonded wafer, which is for reducing micro-voids generated in the ion implantation and delamination method and a bonded wafer free from micro-voids.

摘要翻译： 本发明提供了一种制造接合晶片的方法，其至少包括离子注入工艺，其中至少一种氢离子或稀有气体离子从其表面注入到第一晶片中，以在第一晶片中形成微气泡层（注入层） 晶片，其中经受第一晶片的离子注入的表面被接合到第二晶片的表面的接合工艺以及第一晶片在微气泡层处分层的分层过程，其中执行离子注入工艺 分割多个步骤，以及粘合晶片。 因此，提供了一种制造用于减少在离子注入和分层方法中产生的微孔的接合晶片的方法和没有微孔的接合晶片。

公开(公告)号：US6004866A

公开(公告)日：1999-12-21

申请号：US808655

申请日：1997-02-28

申请人： Masatake Nakano ,  Kiyoshi Mitani ,  Masahiro Sakai

发明人： Masatake Nakano ,  Kiyoshi Mitani ,  Masahiro Sakai

IPC分类号： H01L21/302 ,  H01L21/02 ,  H01L21/20 ,  H01L21/304 ,  H01L21/3065 ,  H01L27/12 ,  H01L21/30 ,  H01L21/46 ,  H01L21/461

CPC分类号： H01L21/2007

摘要： A method for manufacturing a bonded wafer comprises the steps of; mirror-polishing a surface of first and second substrates, bringing the mirror-polished surfaces of the substrates contact with each other to join them, and subjecting the substrates to a heat treatment to firmly bond them. One of the surfaces of the first and second substrates prior to bonding, or one surface of the bonded wafer is subjected to a polishing treatment for exerting little influence by irregularities on a rear surface of the one substrate or by a figure of a surface of a polishing plate which is in contact with the rear surface of the one substrate.

摘要翻译： 一种接合晶片的制造方法，包括以下步骤： 对第一基板和第二基板的表面进行镜面抛光，使基板的镜面抛光表面相互接触，使基板经受热处理以使其牢固地结合。 在接合之前的第一和第二基板的表面之一或接合的晶片的一个表面经受抛光处理，以在一个基板的后表面上或由一个基板的表面的图形施加不规则的影响 抛光板，其与一个基板的后表面接触。

公开(公告)号：US20060152600A1

公开(公告)日：2006-07-13

申请号：US10519477

申请日：2004-03-23

申请人： Hiroaki Hamada ,  Masatake Nakano

发明人： Hiroaki Hamada ,  Masatake Nakano

IPC分类号： H04N5/76

CPC分类号： H04N5/772 ,  H04M1/0214 ,  H04M1/72555 ,  H04N1/2137

摘要： A mobile phone generates respective thumbnail image data of a plurality of original image data obtained by a user in an image pickup unit with a continuous photographing form, and temporarily stores in a first memory together with the original image data. The mobile phone then displays an overview of the thumbnail image data on a display unit and, immediately thereafter, can continuously display the plurality of original image data on the display unit. The user can determine whether to store the data or not corresponding to a state of playback thereof. When the user directs to store the original image data, the original image data is permanently stored in a second memory.

摘要翻译： 移动电话产生由用户在具有连续拍摄形式的图像拾取单元中获得的多个原始图像数据的各自的缩略图数据，并且与原始图像数据一起临时存储在第一存储器中。 然后，移动电话在显示单元上显示缩略图数据的概况，并且此后可以在显示单元上连续显示多个原始图像数据。 用户可以根据其回放的状态确定是否存储数据。 当用户指示存储原始图像数据时，原始图像数据被永久存储在第二存储器中。

公开(公告)号：US06797632B1

公开(公告)日：2004-09-28

申请号：US09857569

申请日：2001-06-07

申请人： Masatake Nakano ,  Kiyoshi Mitani ,  Shinichi Tomizawa

发明人： Masatake Nakano ,  Kiyoshi Mitani ,  Shinichi Tomizawa

IPC分类号： H01I21302

CPC分类号： H01L21/76254

摘要： In a method for producing a bonding wafer by the hydrogen ion delamination method comprising at least a step of bonding a base wafer and a bond wafer having a micro bubble layer formed by gas ion implantation and a step of delaminating them at the micro bubble layer as a border, a peripheral portion of a thin film formed on the base wafer is removed after the delamination step. Preferably, a region of 1-5 mm from the peripheral end of the base wafer is removed. In the production of a bonding wafer by the hydrogen ion delamination method, there can be provided a bonding wafer free from problems such as generation of particles from peripheral portion of the wafer and generation of cracks in the SOI layer.

摘要翻译： 在通过氢离子分层方法制造接合晶片的方法中，至少包括将基底晶片和具有通过气体离子注入形成的微气泡层的接合晶片和在微气泡层分层的步骤， 在分层步骤之后，除去在基底晶片上形成的薄膜的周边部分的边界。 优选地，从基底晶片的外周端开始1-5mm的区域。 在通过氢离子分层方法制造接合晶片的过程中，可以提供没有晶片周边部分产生颗粒的问题的接合晶片和SOI层中的裂纹的产生。

公开(公告)号：US08466538B2

公开(公告)日：2013-06-18

申请号：US12867922

申请日：2009-02-19

申请人： Tohru Ishizuka ,  Nobuhiko Noto ,  Norihiro Kobayashi ,  Masatake Nakano

发明人： Tohru Ishizuka ,  Nobuhiko Noto ,  Norihiro Kobayashi ,  Masatake Nakano

IPC分类号： H01L29/04

CPC分类号： H01L21/76254 ,  H01L29/045 ,  H01L29/78603

摘要： The present invention is an SOI wafer comprising at least: an SOI layer; a silicon oxide film; and a base wafer, wherein the SOI layer has a plane orientation of (100), and the base wafer has a resistivity of 100 Ω·cm or more and a plane orientation different from (100). As a result, there is provided the SOI wafer and the manufacturing method thereof that have no complicated manufacturing step, defects on a bonding interface which are not practically a problem in number and a high interface state density (Dit) for trapping carriers on an interface of a BOX layer and the base wafer.

摘要翻译： 本发明是至少包括SOI层的SOI晶片; 氧化硅膜; 和基底晶片，其中所述SOI层具有（100）的平面取向，并且所述基底晶片的电阻率为100Ω·cm以上且平面取向不同于（100）。 结果，提供了没有复杂的制造步骤的SOI晶片及其制造方法，接合界面上的缺陷在数量上几乎不成问题，并且用于在接口上捕获载体的高界面态密度（Dit） 的BOX层和基底晶片。

公开(公告)号：US07531425B2

公开(公告)日：2009-05-12

申请号：US10495102

申请日：2002-11-19

申请人： Masatake Nakano ,  Shinichi Tomizawa ,  Kiyoshi Mitani

发明人： Masatake Nakano ,  Shinichi Tomizawa ,  Kiyoshi Mitani

IPC分类号： H01L21/30

CPC分类号： H01L21/30608 ,  H01L21/02052 ,  H01L21/304 ,  H01L21/76254

摘要： This invention relates to a method of fabricating a bonded wafer 39 in which a bond wafer 31 and a base wafer 32, both of which are composed of silicon single crystal, are bonded while placing an oxide film 33 in between, and the bond wafer 31 is thinned. Use of modified chemically-etched wafers as both of the bond wafer 31 and base wafer 32 is successful in reducing an unbonded area UA therebetween after annealing for bonding, where the modified chemically-etched wafer refers to a wafer which is etched by alkali etching and succeeding acid etching, while setting etching amount larger in the alkali etching than in the acid etching.

摘要翻译： 本发明涉及一种制造接合晶片39的方法，其中将两个由硅单晶组成的接合晶片31和基底晶片32在其间放置氧化膜33的同时被接合，并且接合晶片31 变薄了 使用改性的化学蚀刻晶片作为接合晶片31和基底晶片32两者成功地在退火后还原其中的未结合区域UA，其中修改的化学蚀​​刻晶片是指通过碱蚀刻蚀刻的晶片， 同时在碱蚀刻中设置蚀刻量比在酸蚀刻中更大。

公开(公告)号：US5376215A

公开(公告)日：1994-12-27

申请号：US151209

申请日：1993-11-12

申请人： Yutaka Ohta ,  Masatake Nakano ,  Masatake Katayama ,  Takao Abe

发明人： Yutaka Ohta ,  Masatake Nakano ,  Masatake Katayama ,  Takao Abe

IPC分类号： H01L21/302 ,  G01B11/06 ,  H01L21/3065 ,  H01L21/66 ,  H01L21/762 ,  H01L27/12 ,  B44C1/22 ,  C03C15/00 ,  H01L21/306

CPC分类号： H01L21/76251 ,  G01B11/0683 ,  H01L21/3065 ,  H01L22/12 ,  H01L22/20

摘要： A method and apparatus for uniformizing a bonded SOI (silicon on insulator) thin film layer by the reaction of chemical vapor-phase corrosion excited by the ultraviolet light, which effect the measurement of film thickness efficiently and conveniently and consequently attaining highly accurate control of the dispersion of thickness of the thin film layer without requiring the substrate to be removed from the reaction vessel for chemical vapor-phase corrosion on each occasion of the measurement or necessitating installation of a mechanism for alteration of the position of measurement inside or outside the reaction vessel are disclosed. The measurement of film thickness is carried out by keeping observation of interference fringes due to distribution of thickness of the film layer.

摘要翻译： 通过由紫外光激发的化学气相腐蚀的反应使接合的SOI（绝缘体上硅）层均匀化的方法和装置，其有效和方便地实现膜厚度的测量，从而实现对 在每次测量时，不需要从用于化学气相腐蚀的反应容器中除去衬底的薄膜层的厚度分散，或者需要安装用于改变反应容器内部或外部的测量位置的机构 被披露。 通过保持观察由于膜层的厚度分布引起的干涉条纹来进行膜厚度的测量。

公开(公告)号：US5240883A

公开(公告)日：1993-08-31

申请号：US841166

申请日：1992-02-25

申请人： Takao Abe ,  Masatake Katayama ,  Akio Kanai ,  Konomu Ohki ,  Masatake Nakano

发明人： Takao Abe ,  Masatake Katayama ,  Akio Kanai ,  Konomu Ohki ,  Masatake Nakano

IPC分类号： H01L21/02 ,  H01L21/20 ,  H01L21/304 ,  H01L21/3063 ,  H01L21/762 ,  H01L27/12

CPC分类号： H01L21/2007 ,  H01L21/3063 ,  H01L21/76251 ,  Y10S148/127 ,  Y10S148/135 ,  Y10S438/924

摘要： A thin Silicon film On Insulator (SOI) material fabricating method which is capable of providing a very high thickness uniformity of the silicon film, a process simplification and a considerable reduction of processing cost is disclosed, in which a silicon oxide film is formed on one or both of a p-type silicon bond wafer and a silicon base wafer, then the two wafers are bonded together through the silicon oxide film, subsequently a fixed positive charge is induced in the silicon oxide film to form a n-type inversion layer in the p-type silicon bond wafer adjacent to an interface between the p-type silicon bond wafer and the silicon oxide film layer, and thereafter a chemical etching is effected while applying a positive voltage to the p-type silicon bond wafer so that an etch-stop is made at an interface between a depletion layer including the n-type inversion layer and the p-type layer.