公开(公告)号：US08446020B2

公开(公告)日：2013-05-21

申请号：US12902527

申请日：2010-10-12

申请人： Masateru Koide ,  Daisuke Mizutani ,  Aiichiro Inoue ,  Hideo Yamashita ,  Iwao Yamazaki ,  Masayuki Kato ,  Seiji Ueno ,  Kazuyuki Imamura

发明人： Masateru Koide ,  Daisuke Mizutani ,  Aiichiro Inoue ,  Hideo Yamashita ,  Iwao Yamazaki ,  Masayuki Kato ,  Seiji Ueno ,  Kazuyuki Imamura

IPC分类号： H01L23/48

CPC分类号： H01L23/49827 ,  H01L23/49822 ,  H01L23/66 ,  H01L24/16 ,  H01L25/0655 ,  H01L2224/131 ,  H01L2224/16235 ,  H01L2224/73253 ,  H01L2924/0001 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00

摘要： A multi-chip module includes: a board; a wiring board disposed on the board and including a wiring pattern; and a plurality of chips disposed on the wiring board. Each of the plurality of chips is connected with at least one of the other chips, and the plurality of chips and the board are electrically connected with each other via a portion other than the wiring pattern of the wiring board.

摘要翻译： 多芯片模块包括：板; 布线板，其布置在所述板上并且包括布线图案; 以及配置在配线基板上的多个芯片。 多个芯片中的每一个与其他芯片中的至少一个连接，并且多个芯片和板通过布线板的布线图案之外的部分彼此电连接。

公开(公告)号：US08468397B2

公开(公告)日：2013-06-18

申请号：US12974336

申请日：2010-12-21

申请人： Iwao Yamazaki

发明人： Iwao Yamazaki

IPC分类号： G06F11/00 ,  H04L1/24

CPC分类号： H04L1/241 ,  G06F11/2215 ,  G06F11/267

摘要： An error controlling system includes a plurality of error generation target circuits, a plurality of pseudo error generating devices each having a pseudo error content holding register that holds directed pseudo error content, each plurality of pseudo error generating device generates a pseudo error corresponding to a pseudo error content held in a respective pseudo error content holding register in at least one of data to be written to one of the plurality of error generation target circuits and data to be read from one of the plurality of error generation target circuits upon being directed to generate the pseudo error, and a pseudo error controlling device that directs the plurality of pseudo error generating devices to generate a pseudo error corresponding to a respective pseudo error content held in each of the pseudo error content holding register provided in each of the plurality of pseudo error generating devices.

摘要翻译： 误差控制系统包括多个误差产生目标电路，多个伪误差产生装置，每个具有保持定向伪误差内容的伪误差内容保持寄存器，每个伪误差产生装置产生与伪伪对象相对应的伪误差 在要被写入多个错误产生目标电路之一的数据中的至少一个中保存在相应的伪错误内容保持寄存器中的错误内容以及在被指示生成时将从多个错误产生目标电路之一读取的数据 所述伪错误控制装置和伪错误控制装置，其指示所述多个伪错误生成装置生成与在所述多个伪错误中的每一个中提供的所述伪错误内容保持寄存器中的每一个中保持的各个伪错误内容相对应的伪错误 生成设备。

公开(公告)号：US20120253246A1

公开(公告)日：2012-10-04

申请号：US13509148

申请日：2011-11-21

申请人： Iwao Yamazaki ,  Kazunori Yamanaka

发明人： Iwao Yamazaki ,  Kazunori Yamanaka

IPC分类号： A61H23/02

CPC分类号： A61H23/006 ,  A61H39/04 ,  A61H2201/1215 ,  A61H2201/149 ,  A61H2201/1664 ,  A61H2201/1685 ,  A61H2201/5043 ,  A61N1/0428 ,  A61N1/303

摘要： In the tapping device for producing beautiful skin, a Head contacts with skin. A Tapping mechanism pats the skin facing the Head with a Pad. The Tapping mechanism is equipped with the Pad at one end, and has a Shaft from which the Head projects and rolls back by piston actions. A Biasing member biases the Shaft toward one side of the piston actions. A Wire rod empowers the Shaft towards the direction resisting the biasing power of the Biasing member when tension is provided. An Actuator provides tension intermittently in a Wire rod, the tension of the wire rod and biasing of the bias member providing piston actions.

摘要翻译： 在用于生产美丽皮肤的攻丝装置中，头部与皮肤接触。 攻丝机构用垫子拍打面对头部的皮肤。 攻丝机构在一端配备了垫，并具有一个轴，头部通过活塞活动弹出并回滚。 偏心构件将轴朝向活塞的一侧偏压。 当提供张力时，线杆使轴向抵抗偏压构件的偏置力的方向。 致动器在线棒中间歇地提供张力，线材的张力和偏置构件的偏压提供活塞动作。

公开(公告)号：US07819782B2

公开(公告)日：2010-10-26

申请号：US11812009

申请日：2007-06-14

申请人： Iwao Yamazaki

发明人： Iwao Yamazaki

IPC分类号： A63B69/08 ,  A63B21/068 ,  A63B21/008

CPC分类号： A63B69/06 ,  A63B21/0087 ,  A63B22/0012 ,  A63B22/205 ,  A63B23/0211 ,  A63B2022/0033 ,  A63B2022/0038 ,  A63B2208/0238 ,  A63B2225/09

摘要： An exercise machine includes a supporting stage; a saddle arranged relatively for said supporting stage; a pedaling stage with a pair of pedals arranged relatively for said supporting stage; and a handle arranged relatively for said supporting stage. The pedaling stage is configured such that the pair of pedals are connected with one another via a first air pump.

摘要翻译： 运动器械包括支撑台; 相对于所述支撑台布置的鞍座; 一个踩踏台，一对相对于所述支撑台排列的踏板; 以及相对于所述支撑台布置的手柄。 蹬踏台构造成使得该对踏板通过第一气泵相互连接。

公开(公告)号：US07818545B2

公开(公告)日：2010-10-19

申请号：US10983729

申请日：2004-11-09

申请人： Takashi Miura ,  Iwao Yamazaki

发明人： Takashi Miura ,  Iwao Yamazaki

IPC分类号： G06F9/00

CPC分类号： G06F9/30043 ,  G06F9/3824 ,  G06F9/3826 ,  G06F9/3834 ,  G06F9/3842 ,  G06F9/3861

摘要： In order to increase the operation efficiency of the operation register for holding store data when executing store instructions to store data in a predetermined store area on the main memory or the cache memory, in the present invention, an instruction processing section is adapted so as, when an operation register holding the operation result is determined causes the operation result to be issued from the operation register to store buffers as store data; when the store data are held by the store buffers before the store instruction is held by store ports, a restraint section restrains a reset section from setting a store data hold flag to OFF at a point of time when the store instruction is held by the store ports to maintain the store data hold flag to ON.

摘要翻译： 为了在执行存储指令以在主存储器或高速缓冲存储器上的预定存储区域中存储数据时提高用于保存存储数据的操作寄存器的操作效率，在本发明中，指令处理部分被适配为， 当保持操作结果的操作寄存器被确定时，使得操作结果从操作寄存器发出以存储缓冲器作为存储数据; 当存储数据在存储指令由存储端口保持之前由存储缓冲器保持时，约束部分限制复位部分在存储指令由存储器保存的时间点将存储数据保持标志设置为OFF 端口将存储数据保持标志保持为ON。

公开(公告)号：US07764991B2

公开(公告)日：2010-07-27

申请号：US10517490

申请日：2003-06-09

申请人： Iwao Yamazaki ,  Akitsugu Yamazaki

发明人： Iwao Yamazaki ,  Akitsugu Yamazaki

IPC分类号： A61B5/05

CPC分类号： A61B5/4872 ,  A61B5/0537 ,  A61B5/742 ,  A61N1/08

摘要： A display of the quantities of bone, water and/or muscle and a pulse health instrument in which the weight of bone or the weight rate of bone, the quantity of water and/or the quantity of muscle are measured and displayed to serve for sound diet and health management. Body fat rate is calculated by measuring the body impedance, quantity of bone, weight of bone, weight rate of bone, quantity of water and/or quantity of muscle are calculated based on the body fat rate and personal information inputted from a user, e.g. sex, age, height, body weight, length around wrist, length around ankle, and the like, and the results are displayed at a display section 105. Furthermore, the type of quantity of bone based on the correlation between the weight rate of bone and the body weight is judged and displayed in the matrix display region 111 of the display section 105.

摘要翻译： 显示骨骼，水和/或肌肉的数量和脉搏健康器械，其中测量和显示骨骼的重量或骨骼的重量比，水的量和/或肌肉量用于声音 饮食和健康管理。 基于从用户输入的身体脂肪率和个人信息，例如，通过测量体阻抗，骨量，骨重量，骨量，水量和/或肌肉量来计算身体脂肪率。 性别，年龄，身高，体重，手腕周围的长度，踝关节周围的长度等，并将结果显示在显示部分105.此外，骨骼的类型根据骨骼的重量比之间的相关性 并且在显示部105的矩阵显示区域111中判断并显示体重。

公开(公告)号：US07487295B2

公开(公告)日：2009-02-03

申请号：US10991871

申请日：2004-11-19

申请人： Iwao Yamazaki

发明人： Iwao Yamazaki

IPC分类号： G06F12/08

CPC分类号： G06F12/084 ,  G06F12/0842 ,  G06F12/0859

摘要： A central processor requests for reference to data stored in a main storage for each of a plurality of threads. A thread identification information obtaining unit obtains thread identification information that identifies the threads. A valid MIB detector detects the number of the primary cache MIBs that hold requests of the cache for reference to data stored in the mains storage, for each thread based on the thread identification information. The MIB controller controls to hold reference requests in the primary cache MIBs such that the number of the primary cache MIBs detected for each thread does not exceed a predetermined number.

摘要翻译： 中央处理器请求参考存储在多个线程中的每一个的主存储器中的数据。 线程识别信息获取单元获取标识线程的线程识别信息。 有效的MIB检测器基于线程标识信息检测针对每个线程的存储缓存请求的主缓存MIB的数量，以参考存储在主存储器中的数据。 MIB控制器控制在主缓存MIB中保存引用请求，使得为每个线程检测到的主缓存MIB的数量不超过预定数量。

公开(公告)号：US07373478B2

公开(公告)日：2008-05-13

申请号：US10986017

申请日：2004-11-12

申请人： Iwao Yamazaki

发明人： Iwao Yamazaki

IPC分类号： G06F12/10

CPC分类号： G06F9/30047 ,  G06F12/0862 ,  G06F12/1027 ,  G06F2212/6028 ,  G06F2212/654 ,  G06F2212/681 ,  G06F2212/684

摘要： In an information processing apparatus (10) that includes a cache memory (560) formed from at least one hierarchy, and a pre-fetch command that speculatively transfers data or a command from a main storage (30) to the cache memory, a cache controller (510) provides control to execute the pre-fetch command such that a virtual address is converted to a physical address using a conversion table, and the virtual address and the physical address are stored as a pair if the conversion succeeds.

摘要翻译： 在包括由至少一个层次形成的高速缓存存储器（560）的信息处理设备（10）和将主存储器（30）中的数据或命令推测性地传送到高速缓存存储器的预取命令中， 控制器（510）提供控制以执行预取命令，使得使用转换表将虚拟地址转换为物理地址，并且如果转换成功则虚拟地址和物理地址被存储为一对。

公开(公告)号：US07214222B2

公开(公告)日：2007-05-08

申请号：US10470333

申请日：2002-01-29

申请人： Iwao Yamazaki ,  Yoshihiro Izawa ,  Akitsugu Yamazaki

发明人： Iwao Yamazaki ,  Yoshihiro Izawa ,  Akitsugu Yamazaki

IPC分类号： A61B18/18 ,  A61B18/22

CPC分类号： A61B18/203 ,  A61B2018/00452 ,  A61B2018/00476 ,  A61B2018/208

摘要： A laser depilating method for depilating treatment by irradiating a skin surface with a laser beam emitted from a semiconductor laser. A treatment region of the skin surface is treated with a semiconductor laser beam for an irradiation time of 100 msec or more per irradiation while controlling the laser beam so that the energy density when irradiating the skin surface may be in a range of 0.01–1 J/mm2. Irradiation of the skin surface with a semiconductor laser beam under such a condition provides a more secure and efficient treatment effect of laser depilation. A plurality of semiconductor laser beams are used as necessary to irradiate a wider area of skin surface at a time.

摘要翻译： 一种通过用从半导体激光器发射的激光束照射皮肤表面来脱毛治疗的激光脱毛方法。 皮肤表面的处理区域通过半导体激光束进行处理，每次照射的照射时间为100msec以上，同时控制激光束，使得当照射皮肤表面时的能量密度可以在0.01-1J / mm 2。 在这种条件下用半导体激光束照射皮肤表面提供了激光脱毛更加安全有效的治疗效果。 根据需要使用多个半导体激光束，以一次照射较宽面积的皮肤表面。

公开(公告)号：US20060026399A1

公开(公告)日：2006-02-02

申请号：US10983729

申请日：2004-11-09

申请人： Takashi Miura ,  Iwao Yamazaki

发明人： Takashi Miura ,  Iwao Yamazaki

IPC分类号： G06F9/00

CPC分类号： G06F9/30043 ,  G06F9/3824 ,  G06F9/3826 ,  G06F9/3834 ,  G06F9/3842 ,  G06F9/3861

摘要： In order to increase the operation efficiency of the operation register for holding store data when executing store instruction to store data in a predetermined store area on the main memory or the cache memory, in the present invention, an instruction processing section is adapted so as, when an operation register holding the operation result is determined, causes the operation result to be issued from the operation register to store buffers as store data; when the store data are held by the store buffers before the store instruction is held by store ports, a restraint section restrains a reset section from setting a store data hold flag to OFF at a point of time when the store instruction is held by the store ports to maintain the store data hold flag to ON.

摘要翻译： 为了在执行存储指令以在主存储器或高速缓冲存储器上的预定存储区域中存储数据时提高用于保存存储数据的操作寄存器的操作效率，在本发明中，指令处理部分被适配成， 当确定保持操作结果的操作寄存器时，使得从操作寄存器发出操作结果以将缓冲器存储为存储数据; 当存储数据在存储指令由存储端口保持之前由存储缓冲器保持时，约束部分限制复位部分在存储指令由存储器保存的时间点将存储数据保持标志设置为OFF 端口将存储数据保持标志保持为ON。