公开(公告)号：US20080227752A1

公开(公告)日：2008-09-18

申请号：US11630078

申请日：2005-06-28

申请人： Matthew A. Nugent ,  Edward Hsia ,  Jo Ann Buczek-Thomas

发明人： Matthew A. Nugent ,  Edward Hsia ,  Jo Ann Buczek-Thomas

IPC分类号： A61K31/715 ,  A61P27/02 ,  A61P11/00 ,  A61P35/04 ,  A61P9/00

CPC分类号： A61K31/727

摘要： The present invention is directed to methods for inhibition of histone acetyltransferases using glycosaminoglycans. The invention is further directed to methods for treating disorders associated with hyperacetylation by administration of glycosaminoglycans to a patient in need thereof. In one preferred embodiment, the glycosaminoglycan is a heparin or heparan sulfate oligosaccharide. Studies show that removal of sulfate residues from the O-positions of either the uronic acid or the glucosamine did not eliminate the inhibitory activity of heparan sulfate. Since a majority of heparan sulfate binding proteins appear to require O-sulfation, molecules without certain O-sulfations can be used to inhibit HATs while not interacting with most known heparin-binding proteins. In addition, specific sequences of heparin/heparan sulfate can be used to specifically inhibit various HATs.

摘要翻译： 本发明涉及使用糖胺聚糖抑制组蛋白乙酰转移酶的方法。 本发明还涉及通过向有需要的患者施用糖胺聚糖来治疗与超乙酰化相关的病症的方法。 在一个优选的实施方案中，糖胺聚糖是肝素或硫酸乙酰肝素寡糖。 研究表明，从糖醛酸或葡糖胺的O-位去除硫酸盐残留物并没有消除硫酸乙酰肝素的抑制活性。 由于大多数硫酸乙酰肝素结合蛋白似乎需要O-硫酸化，因此没有某些O-硫酸化的分子可用于抑制HAT，而不与大多数已知的肝素结合蛋白相互作用。 此外，肝素/硫酸乙酰肝素的特异性序列可用于特异性抑制各种HAT。

公开(公告)号：US06775187B1

公开(公告)日：2004-08-10

申请号：US10422489

申请日：2003-04-24

申请人： Darlene G. Hamilton ,  Edward F. Runnion ,  Edward Hsia ,  Kulachet Tanpairoj

发明人： Darlene G. Hamilton ,  Edward F. Runnion ,  Edward Hsia ,  Kulachet Tanpairoj

IPC分类号： G11C1604

CPC分类号： G11C16/10 ,  G11C16/0475

摘要： A method of programming a dual cell memory device having a first charge storing cell and second charge storing cell. The first charge storing cell can be pre-read to determine if the first charge storing cell stores an amount of charge to increase a threshold voltage of the memory device over a specified threshold voltage. If not, the second charge storing cell can be programmed with a standard program pulse. If so, the second charge storing cell can be programed with a modified program pulse.

摘要翻译： 一种编程具有第一电荷存储单元和第二电荷存储单元的双单元存储器件的方法。 可以预先读取第一电荷存储单元，以确定第一电荷存储单元是否存储一定量的电荷以增加存储器件的阈值电压超过指定的阈值电压。 如果不是，则可以用标准编程脉冲编程第二电荷存储单元。 如果是这样，则可以用修改的编程脉冲对第二电荷存储单元进行编程。

公开(公告)号：US10251885B2

公开(公告)日：2019-04-09

申请号：US13322667

申请日：2010-05-27

申请人： Jon Lenn ,  Hans Hofland ,  Edward Hsia

发明人： Jon Lenn ,  Hans Hofland ,  Edward Hsia

IPC分类号： A61K31/517 ,  A61K9/00 ,  A61K9/70 ,  A61K45/06

摘要： The present invention relates generally to antifugal compositions. In an embodiment, the antifungal compositions are effective for application to nails and surrounding skin, and comprise at least one volatile solvent, at least one film forming substance, and at least one pyrimidone derivative of formula I, such as albaconazole. These compositions are capable of treating an infection caused by fungi, such as onychomychosis.

公开(公告)号：US06813752B1

公开(公告)日：2004-11-02

申请号：US10306667

申请日：2002-11-26

申请人： Edward Hsia ,  Darlene G. Hamilton ,  Wei Zheng ,  Mark W. Randolph ,  Kulachet Tanpairoj

发明人： Edward Hsia ,  Darlene G. Hamilton ,  Wei Zheng ,  Mark W. Randolph ,  Kulachet Tanpairoj

IPC分类号： G06F1750

CPC分类号： G11C29/50 ,  G11C16/04

摘要： A method of determining charge loss activation for a memory array. Memory arrays are programmed with a pattern for testing charge loss. Then, respective bake times are calculated for the memory arrays to experience a given amount of charge loss at their respective bake temperatures. Then, charge loss activation energy is calculated, based on the respective bake times. In one version, the memory arrays are cycled by repeatedly erasing and reprogramming them before baking. In another embodiment, various regions of the memory arrays are programmed to a plurality of distinct delta threshold voltages before baking.

摘要翻译： 确定存储器阵列的电荷损失激活的方法。 存储器阵列被编程用于测试电荷损失的模式。 然后，对于存储器阵列计算各自的烘烤时间，以在其各自的烘烤温度下经历给定量的电荷损失。 然后，基于相应的烘烤时间计算电荷损失激活能。 在一个版本中，通过在烘烤之前重复擦除和重新编程它们来循环存储器阵列。 在另一个实施例中，存储器阵列的各个区域在烘烤之前被编程为多个不同的增量阈值电压。

公开(公告)号：US06956768B2

公开(公告)日：2005-10-18

申请号：US10413800

申请日：2003-04-15

申请人： Darlene G. Hamilton ,  Kulachet Tanpairoj ,  Edward Hsia ,  Yi He

发明人： Darlene G. Hamilton ,  Kulachet Tanpairoj ,  Edward Hsia ,  Yi He

IPC分类号： G11C11/56 ,  G11C16/04 ,  G11C16/10

CPC分类号： G11C11/5671 ,  G11C16/0475 ,  G11C16/10

摘要： A method of programming a multi-level, dual cell memory device. The method includes independently programming a first charge storing cell and a second charge storing cell to respective data states, the data states selected from a blank program level or one of a plurality of charged program levels. Also disclosed is a method of reading the multi-level, dual cell memory device using a plurality of reference currents.

摘要翻译： 一种编程多级双电池存储器件的方法。 该方法包括将第一电荷存储单元和第二电荷存储单元独立地编程为相应的数据状态，从空白程序级或多个带电程序级中的一个选择的数据状态。 还公开了一种使用多个参考电流读取多电平双电池存储器件的方法。

公开(公告)号：US20050073886A1

公开(公告)日：2005-04-07

申请号：US10677790

申请日：2003-10-02

申请人： Darlene Hamilton ,  Zhizheng Liu ,  Mark Randolph ,  Yi He ,  Edward Hsia ,  Kulachet Tanpairoj ,  Mimi Lee ,  Alykhan Madhani

发明人： Darlene Hamilton ,  Zhizheng Liu ,  Mark Randolph ,  Yi He ,  Edward Hsia ,  Kulachet Tanpairoj ,  Mimi Lee ,  Alykhan Madhani

IPC分类号： G11C16/04 ,  G11C16/34 ,  G11C11/34

CPC分类号： G11C16/3404 ,  G11C16/0475 ,  G11C16/107 ,  G11C16/3409 ,  G11C16/344 ,  G11C16/3445 ,  G11C16/345

摘要： A method of erasing a flash electrically erasable read only memory (EEPROM) device composed of a plurality of memory cells includes pre-programming the plurality of memory cells, applying an erase pulse to the plurality of memory cells followed by an erase verification. The erase verification is followed by soft programming any memory cells having a threshold voltage below a predetermined minimum level and applying a positive gate stress to the plurality of memory cells. The erase method prevents overerasing and provides a tightened threshold voltage distribution.

摘要翻译： 擦除由多个存储器单元组成的闪存电可擦除只读存储器（EEPROM）器件的方法包括对多个存储器单元进行预编程，向多个存储器单元施加擦除脉冲，随后进行擦除验证。 擦除验证之后是对具有低于预定最小电平的阈值电压的任何存储器单元进行软编程，并向多个存储单元施加正栅极应力。 擦除方法可以防止过压，并提供紧固的阈值电压分布。

公开(公告)号：US06822909B1

公开(公告)日：2004-11-23

申请号：US10422090

申请日：2003-04-24

申请人： Darlene G. Hamilton ,  Edward Hsia ,  Mark W. Randolph ,  Edward F. Runnion ,  Kulachet Tanpairoj

发明人： Darlene G. Hamilton ,  Edward Hsia ,  Mark W. Randolph ,  Edward F. Runnion ,  Kulachet Tanpairoj

IPC分类号： G11C1134

CPC分类号： G11C16/0475 ,  G11C11/5671 ,  G11C16/3454

摘要： A method of programming a dual cell memory device having a first charge storing cell and a second charge storing cell. The method can include applying an initial program pulse to the memory device; comparing the threshold voltage of the memory device with a verify threshold voltage; and if the threshold voltage of the memory device is less than the verify threshold voltage, applying a second program pulse to the memory device during which at least one condition of the second program pulse is modified from the initial program pulse.

摘要翻译： 一种编程具有第一电荷存储单元和第二电荷存储单元的双单元存储器件的方法。 该方法可以包括将初始编程脉冲施加到存储器件; 将存储器件的阈值电压与验证阈值电压进行比较; 并且如果所述存储器件的阈值电压小于所述验证​​阈值电压，则向所述存储器件施加第二编程脉冲，在所述存储器件期间，从所述初始编程脉冲修改所述第二编程脉冲的至少一个条件。

公开(公告)号：US5870407A

公开(公告)日：1999-02-09

申请号：US653211

申请日：1996-05-24

申请人： Edward Hsia ,  Jose H. Hernandez ,  Sayan Suanya

发明人： Edward Hsia ,  Jose H. Hernandez ,  Sayan Suanya

IPC分类号： G11C29/00 ,  G11C29/50

CPC分类号： G11C29/006 ,  G11C29/50 ,  G11C16/04

摘要： In a semiconductor manufacturing process for manufacturing memory devices a method of screening hot temperature programmability rejects in memory devices during wafer sort at room temperature that would be rejected at class test at high temperature. All cells in the memory device are subjected to a first sequence of programming pulses at a voltage lower than the standard programming voltage. The number of pulses in the first sequence of programming pulses is from 1-5. Those die that verify as having been successfully programmed are passed. Those die that do not verify as having been programmed are subjected to a second sequence of programming pulses at a voltage lower than the standard programming voltage. The number of pulses in the second sequence of programming pulses is from 10 to 15 pulses. Those that verify as being programmed are marked as good and those that do not are repaired and retested.

摘要翻译： 在用于制造存储器件的半导体制造工艺中，在室温下的晶片分选期间，在高温下的类别测试中被拒绝的情况下，在存储器件中筛选热温度可编程性的方法被拒绝。 存储器件中的所有单元以低于标准编程电压的电压经受第一编程脉冲序列。 编程脉冲的第一个序列中的脉冲数为1-5。 被验证为已经成功编程的那些死亡通过。 那些不能被验证为已编程的芯片在低于标准编程电压的电压下经受第二编程脉冲序列。 第二编程脉冲序列中的脉冲数为10至15个脉冲。 验证为编程的那些标记为好，那些没有被修复和重新测试。

公开(公告)号：US5751633A

公开(公告)日：1998-05-12

申请号：US655357

申请日：1996-05-24

申请人： Edward Hsia ,  Jose H. Hernandez ,  Sayan Suanya

发明人： Edward Hsia ,  Jose H. Hernandez ,  Sayan Suanya

IPC分类号： G11C29/52 ,  G11C11/34

CPC分类号： G11C29/52

摘要： In a semiconductor manufacturing process for manufacturing memory devices a method of screening hot temperature erase rejects in memory devices during wafer sort at room temperature that would be rejected at class test at high temperature. Selected cells of the memory device are subjected to a first sequence of erasure pulses at a high voltage until the selected cells are verified erased or until a first maximum number of erasure pulses has been reached, recording the number of pulses required to erase the selected cells, reading and repairing any defective memory cells, and subjecting all cells to a second sequence of erasure pulses until all cells are verified erased or until a maximum number of pulses has been reached wherein the second maximum number is a multiple of the recorded number.

摘要翻译： 在用于制造存储器件的半导体制造工艺中，在室温下进行晶片分选时，将在高温阶段测试中被拒绝的方法来筛选存储器件中的热温度擦除废弃物的方法。 存储器件的所选单元以高电压经受第一次擦除脉冲序列，直到所选择的单元被清除或直到达到第一最大数量的擦除脉冲为止，记录擦除所选单元所需的脉冲数 读取和修复任何有缺陷的存储器单元，以及对所有单元进行第二次擦除脉冲序列，直到所有单元被确认被擦除或直到达到最大数量的脉冲为止，其中第二个最大数量是所记录数量的倍数。

公开(公告)号：US20120128612A1

公开(公告)日：2012-05-24

申请号：US13322667

申请日：2010-05-27

申请人： Jon Lenn ,  Hans Hofland ,  Edward Hsia

发明人： Jon Lenn ,  Hans Hofland ,  Edward Hsia

IPC分类号： A61K31/517 ,  A61K31/59 ,  A61P31/10 ,  A61K31/56

CPC分类号： A61K31/517 ,  A61K9/0014 ,  A61K9/7015 ,  A61K45/06 ,  A61K2300/00

摘要： The present invention relates generally to antifugal compositions. In an embodiment, the antifungal compositions are effective for application to nails and surrounding skin, and comprise at least one volatile solvent, at least one film forming substance, and at least one pyrimidone derivative of formula I, such as albaconazole. These compositions are capable of treating an infection caused by fungi, such as onychomychosis.

摘要翻译： 本发明一般涉及防水组合物。 在一个实施方案中，抗真菌组合物对于施用于指甲和周围皮肤是有效的，并且包含至少一种挥发性溶剂，至少一种成膜物质和至少一种式I的嘧啶酮衍生物，例如阿拉科唑。 这些组合物能够治疗由真菌引起的感染，例如甲真菌病。