Method of providing an erase activation energy of a memory device
    1.
    发明授权
    Method of providing an erase activation energy of a memory device 有权
    提供存储器件的擦除激活能的方法

    公开(公告)号:US08098521B2

    公开(公告)日:2012-01-17

    申请号:US11095849

    申请日:2005-03-31

    IPC分类号: G11C11/34

    CPC分类号: G11C13/0014 B82Y10/00

    摘要: A write-once read-many times memory device is made up of first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the first and second electrode. The memory device is programmed by providing a charged species from the passive layer into the active layer. The memory device may be programmed to have for the programmed memory device a first erase activation energy. The present method provides for the programmed memory device a second erase activation energy greater than the first erase activation energy.

    摘要翻译: 一次写入多次存储器件由第一和第二电极,第一和第二电极之间的无源层以及第一和第二电极之间的有源层组成。 通过从被动层提供带电物质到活性层来对存储器件进行编程。 存储器件可以被编程为使编程的存储器件具有第一擦除激活能量。 本方法为编程的存储器件提供大于第一擦除激活能量的第二擦除激活能量。

    METHOD OF PROVIDING AN ERASE ACTIVATION ENERGY OF A MEMORY DEVICE
    2.
    发明申请
    METHOD OF PROVIDING AN ERASE ACTIVATION ENERGY OF A MEMORY DEVICE 审中-公开
    提供存储器件的擦除活化能的方法

    公开(公告)号:US20120092924A1

    公开(公告)日:2012-04-19

    申请号:US13324310

    申请日:2011-12-13

    IPC分类号: G11C11/34 G11C7/00

    CPC分类号: G11C13/0014 B82Y10/00

    摘要: A write-once read-many times memory device is made up of first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the first and second electrode. The memory device is programmed by providing a charged species from the passive layer into the active layer. The memory device may be programmed to have for the programmed memory device a first erase activation energy. The present method provides for the programmed memory device a second erase activation energy greater than the first erase activation energy.

    摘要翻译: 一次写入多次存储器件由第一和第二电极,第一和第二电极之间的无源层以及第一和第二电极之间的有源层组成。 通过从被动层提供带电物质到活性层来对存储器件进行编程。 存储器件可以被编程为使编程的存储器件具有第一擦除激活能量。 本方法为编程的存储器件提供大于第一擦除激活能量的第二擦除激活能量。

    Control of memory arrays utilizing zener diode-like devices
    3.
    发明授权
    Control of memory arrays utilizing zener diode-like devices 有权
    使用齐纳二极管状器件来控制存储器阵列

    公开(公告)号:US06943370B2

    公开(公告)日:2005-09-13

    申请号:US10882538

    申请日:2004-06-30

    摘要: The present invention facilitates semiconductor devices by aiding the efficiency in the way individual devices change states in a semiconductor array. State change voltages can be applied to a single device in the array of semiconductor devices without the need for transistor-type voltage controls. The diodic effect of the present invention facilitates this activity by allowing specific voltage levels necessary for state changes to only occur at the desired device. In this manner, an array of devices can be programmed with varying data or states without utilizing transistor technology. The present invention also allows for an extremely efficient method of producing these types of devices, eliminating the need to manufacture costly external voltage controlling semiconductor devices.

    摘要翻译: 本发明通过帮助单个器件改变半导体阵列中的状态的方式来帮助半导体器件。 可以将状态变化电压施加到半导体器件阵列中的单个器件,而不需要晶体管型电压控制。 本发明的二极体效应通过允许状态改变所需的特定电压水平仅发生在期望的装置来促进该活动。 以这种方式,可以在不利用晶体管技术的情况下用不同的数据或状态对器件阵列进行编程。 本发明还允许制造这些类型的器件的非常有效的方法,消除了制造昂贵的外部电压控制半导体器件的需要。

    Methods that facilitate control of memory arrays utilizing zener diode-like devices
    4.
    发明授权
    Methods that facilitate control of memory arrays utilizing zener diode-like devices 有权
    方便使用齐纳二极管状器件来控制存储器阵列

    公开(公告)号:US06847047B2

    公开(公告)日:2005-01-25

    申请号:US10287363

    申请日:2002-11-04

    摘要: The present invention facilitates semiconductor devices by aiding the efficiency in the way individual devices change states in a semiconductor array. State change voltages can be applied to a single device in the array of semiconductor devices without the need for transistor-type voltage controls. The diodic effect of the present invention facilitates this activity by allowing specific voltage levels necessary for state changes to only occur at the desired device. In this manner, an array of devices can be programmed with varying data or states without utilizing transistor technology. The present invention also allows for an extremely efficient method of producing these types of devices, eliminating the need to manufacture costly external voltage controlling semiconductor devices.

    摘要翻译: 本发明通过帮助单个器件改变半导体阵列中的状态的方式来帮助半导体器件。 可以将状态变化电压施加到半导体器件阵列中的单个器件,而不需要晶体管型电压控制。 本发明的二极体效应通过允许状态改变所需的特定电压水平仅发生在期望的装置来促进该活动。 以这种方式,可以在不利用晶体管技术的情况下用不同的数据或状态对器件阵列进行编程。 本发明还允许制造这些类型的器件的非常有效的方法,消除了制造昂贵的外部电压控制半导体器件的需要。

    Variable density and variable persistent organic memory devices, methods, and fabrication
    6.
    发明授权
    Variable density and variable persistent organic memory devices, methods, and fabrication 有权
    可变密度和可变持久性有机存储器件,方法和制造

    公开(公告)号:US07273766B1

    公开(公告)日:2007-09-25

    申请号:US11034071

    申请日:2005-01-12

    IPC分类号: H01L21/00

    摘要: An organic memory device comprising two electrodes having a selectively conductive decay media between the two electrodes provides a capability to control a persistence level for information stored in an organic memory cell. A resistive state of the cell controls a conductive decay rate of the cell. A high and/or low resistive state can provide a fast and/or slow rate of conductive decay. One aspect of the present invention can have a high resistive state equating to an exponential conductive decay rate. Another aspect of the present invention can have a low resistive state equating to a logarithmic conductive decay rate. Yet another aspect relates to control of an organic memory device by determining a power state and setting a resistive state of an organic memory cell based upon a current power state and/or an imminent power state.

    摘要翻译: 包括在两个电极之间具有选择性导电衰减介质的两个电极的有机存储器件提供了控制存储在有机存储器单元中的信息的持久性水平的能力。 电池的电阻状态控制电池的导电衰减速率。 高和/或低电阻状态可以提供快速和/或慢速的导电衰减。 本发明的一个方面可以具有等于指数导电衰减速率的高电阻状态。 本发明的另一方面可以具有等于对数导电衰减速率的低电阻状态。 另一方面涉及通过基于当前功率状态和/或迫在眉睫的功率状态确定有功存储器单元的功率状态和设置电阻状态来控制有机存储器件。

    Write-once read-many times memory
    7.
    发明申请
    Write-once read-many times memory 有权
    一次写入多次内存

    公开(公告)号:US20060221713A1

    公开(公告)日:2006-10-05

    申请号:US11095849

    申请日:2005-03-31

    IPC分类号: G11C7/10

    CPC分类号: G11C13/0014 B82Y10/00

    摘要: A write-once read-many times memory device is made up of first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the first and second electrode. The memory device is programmed by providing a charged species from the passive layer into the active layer. The memory device may be programmed to have for the programmed memory device a first erase activation energy. The present method provides for the programmed memory device a second erase activation energy greater than the first erase activation energy.

    摘要翻译: 一次写入多次存储器件由第一和第二电极,第一和第二电极之间的无源层以及第一和第二电极之间的有源层组成。 通过从被动层提供带电物质到活性层来对存储器件进行编程。 存储器件可以被编程为使编程的存储器件具有第一擦除激活能量。 本方法为编程的存储器件提供大于第一擦除激活能量的第二擦除激活能量。

    Polymer-based transistor devices, methods, and systems
    8.
    发明申请
    Polymer-based transistor devices, methods, and systems 审中-公开
    基于聚合物的晶体管器件,方法和系统

    公开(公告)号:US20060113524A1

    公开(公告)日:2006-06-01

    申请号:US11000685

    申请日:2004-12-01

    IPC分类号: H01L29/08

    CPC分类号: H01L51/102 H01L51/0525

    摘要: One aspect of the present invention relates to a semiconductor transistor device with an annular gate surrounding, at least in part, a channel that conducts current between a first and second source/drain. Another aspect of the present invention relates to a semiconductor transistor device having an annular gate and containing a channel composed of a polymer material. Yet another aspect of the present invention relates to fabrication of a device utilizing a polymer channel surrounded, at least in part, by an annular gate. Still yet another aspect of the present invention relates to a system with a means to control (and/or amplify) current via an annular gate surrounding a channel which conducts current between a first and second source/drain. Still other aspects of the present invention include devices incorporating the present invention's devices, systems and methods such as computers, memory, handhelds and electronic devices.

    摘要翻译: 本发明的一个方面涉及一种具有环形栅极的半导体晶体管器件,该环形栅极至少部分地包围在第一和第二源极/漏极之间传导电流的沟道。 本发明的另一方面涉及一种具有环形栅极并且包含由聚合物材料构成的通道的半导体晶体管器件。 本发明的另一方面涉及使用至少部分由环形栅极包围的聚合物通道的装置的制造。 本发明的另一方面涉及一种具有通过围绕在第一和第二源极/漏极之间传导电流的沟道的环形栅极来控制(和/或放大)电流的装置的系统。 本发明的其它方面包括结合本发明的装置,诸如计算机,存储器,手持设备和电子装置的系统和方法的装置。

    Use of periodic refresh in medium retention memory arrays
    9.
    发明授权
    Use of periodic refresh in medium retention memory arrays 有权
    在介质保留存储器阵列中使用定期更新

    公开(公告)号:US07474579B2

    公开(公告)日:2009-01-06

    申请号:US11613832

    申请日:2006-12-20

    IPC分类号: G11C7/00

    摘要: Systems and methods are disclosed that facilitate extending data retention time in a data retention device, such as a nanoscale resistive memory cell array, via assessing a resistance level in a tracking element associated with the memory array and refreshing the memory array upon a determination that the resistance of the tracking element has reached or exceeded a predetermined reference threshold resistance value. The tracking element can be a memory cell within the array itself and can have an initial resistance value that is substantially higher than an initial resistance value for a programmed memory cell in the array, such that resistance increase in the tracking cell will cause the tracking cell to reach the threshold value and trigger refresh of the array before data corruption/loss occurs in the core memory cells.

    摘要翻译: 公开了通过评估与存储器阵列相关联的跟踪元件中的电阻水平并在确定存储器阵列的情况下刷新存储器阵列时有助于在诸如纳米级电阻存储器单元阵列之类的数据保持装置中扩展数据保留时间的系统和方法 跟踪元件的电阻已达到或超过预定参考阈值电阻值。 跟踪元件可以是阵列本身内的存储器单元,并且可以具有基本上高于阵列中的编程存储器单元的初始电阻值的初始电阻值,使得跟踪单元中的电阻增加将导致跟踪单元 在核心存储器单元中发生数据损坏/丢失之前达到阈值并触发阵列刷新。

    Control of memory devices possessing variable resistance characteristics
    10.
    发明授权
    Control of memory devices possessing variable resistance characteristics 有权
    具有可变电阻特性的存储器件的控制

    公开(公告)号:US07443710B2

    公开(公告)日:2008-10-28

    申请号:US10983919

    申请日:2004-11-08

    IPC分类号: G11C11/00

    摘要: Systems and methods employing at least one constant current source to facilitate programming of an organic memory cell and/or employing at least one constant voltage source to facilitate erasing of a memory device. The present invention is utilized in single memory cell devices and memory cell arrays. Employing a constant current source prevents current spikes during programming and allows accurate control of a memory cell's state during write cycles, independent of the cell's resistance. Employing a constant voltage source provides a stable load for memory cells during erase cycles and allows for accurate voltage control across the memory cell despite large dynamic changes in cell resistance during the process.

    摘要翻译: 采用至少一个恒定电流源的系统和方法促进有机存储器单元的编程和/或采用至少一个恒定电压源以便于擦除存储器件。 本发明用于单个存储器单元装置和存储单元阵列。 使用恒流源防止编程期间的电流尖峰,并允许在写周期期间精确控制存储单元的状态,而与电池的电阻无关。 使用恒定电压源在擦除周期期间为存储器单元提供稳定的负载,并且允许跨过存储器单元的精确的电压控制,尽管在该过程中电池电阻的大的动态变化。