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    Synchronous detection of wide bi-phase coded servo information for disk drive
    2.
    发明授权
    Synchronous detection of wide bi-phase coded servo information for disk drive 失效
    用于磁盘驱动器的宽双相编码伺服信息的同步检测

    公开(公告)号：US06452990B1

    公开(公告)日：2002-09-17

    申请号：US09239036

    申请日：1999-01-27

    申请人： Michael D. Leis ,  Ara Patapoutian ,  Mathew P. Vea ,  Richard M. Ehrlich ,  Kevin D. Fisher ,  James A. Henson ,  William R. Akin, Jr.

    发明人： Michael D. Leis ,  Ara Patapoutian ,  Mathew P. Vea ,  Richard M. Ehrlich ,  Kevin D. Fisher ,  James A. Henson ,  William R. Akin, Jr.

    IPC分类号： H04L702

    CPC分类号： G11B20/10009 ,  G11B5/5526 ,  G11B5/59627 ,  G11B5/5965 ,  G11B5/59655 ,  G11B5/59688 ,  G11B20/1833 ,  G11B21/083 ,  G11B27/3027 ,  G11B2220/20 ,  H04L25/4904

    摘要： A magnetic disk drive data storage disk defines recording tracks divided into data sectors by narrow servo spokes. A data sector lying between servo spokes is recorded with user data encoded in accordance with a code having a predetermined distance and user data code rate. Each servo spoke of the recording area has at least one servo information field encoded in a wide bi-phase code pattern. The disk drive further includes a synchronous sampling data detection channel having a data transducer head positioned by a servo-controlled actuator over the recording track, a preamplifier for receiving electrical analog signals magnetically induced by the data transducer head from flux transitions present in at least the servo information field, a digital sampler for synchronously sampling the electrical analog signals to produce digital samples, and wide bi-phase decoding circuitry coupled to receive digital samples from the synchronous sampling data detection channel for decoding the wide bi-phase code pattern.

    摘要翻译： 磁盘驱动器数据存储盘通过狭窄的伺服辐条来定义分割成数据扇区的记录轨道。 记录位于伺服轮辐之间的数据扇区，其中用户数据根据具有预定距离的代码和用户数据代码率进行编码。 记录区域的每个伺服轮辐具有编码为宽双相码模式的至少一个伺服信息场。 磁盘驱动器还包括同步采样数据检测通道，其具有由伺服控制致动器在记录轨道上定位的数据传感器头，前置放大器，用于接收由数据传感器头磁场感应的电模拟信号，该电流模拟信号至少存在于 伺服信息字段，用于同步采样电气模拟信号以产生数字样本的数字采样器，以及耦合以从同步采样数据检测通道接收数字样本的宽双相解码电路，用于解码宽双相码模式。

    Method and apparatus for using block reread
    3.
    发明授权
    Method and apparatus for using block reread 失效
    使用块重读的方法和装置

    公开(公告)号：US06412088B1

    公开(公告)日：2002-06-25

    申请号：US09453164

    申请日：1999-12-02

    申请人： Ara Patapoutian ,  Michael D. Leis ,  Mathew P. Vea

    发明人： Ara Patapoutian ,  Michael D. Leis ,  Mathew P. Vea

    IPC分类号： G11C2900

    CPC分类号： G11B20/18 ,  G11B20/1876 ,  G11B2020/183

    摘要： Disclosed is a method and apparatus for increasing the reliability of a disk drive. A block of information is read from a storage medium to provide a first sample, which is stored. The method determines whether an uncorrectable error occurred during the reading, and when the error is determined to have occurred, the block of information is reread from the storage medium to provide an averaged sample, and the average sample is decoded. Further disclosed is a storage unit, which includes a reader for reading a block of information from a storage medium to provide a first sample and for storing said first sample. An error determining mechanism determines whether an uncorrectable error occurred during the reading and issues a command to the reader to re-read the block of information to provide a second sample when the uncorrectable error is determined. A processor receives and averages the first sample and the second sample and produces an averaged sample. A decoder decodes the average sample.

    摘要翻译： 公开了一种用于增加磁盘驱动器的可靠性的方法和装置。 从存储介质读取信息块以提供被存储的第一样本。 该方法确定在读取期间是否发生不可纠正的错误，并且当确定发生错误时，从存储介质重新读取信息块以提供平均样本，并且对平均样本进行解码。 进一步公开的是一种存储单元，其包括用于从存储介质读取信息块以提供第一样本并用于存储所述第一样本的读取器。 错误确定机构确定在读取期间是否发生不可校正的错误，并且当确定不可校正的错误时向读者发出命令以重新读取信息块以提供第二样本。 处理器接收并平均第一样品和第二样品并产生平均样品。 解码器解码平均样本。

    Data and servo sampling in synchronous data detection channel
    4.
    发明授权
    Data and servo sampling in synchronous data detection channel 失效
    数据和伺服采样同步数据检测通道

    公开(公告)号：US5825318A

    公开(公告)日：1998-10-20

    申请号：US769823

    申请日：1996-12-19

    申请人： Ara Patapoutian ,  Kevin D. Fisher ,  Bruce D. Buch

    发明人： Ara Patapoutian ,  Kevin D. Fisher ,  Bruce D. Buch

    IPC分类号： G11B5/55 ,  G11B5/596 ,  G11B20/10 ,  G11B20/12 ,  G11B21/08 ,  G11B21/10 ,  H03M1/20 ,  H03M1/48

    CPC分类号： G11B5/59605 ,  G11B20/10009 ,  G11B21/085 ,  G11B21/106 ,  G11B5/5547 ,  G11B5/59655 ,  H03M1/201 ,  G11B20/1258

    摘要： An analog-to-digital converter circuit in a sampling data detection channel of a disk drive synchronously samples user data in the data track areas at a first quantization resolution and samples servo bursts from the spoke areas at a second quantization resolution effectively greater than said first quantization resolution. An offset circuit provides a predetermined analog offset signal to a combining circuit which combines it with an incoming analog signal to provide a composite signal during a spoke servo burst sampling interval. An analog-to-digital converter samples the composite signal during the servo spoke burst sampling interval, and synchronously samples the analog signal during a user data sampling interval. A digital averaging circuit averages the servo spoke samples over a predetermined averaging interval to provide averaged burst samples having increased bit resolution.

    摘要翻译： 磁盘驱动器的采样数据检测通道中的模拟 - 数字转换器电路以第一量化分辨率同步采样数据轨道区域中的用户数据，并且以比第二量化分辨率有效地大的第二量化分辨率从轮辐区域采样伺服脉冲串 量化分辨率。 偏移电路向组合电路提供预定的模拟偏移信号，该组合电路将其与输入模拟信号组合，以在辐射伺服脉冲串采样间隔期间提供复合信号。 模数转换器在伺服轮询突发采样间隔期间对复合信号进行采样，并在用户数据采样间隔期间同步采样模拟信号。 数字平均电路在预定的平均间隔上对伺服轮辐样本进行平均，以提供具有增加的比特分辨率的平均突发样本。

    Multiuse Data Channel
    5.
    发明申请
    Multiuse Data Channel 审中-公开
    多用数据通道

    公开(公告)号：US20170041099A1

    公开(公告)日：2017-02-09

    申请号：US14820137

    申请日：2015-08-06

    申请人： Ara Patapoutian ,  Hieu V. Nguyen

    发明人： Ara Patapoutian ,  Hieu V. Nguyen

    IPC分类号： H04L1/00 ,  H03M13/11 ,  G11C29/52 ,  H03M13/29 ,  G06F11/10

    CPC分类号： H04L1/0045 ,  G06F11/1072 ,  G11C29/52 ,  H03M13/09 ,  H03M13/1102 ,  H03M13/1515 ,  H03M13/2906 ,  H03M13/6516 ,  H03M13/6561

    摘要： Presented is a data channel with selectable components, such as encoders or decoders. Also, data having different data signal characteristics can be processed through a data channel based on the data signal characteristics. Further, a data channel may have independent encoding path and an independent decoding path. For example, a first data transmission having first data signal characteristics may be processed via a data channel based on a first selected set of components of the data channel and a second data transmission having second data signal characteristics different than the first data signal characteristics may be processed via the data channel using a second selected set of components in the data channel. The first selected set of components may be different than the second selected set of components, but may share one or more common components.

    摘要翻译： 提出了具有可选组件的数据通道，例如编码器或解码器。 此外，可以基于数据信号特性通过数据信道来处理具有不同数据信号特性的数据。 此外，数据信道可以具有独立的编码路径和独立的解码路径。 例如，具有第一数据信号特性的第一数据传输可以经由数据信道基于数据信道的第一选定组件集合进行处理，并且具有与第一数据信号特性不同的第二数据信号特性的第二数据传输可以是 通过数据信道使用数据信道中的第二组选择的组来处理。 第一选择的组件集合可以不同于第二选择的组件集合，但是可以共享一个或多个公共组件。

    Opportunistic decoding in memory systems
    8.
    发明授权
    Opportunistic decoding in memory systems 有权
    内存系统中的机会解码

    公开(公告)号：US08627175B2

    公开(公告)日：2014-01-07

    申请号：US12891490

    申请日：2010-09-27

    申请人： Ara Patapoutian ,  Bernardo Rub ,  Bruce D. Buch

    发明人： Ara Patapoutian ,  Bernardo Rub ,  Bruce D. Buch

    IPC分类号： G11C29/00

    CPC分类号： G06F11/1008 ,  G06F11/1048 ,  G11C16/26 ,  G11C29/844 ,  H03M13/1108 ,  H03M13/1111 ,  H03M13/3707 ,  H03M13/45 ,  H03M13/451 ,  H03M13/458

    摘要： Approaches for decoding data read from memory cells of a nonvolatile, solid state memory involve attempting to decode hard data using a hard decoding process prior to a time that soft data is available to the decoder. The hard data includes information about the digital symbols stored in the memory cells without data confidence information. The soft data includes information about the digital symbols stored in the memory cells and data confidence information. In response to the hard decoding process failing to achieve convergence, after the soft data becomes available to the decoder, the soft data is decoded using a soft decoding process. The decoder generates an output of the decoded data after the hard decoding process or the soft decoding process achieves convergence.

    摘要翻译： 用于解码从非易失性固态存储器的存储器单元读取的数据的方法包括在软数据可用于解码器的时间之前尝试使用硬解码处理对硬数据进行解码。 硬数据包括关于存储在存储器单元中的数字符号的信息，而没有数据置信度信息。 软数据包括关于存储在存储单元中的数字符号和数据置信度的信息。 响应于难以实现收敛的硬解码处理，在软数据变得可用于解码器之后，使用软解码处理解码软数据。 在硬解码处理或软解码处理实现收敛之后，解码器生成解码数据的输出。

    OUTER CODE PROTECTION FOR SOLID STATE MEMORY DEVICES
    9.
    发明申请
    OUTER CODE PROTECTION FOR SOLID STATE MEMORY DEVICES 有权
    固态存储器件的外部代码保护

    公开(公告)号：US20110296272A1

    公开(公告)日：2011-12-01

    申请号：US12790120

    申请日：2010-05-28

    申请人： Bernardo Rub ,  Ara Patapoutian ,  Arvind Sridharan ,  Bruce D. Buch

    发明人： Bernardo Rub ,  Ara Patapoutian ,  Arvind Sridharan ,  Bruce D. Buch

    IPC分类号： H03M13/29 ,  G06F11/10

    CPC分类号： G06F11/1012

    摘要： Outer code words can span multiple data blocks, multiple die, or multiple chips of a memory device to protect against errors in the data stored in the blocks, die and/or chips. A solid state memory device is arranged in multiple data blocks, each block including an array of memory cells arranged in a plurality of pages. The data is encoded into inner code words and symbol-based outer code words. The inner code words and the symbol-based outer code words are stored in the memory cells of the multiple blocks. One or more inner code words are stored in each page of each block and one or more symbols of each outer code word are stored in at least one page of each block. The inner code words and the outer code words are read from the memory device and are used to correct the errors in the data.

    摘要翻译： 外码字可以跨越存储器设备的多个数据块，多个芯片或多个芯片，以防止存储在块，芯片和/或芯片中的数据中的错误。 固态存储器件被布置在多个数据块中，每个块包括以多页布置的存储器单元的阵列。 数据被编码成内码字和基于符号的外码字。 内码字和基于符号的外码字被存储在多个块的存储单元中。 一个或多个内部码字被存储在每个块的每个页面中，并且每个外部码字的一个或多个符号被存储在每个块的至少一个页面中。 内部码字和外部码字从存储器件读取并用于校正数据中的错误。

    Phase coefficient generation for PLL
    10.
    发明授权
    Phase coefficient generation for PLL 有权
    PLL的相位系数生成

    公开(公告)号：US08040994B1

    公开(公告)日：2011-10-18

    申请号：US11688063

    申请日：2007-03-19

    申请人： Ara Patapoutian

    发明人： Ara Patapoutian

    IPC分类号： H03D3/24

    CPC分类号： H03L7/1075

    摘要： A method and apparatus is provided for synchronizing a clock signal by generating time varying PLL phase coefficients which approximate optimal PLL phase coefficients. An acquisition mode phase coefficient is determined by adding an error signal (A) to the sample counter (k) and finding the reciprocal of the result (1/(A+k)). The reciprocal can be calculated in hardware or determined by using a lookup table. A tracking mode phase coefficient is determined based on the error signal for use in the PLL during a track a tracking period. The tracking period begins when the tracking mode coefficient is greater than the acquisition mode coefficient.

    摘要翻译： 提供了一种通过产生近似最佳PLL相位系数的时变PLL相位系数来同步时钟信号的方法和装置。 通过将采样计数器（k）的误差信号（A）相加并求出结果的倒数（1 /（A + k））来确定采集模式相位系数。 可以用硬件计算倒数或使用查找表确定倒数。 基于在跟踪期间的轨道期间在PLL中使用的误差信号来确定跟踪模式相位系数。 当跟踪模式系数大于采集模式系数时，跟踪周期开始。