公开(公告)号：US5862005A

公开(公告)日：1999-01-19

申请号：US724977

申请日：1996-10-03

申请人： Michael D. Leis ,  Ara Patapoutian ,  Mathew P. Vea ,  Richard M. Ehrlich ,  Kevin D. Fisher ,  James A. Henson ,  William R. Akin, Jr.

发明人： Michael D. Leis ,  Ara Patapoutian ,  Mathew P. Vea ,  Richard M. Ehrlich ,  Kevin D. Fisher ,  James A. Henson ,  William R. Akin, Jr.

IPC分类号： G11B20/14 ,  G11B5/55 ,  G11B5/596 ,  G11B20/10 ,  G11B20/18 ,  G11B21/08 ,  G11B21/10 ,  G11B27/30 ,  H03M13/23 ,  H04L25/49 ,  G11B5/02 ,  G11B5/09

CPC分类号： G11B20/10009 ,  G11B20/1833 ,  G11B21/083 ,  G11B27/3027 ,  G11B5/5526 ,  G11B5/59655 ,  G11B5/59688 ,  H04L25/4904 ,  G11B2220/20 ,  G11B5/59627 ,  G11B5/5965

摘要： A magnetic disk drive data storage disk defines recording tracks divided into data sectors by narrow servo spokes. A data sector lying between servo spokes is recorded with user data encoded in accordance with a code having a predetermined distance and user data code rate. Each servo spoke of the recording area has at least one servo information field encoded in a wide bi-phase code pattern. The disk drive further includes a synchronous sampling data detection channel having a data transducer head positioned by a servo-controlled actuator over the recording track, a preamplifier for receiving electrical analog signals magnetically induced by the data transducer head from flux transitions present in at least the servo information field, a digital sampler for synchronously sampling the electrical analog signals to produce digital samples, and wide bi-phase decoding circuitry coupled to receive digital samples from the synchronous sampling data detection channel for decoding the wide bi-phase code pattern.

公开(公告)号：US06452990B1

公开(公告)日：2002-09-17

申请号：US09239036

申请日：1999-01-27

申请人： Michael D. Leis ,  Ara Patapoutian ,  Mathew P. Vea ,  Richard M. Ehrlich ,  Kevin D. Fisher ,  James A. Henson ,  William R. Akin, Jr.

发明人： Michael D. Leis ,  Ara Patapoutian ,  Mathew P. Vea ,  Richard M. Ehrlich ,  Kevin D. Fisher ,  James A. Henson ,  William R. Akin, Jr.

IPC分类号： H04L702

CPC分类号： G11B20/10009 ,  G11B5/5526 ,  G11B5/59627 ,  G11B5/5965 ,  G11B5/59655 ,  G11B5/59688 ,  G11B20/1833 ,  G11B21/083 ,  G11B27/3027 ,  G11B2220/20 ,  H04L25/4904

摘要： A magnetic disk drive data storage disk defines recording tracks divided into data sectors by narrow servo spokes. A data sector lying between servo spokes is recorded with user data encoded in accordance with a code having a predetermined distance and user data code rate. Each servo spoke of the recording area has at least one servo information field encoded in a wide bi-phase code pattern. The disk drive further includes a synchronous sampling data detection channel having a data transducer head positioned by a servo-controlled actuator over the recording track, a preamplifier for receiving electrical analog signals magnetically induced by the data transducer head from flux transitions present in at least the servo information field, a digital sampler for synchronously sampling the electrical analog signals to produce digital samples, and wide bi-phase decoding circuitry coupled to receive digital samples from the synchronous sampling data detection channel for decoding the wide bi-phase code pattern.

摘要翻译： 磁盘驱动器数据存储盘通过狭窄的伺服辐条来定义分割成数据扇区的记录轨道。 记录位于伺服轮辐之间的数据扇区，其中用户数据根据具有预定距离的代码和用户数据代码率进行编码。 记录区域的每个伺服轮辐具有编码为宽双相码模式的至少一个伺服信息场。 磁盘驱动器还包括同步采样数据检测通道，其具有由伺服控制致动器在记录轨道上定位的数据传感器头，前置放大器，用于接收由数据传感器头磁场感应的电模拟信号，该电流模拟信号至少存在于 伺服信息字段，用于同步采样电气模拟信号以产生数字样本的数字采样器，以及耦合以从同步采样数据检测通道接收数字样本的宽双相解码电路，用于解码宽双相码模式。

公开(公告)号：US5825318A

公开(公告)日：1998-10-20

申请号：US769823

申请日：1996-12-19

申请人： Ara Patapoutian ,  Kevin D. Fisher ,  Bruce D. Buch

发明人： Ara Patapoutian ,  Kevin D. Fisher ,  Bruce D. Buch

IPC分类号： G11B5/55 ,  G11B5/596 ,  G11B20/10 ,  G11B20/12 ,  G11B21/08 ,  G11B21/10 ,  H03M1/20 ,  H03M1/48

CPC分类号： G11B5/59605 ,  G11B20/10009 ,  G11B21/085 ,  G11B21/106 ,  G11B5/5547 ,  G11B5/59655 ,  H03M1/201 ,  G11B20/1258

摘要： An analog-to-digital converter circuit in a sampling data detection channel of a disk drive synchronously samples user data in the data track areas at a first quantization resolution and samples servo bursts from the spoke areas at a second quantization resolution effectively greater than said first quantization resolution. An offset circuit provides a predetermined analog offset signal to a combining circuit which combines it with an incoming analog signal to provide a composite signal during a spoke servo burst sampling interval. An analog-to-digital converter samples the composite signal during the servo spoke burst sampling interval, and synchronously samples the analog signal during a user data sampling interval. A digital averaging circuit averages the servo spoke samples over a predetermined averaging interval to provide averaged burst samples having increased bit resolution.

摘要翻译： 磁盘驱动器的采样数据检测通道中的模拟 - 数字转换器电路以第一量化分辨率同步采样数据轨道区域中的用户数据，并且以比第二量化分辨率有效地大的第二量化分辨率从轮辐区域采样伺服脉冲串 量化分辨率。 偏移电路向组合电路提供预定的模拟偏移信号，该组合电路将其与输入模拟信号组合，以在辐射伺服脉冲串采样间隔期间提供复合信号。 模数转换器在伺服轮询突发采样间隔期间对复合信号进行采样，并在用户数据采样间隔期间同步采样模拟信号。 数字平均电路在预定的平均间隔上对伺服轮辐样本进行平均，以提供具有增加的比特分辨率的平均突发样本。

公开(公告)号：US20120275591A1

公开(公告)日：2012-11-01

申请号：US13458865

申请日：2012-04-27

申请人： Amitkumar Mahadevan ,  Kevin D. Fisher ,  Nicholas P. Sands

发明人： Amitkumar Mahadevan ,  Kevin D. Fisher ,  Nicholas P. Sands

IPC分类号： H04M1/76

CPC分类号： H04M11/062 ,  H04B3/32

摘要： Methods, apparatuses (e.g., DSL system hardware, DSL systems, vectoring control entities), techniques, systems, etc. are used for initializing one or more DSL lines joining a vectored DSL line group operating in Showtime. A super-periodic orthogonal pilot sequence from a set of super-periodic orthogonal pilot sequences is assigned to each joining DSL line, wherein each such super-periodic orthogonal pilot sequence in the set has length L and is orthogonal to other sequences in the set over length T. These super-periodic orthogonal pilot sequences are used on the joining DSL lines to generate at least T sync-symbols worth of initialization data, which is processed to generate initialization data and FEXT mitigation coefficients for use when the joining DSL lines become part of the vectored DSL line group.

摘要翻译： 方法，装置（例如，DSL系统硬件，DSL系统，向量控制实体），技术，系统等用于初始化连接在Showtime中操作的向量DSL线路组的一个或多个DSL线路。 从一组超周期正交导频序列的超周期正交导频序列被分配给每个加入DSL线，其中集合中的每个这样的超周期正交导频序列具有长度L，并且与组中的其他序列正交 这些超周期正交导频序列用于加入DSL线路以产生至少T个同步符号的初始化数据，其被处理以产生初始化数据和当加入DSL线路成为部分时使用的FEXT缓解系数 的矢量DSL线组。

公开(公告)号：US20110080938A1

公开(公告)日：2011-04-07

申请号：US12997222

申请日：2009-06-09

申请人： Kevin D. Fisher ,  Nicholas P. Sands

发明人： Kevin D. Fisher ,  Nicholas P. Sands

IPC分类号： H04B1/38

CPC分类号： H04B3/32 ,  H04M3/2209 ,  H04M3/304 ,  H04M3/34 ,  H04M11/062

摘要： A vector DSL system includes a plurality of modems, which may be multi-port devices. Unprocessed user data is extracted from the modems and passed through a private vectoring data routing apparatus to one or more vectoring modules, such as vectoring cards. Each vectoring module includes one or more vector processors that include processing units configured to process the unprocessed user data on the basis of all modems' data for a given DSL tone grouping. Processing of the unprocessed user data removes the effects of FEXT from upstream and downstream user data and returns the processed user data to the modems using the vectoring data routing apparatus, which can be a specialized data transmission network utilizing one or more vector routers.

摘要翻译： 矢量DSL系统包括多个调制解调器，其可以是多端口设备。 从调制解调器提取未处理的用户数据，并通过专用向量化数据路由装置传送到一个或多个向量模块，例如向量卡。 每个矢量模块包括一个或多个矢量处理器，其包括被配置为基于给定DSL音调分组的所有调制解调器的数据来处理未处理的用户数据的处理单元。 未处理的用户数据的处理从上游和下游用户数据中消除FEXT的影响，并使用向量化数据路由装置将处理过的用户数据返回到调制解调器，矢量化数据路由装置可以是利用一个或多个向量路由器的专用数据传输网络。

公开(公告)号：US5557638A

公开(公告)日：1996-09-17

申请号：US212669

申请日：1994-03-10

申请人： Kevin D. Fisher ,  Ho W. Wong-Lam ,  Johannes W. M. Bergmans ,  Frits A. Steenhof ,  Johannes O. Voorman

发明人： Kevin D. Fisher ,  Ho W. Wong-Lam ,  Johannes W. M. Bergmans ,  Frits A. Steenhof ,  Johannes O. Voorman

IPC分类号： H04L25/03 ,  H03K5/08 ,  H03M13/23 ,  H04L25/06 ,  H04L25/12 ,  H04L25/30 ,  H04L25/34 ,  H04L25/49

CPC分类号： H03K5/088 ,  H04L25/061 ,  H04L25/12

摘要： In a digital transmission system including a transmitter (2) coupled via a channel (4) to a receiver (6) a detection signal r.sub.k is compared with a number of reference values to determine the destination symbols a.sub.k. Since the size of the received signal r.sub.k is not known in advance, the ratio between the detection signal and the reference values is to be determined by an adapting circuit (16) on the basis of the received signal and the decisions made. The problem may then occur that as a result of an initially erroneous value of the ratio between detection signal and reference values not a correct adaptation is made. By recognizing such a situation because specific values of the symbols a.sub.k are lacking, in such a situation said ratio can be brought to such a value by the correction circuit (18) that all the values of a.sub.k again occur.

摘要翻译： 在包括经由信道（4）耦合到接收机（6）的发射机（2）的数字传输系统中，将检测信号rk与多个参考值进行比较，以确定目的地符号+ E，cir a + EE k。 由于接收信号rk的大小预先不知道，所以检测信号与参考值之间的比率将由适配电路（16）根据接收到的信号和作出的决定来确定。 然后可能出现这样的问题，即由于检测信号和参考值之间的比率的最初错误的值不是正确的适应。 通过识别这种情况，因为缺少符号+ E，cir a + EE k的特定值，在这种情况下，可以通过校正电路（18）使所述比值达到这样的值，即所有的+ E， 再次出现cir a + EE k。

公开(公告)号：US5487085A

公开(公告)日：1996-01-23

申请号：US262726

申请日：1994-06-20

申请人： Ho W. Wong-Lam ,  Johannes W. Bergmans ,  Kevin D. Fisher

发明人： Ho W. Wong-Lam ,  Johannes W. Bergmans ,  Kevin D. Fisher

IPC分类号： H03H15/00 ,  H03H17/00 ,  H03H21/00 ,  H04B3/06 ,  H04L25/03 ,  H03H7/30

CPC分类号： H04L25/03038 ,  H04L2025/03477 ,  H04L2025/03617

摘要： In a digital transmission system comprising a transmitter (2) connected to a receiver (6) through a channel (4), this receiver comprises an equalizer (8) which includes an equalization filter (12) with output signals from which a sum weighted with weight factors is determined. The output signal of the equalizer is applied to a detector. According to the inventive idea a correction signal for correcting the coefficients w of the equalizer is derived from w.sub.k =w.sub.k-1 +Ma.sub.k e.sub.k, where a.sub.k is the vector of a plurality of successive detected symbols, and e.sub.k is a difference between the current input signal of the detector and a reconstructed ideal input signal of the detector.

摘要翻译： 在包括通过信道（4）连接到接收机（6）的发射机（2）的数字传输系统中，该接收机包括均衡器（8），该均衡器（8）包括均衡滤波器（12），输出信号与 确定体重因子。 均衡器的输出信号被施加到检测器。 根据本发明，用于校正均衡器的系数w的校正信号从wk = wk-1 +Mâkek导出，其中â是多个连续检测符号的向量，ek是当前输入信号之间的差 的检测器和重建的检测器的理想输入信号。

公开(公告)号：US08687497B2

公开(公告)日：2014-04-01

申请号：US13002213

申请日：2009-06-30

申请人： Nicholas P. Sands ,  Kevin D. Fisher

发明人： Nicholas P. Sands ,  Kevin D. Fisher

IPC分类号： G01R31/08

CPC分类号： H04B3/487 ,  H04B3/32

摘要： A reduced-memory vectored DSL system includes methods and apparatus for reducing the bandwidth and memory storage demands on a vectored DSL system in which FEXT data is transmitted and stored. An upstream-end device such as a DSLAM communicates with a plurality of downstream-end devices such as CPE modems. When test signal data, such as training and/or tracking data, is sent to determine FEXT characteristics of the DSL system, error signals are available for all or substantially all of the upstream and/or downstream frequency band DSL tones used in the system. Dividing a frequency band into sub-bands, only a subset of tones in each sub-band is used for deriving FEXT data, such as a FEXT channel response, FEXT channel coefficients and/or FEXT cancellation coefficients. For tones in the sub-band subsets, full-precision FEXT data values can be derived. For other tones, approximations of the FEXT data can be derived.

摘要翻译： 减少存储器向量的DSL系统包括用于减少其中发送和存储FEXT数据的向量DSL系统的带宽和存储器存储需求的方法和装置。 诸如DSLAM的上游设备与多个下游端设备（例如CPE调制解调器）通信。 当测试信号数据（例如训练和/或跟踪数据）被发送以确定DSL系统的FEXT特性时，错误信号可用于系统中使用的所有或基本上所有上游和/或下游频带DSL音调。 将频带划分为子带，每个子带中仅有一个音调子集用于导出FEXT数据，例如FEXT信道响应，FEXT信道系数和/或FEXT抵消系数。 对于子带子集中的音调，可以导出全精度FEXT数据值。 对于其他色调，可以导出FEXT数据的近似值。

公开(公告)号：US5757822A

公开(公告)日：1998-05-26

申请号：US518945

申请日：1995-08-24

申请人： Kevin D. Fisher ,  Pablo A. Ziperovich

发明人： Kevin D. Fisher ,  Pablo A. Ziperovich

IPC分类号： G11B5/09 ,  G11B20/10 ,  G11B20/14 ,  G11B20/18 ,  H03M7/14 ,  H03M13/27 ,  H03M13/00 ,  H03M5/00 ,  H03M7/00

CPC分类号： G11B20/1866 ,  G11B20/10009 ,  G11B20/1426 ,  H03M13/27 ,  G11B2020/1434 ,  G11B2020/1446

摘要： A modulation method generates a rate 16/17 (d=0, G=7/I=11) modulation code for transferring user digital data bytes having a three-way ECC interleave through a data transfer channel in accordance with the steps of: shuffling the user data bytes in order to rearrange an order of the bytes in a predetermined manner and putting out A.sub.i B.sub.i byte pairs, encoding eight bits of the Ai bytes of the AiBi byte pairs in accordance with a predetermined rate 8/9 modulation code to produce nine code bits a0-a8, and interleaving the nine code bits a0-a8 of each Ai byte with eight unencoded bits of each Bi byte in accordance with a predetermined bitwise interleave pattern to generate the rate 16/17 modulation code. A preferred code and circuitry for the modulation method are also described.

摘要翻译： 调制方法根据以下步骤生成用于通过数据传送通道传送具有三路ECC交错的用户数字数据字节的速率16/17（d = 0，G = 7 / I = 11）调制码：洗牌 用户数据字节，以便以预定方式重新排列字节顺序并输出AiBi字节对，根据预定速率8/9调制码对AiBi字节对的Ai字节的8位进行编码，以产生9 代码比特a0-a8，并且根据预定的按位交织模式，将每个Ai字节的九个码比特a0-a8与每个Bi字节的八个未编码比特交织，以生成速率16/17调制码。 还描述了调制方法的优选代码和电路。

公开(公告)号：US5606466A

公开(公告)日：1997-02-25

申请号：US546628

申请日：1995-10-23

申请人： Kevin D. Fisher ,  Bruce Buch ,  Thomas Lau ,  Pablo A. Ziperovich

发明人： Kevin D. Fisher ,  Bruce Buch ,  Thomas Lau ,  Pablo A. Ziperovich

IPC分类号： G11B5/027 ,  G11B20/10 ,  G11B20/12 ,  G11B20/14 ,  G11B5/09 ,  H04N5/76

CPC分类号： G11B20/10009 ,  G11B20/1258 ,  G11B20/1426

摘要： A new method for overlapping block read events in a disk drive having synchronously sampled data detection channels is presented. In particular, the new method is for overlapping read back processing by real-time and digital signal processing of first and second data blocks from a storage medium. The method includes steps of clocking real-time and digital signal processes by a clock synchronized to the first data block while the first data block is passing by a data transducer head, clocking the digital signal processes for the first data block by an asynchronous clock operating at a nominal data clocking rate after the first data block has passed by the data transducer head and before a clock has synchronized to the second data block following the first data block, and clocking real-time signal processes for the second data block and completing clocking of the digital processes for the first data block by a clock synchronized to the second data block passing by the data transducer head. The storage medium can be a magnetic hard disk, magnetic tape, or an optical disk, for example.

摘要翻译： 提出了一种用于在具有同步采样数据检测通道的磁盘驱动器中重叠块读取事件的新方法。 特别地，新方法是通过来自存储介质的第一和第二数据块的实时和数字信号处理来重叠读回处理。 该方法包括以下步骤：通过与第一数据块同步的时钟对实时和数字信号处理进行计时，同时第一数据块通过数据传感器头，通过异步时钟操作为第一数据块的数字信号处理计时 在第一数据块经过数据变换器头之后并且在时钟已经与第一数据块之后的第二数据块同步之后的标称数据时钟速率，以及对第二数据块的实时信号处理进行计时并完成时钟 通过与数据传感器头通过的第二数据块同步的时钟来产生第一数据块的数字处理。 存储介质可以是例如磁性硬盘，磁带或光盘。