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1.发明申请METHODS FOR THE DEPOSITION OF TERNARY OXIDE GATE DIELECTRICS AND STRUCTURES FORMED THEREBY 审中-公开三氧化锗栅介质的沉积方法及其形成的结构公开(公告)号：US20120091542A1
公开(公告)日：2012-04-19
申请号：US13330569
申请日：2011-12-19
IPC分类号： H01L29/78
CPC分类号： C23C16/45531 , C23C16/405 , H01L21/02178 , H01L21/02181 , H01L21/02183 , H01L21/02186 , H01L21/02189 , H01L21/02192 , H01L21/02194 , H01L21/022 , H01L21/0228 , H01L21/28194 , H01L21/3141 , H01L21/3142 , H01L21/31604 , H01L29/517 , Y10T428/24744
摘要： Methods and associated structures of forming a microelectronic device are described. Those methods may include introducing a first metal source, a second metal source and an oxygen source into a chamber and then forming a ternary oxide film comprising a first percentage of the first metal, a second percentage of the second metal, and a third percentage of oxygen.
摘要翻译： 描述形成微电子器件的方法和相关结构。 这些方法可以包括将第一金属源，第二金属源和氧源引入室中，然后形成包含第一金属的第一百分比，第二金属的第二百分比以及第二金属的第三百分比的三元氧化物膜 氧。
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公开(公告)号：US07704858B2
公开(公告)日：2010-04-27
申请号：US11731275
申请日：2007-03-29
IPC分类号： H01L21/322 , H01L21/44
CPC分类号： C23C16/45534 , C23C16/18 , C23C16/45542 , H01L29/665 , H01L29/78
摘要： A method for forming a nickel silicide layer on a MOS device with a low carbon content comprises providing a substrate within an ALD reactor and performing an ALD process cycle to form a nickel layer on the substrate, wherein the ALD process cycle comprises pulsing a nickel precursor into the reactor, purging the reactor after the nickel precursor, pulsing a mixture of hydrogen and silane into the reactor, and purging the reactor after the hydrogen and silane pulse. The ALD process cycle can be repeated until the nickel layer reaches a desired thickness. The silane used in the ALD process functions as a getterer for the advantageous carbon, resulting in a nickel layer that has a low carbon content. The nickel layer may then be annealed to form a nickel silicide layer with a low carbon content.
摘要翻译： 在具有低碳含量的MOS器件上形成硅化镍层的方法包括在ALD反应器内提供衬底并执行ALD工艺循环以在衬底上形成镍层，其中ALD工艺循环包括将镍前体 进入反应器，在镍前体之后吹扫反应器，将氢和硅烷的混合物脉冲进入反应器，并在氢和硅烷脉冲之后清洗反应器。 可以重复ALD工艺循环，直到镍层达到所需的厚度。 用于ALD工艺中的硅烷作为有利碳的吸收剂起作用，产生具有低碳含量的镍层。 然后镍层可以退火以形成具有低碳含量的硅化镍层。
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3.发明申请METHODS FOR THE DEPOSITION OF TERNARY OXIDE GATE DIELECTRICS AND STRUCTURES FORMED THEREBY 审中-公开三氧化锗栅介质的沉积方法及其形成的结构公开(公告)号：US20090087623A1
公开(公告)日：2009-04-02
申请号：US11864831
申请日：2007-09-28
CPC分类号： C23C16/45531 , C23C16/405 , H01L21/02178 , H01L21/02181 , H01L21/02183 , H01L21/02186 , H01L21/02189 , H01L21/02192 , H01L21/02194 , H01L21/022 , H01L21/0228 , H01L21/28194 , H01L21/3141 , H01L21/3142 , H01L21/31604 , H01L29/517 , Y10T428/24744
摘要： Methods and associated structures of forming a microelectronic device are described. Those methods may include introducing a first metal source, a second metal source and an oxygen source into a chamber and then forming a ternary oxide film comprising a first percentage of the first metal, a second percentage of the second metal, and a third percentage of oxygen.
摘要翻译： 描述形成微电子器件的方法和相关结构。 这些方法可以包括将第一金属源，第二金属源和氧源引入室中，然后形成包含第一金属的第一百分比，第二金属的第二百分比以及第二金属的第三百分比的三元氧化物膜 氧。
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公开(公告)号：US20080242059A1
公开(公告)日：2008-10-02
申请号：US11731275
申请日：2007-03-29
IPC分类号： H01L21/322 , C23C16/06
CPC分类号： C23C16/45534 , C23C16/18 , C23C16/45542 , H01L29/665 , H01L29/78
摘要： A method for forming a nickel silicide layer on a MOS device with a low carbon content comprises providing a substrate within an ALD reactor and performing an ALD process cycle to form a nickel layer on the substrate, wherein the ALD process cycle comprises pulsing a nickel precursor into the reactor, purging the reactor after the nickel precursor, pulsing a mixture of hydrogen and silane into the reactor, and purging the reactor after the hydrogen and silane pulse. The ALD process cycle can be repeated until the nickel layer reaches a desired thickness. The silane used in the ALD process functions as a getterer for the advantageous carbon, resulting in a nickel layer that has a low carbon content. The nickel layer may then be annealed to form a nickel silicide layer with a low carbon content.
摘要翻译： 在具有低碳含量的MOS器件上形成硅化镍层的方法包括在ALD反应器内提供衬底并执行ALD工艺循环以在衬底上形成镍层，其中ALD工艺循环包括将镍前体 进入反应器，在镍前体之后吹扫反应器，将氢和硅烷的混合物脉冲进入反应器，并在氢和硅烷脉冲之后清洗反应器。 可以重复ALD工艺循环，直到镍层达到所需的厚度。 用于ALD工艺中的硅烷作为有利碳的吸收剂起作用，产生具有低碳含量的镍层。 然后镍层可以退火以形成具有低碳含量的硅化镍层。
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公开(公告)号：US08003293B2
公开(公告)日：2011-08-23
申请号：US10956284
申请日：2004-09-30
CPC分类号： G03F7/0382 , G03F7/0392 , Y10S430/114 , Y10S430/115
摘要： A deliberately engineered placement and size constraint (molecular weight distribution) of photoacid generators, solubility switches, photoimageable species, and quenchers forms individual pixels within a photoresist. Upon irradiation, a self-contained reaction occurs within each of the individual pixels that were irradiated to pattern the photoresist. These pixels may take on a variety of forms including a polymer chain, a bulky cluster, a micelle, or a micelle formed of several polymer chains. Furthermore, these pixels may be designed to self-assemble onto the substrate on which the photoresist is applied.
摘要翻译： 光致酸产生剂，溶解度开关，可光成象物质和猝灭剂的故意设计的放置和尺寸约束（分子量分布）在光致抗蚀剂内形成各个像素。 在照射时，在被照射以对光致抗蚀剂进行图案化的各个像素内发生独立的反应。 这些像素可以具有各种形式，包括由几个聚合物链形成的聚合物链，大体积聚集体，胶束或胶束。 此外，这些像素可以被设计为自组装到其上施加光致抗蚀剂的基板上。
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6.发明申请Method for manufacturing a silicon-on-insulator (SOI) wafer with an etch stop layer 审中-公开用于制造具有蚀刻停止层的绝缘体上硅（SOI）晶片的方法公开(公告)号：US20090096025A1
公开(公告)日：2009-04-16
申请号：US12316737
申请日：2008-12-15
IPC分类号： H01L27/00
CPC分类号： H01L21/26533 , H01L21/76243
摘要： Embodiments of a silicon-on-insulator (SOI) wafer having an etch stop layer overlying the buried oxide layer, as well as embodiments of a method of making the same, are disclosed. The etch stop layer may comprise silicon nitride, nitrogen-doped silicon dioxide, or silicon oxynitride, as well as some combination of these materials. Other embodiments are described and claimed.
摘要翻译： 公开了具有覆盖掩埋氧化物层的蚀刻停止层的绝缘体上硅（SOI）晶片的实施例以及其制造方法的实施例。 蚀刻停止层可以包括氮化硅，氮掺杂二氧化硅或氮氧化硅，以及这些材料的某些组合。 描述和要求保护其他实施例。
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公开(公告)号：US07459392B2
公开(公告)日：2008-12-02
申请号：US11096345
申请日：2005-03-31
IPC分类号： H01L21/768
CPC分类号： H01L21/76843 , H01L21/76846 , H01L21/7685 , H01L21/76871
摘要： A barrier and seed layer for a semiconductor damascene process is described. The seed layer is formed from a noble metal with an intermediate region between the barrier and noble metal layers to prevent oxidation of the barrier layer.
摘要翻译： 描述了用于半导体镶嵌工艺的阻挡层和籽晶层。 种子层由贵金属形成，在阻挡层和贵金属层之间具有中间区域，以防止阻挡层氧化。
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公开(公告)号：US07470450B2
公开(公告)日：2008-12-30
申请号：US10764193
申请日：2004-01-23
IPC分类号： C23C16/00
CPC分类号： C07F7/025 , C23C16/345 , H01L21/0217 , H01L21/02219 , H01L21/02222 , H01L21/02271 , H01L21/02274
摘要： A silicon nitride film may be deposited on a work piece using conventional deposition techniques and a selected source for use as a silicon precursor. A nitrogen precursor may also be selected for film deposition. Using the selected precursor(s), the temperature for deposition may be 500° C., or less.
摘要翻译： 氮化硅膜可以使用常规沉积技术和所选择的源用作硅前体而沉积在工件上。 也可以选择氮前体用于膜沉积。 使用所选择的前体，沉积温度可以为500℃以下。
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公开(公告)号：US07241707B2
公开(公告)日：2007-07-10
申请号：US11060843
申请日：2005-02-17
申请人： Robert P. Meagley , Michael J. Leeson , Michael D. Goodner , Bob E. Leet , Michael L. McSwiney , Shan C. Clark
发明人： Robert P. Meagley , Michael J. Leeson , Michael D. Goodner , Bob E. Leet , Michael L. McSwiney , Shan C. Clark
IPC分类号： H01L21/469
CPC分类号： H01L21/76808 , G03F7/091 , H01L21/0276 , H01L21/31144 , H01L21/76822 , H01L21/76829 , H01L21/76834 , H01L21/76835
摘要： Multiple-layer films in integrated circuit processing may be formed by the phase segregation of a single composition formed above a semiconductor substrate. The composition is then induced to phase segregate into at least a first continuous phase and a second continuous phase. The composition may be formed of two or more components that phase segregate into different continuous layers. The composition may also be a single component that breaks down upon activation into two or more components that phase segregate into different continuous layers. Phase segregation may be used to form, for example, a sacrificial light absorbing material (SLAM) and a developer resistant skin, a dielectric layer and a hard mask, a photoresist and an anti-reflective coating (ARC), a stress buffer coating and a protective layer on a substrate package, and light interference layers.
摘要翻译： 集成电路处理中的多层膜可以通过在半导体衬底上形成的单一组合物的相分离来形成。 然后将组合物诱导相分离成至少第一连续相和第二连续相。 组合物可以由相分离成不同连续层的两种或更多种组分形成。 组合物还可以是单一组分，其在活化时分解成两个或多个相分离成不同连续层的组分。 相分离可以用于形成例如牺牲光吸收材料（SLAM）和显影剂抗性皮肤，电介质层和硬掩模，光致抗蚀剂和抗反射涂层（ARC），应力缓冲涂层和 衬底封装上的保护层，以及光干涉层。
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公开(公告)号：US07235344B2
公开(公告)日：2007-06-26
申请号：US10881475
申请日：2004-06-30
CPC分类号： G03F7/0045 , Y10S430/106 , Y10S430/108 , Y10S430/115 , Y10S430/122 , Y10S430/126
摘要： A composition including a first moiety; and a different second moiety capable of harvesting energy from an external source, wherein the second moiety is positioned such that energy harvested at the second moiety may be transferred to the first moiety. An article of manufacture including a film including a first moiety and a different second moiety capable of harvesting energy from an external source, wherein the second moiety is positioned such that collectively the first and second moieties have an electron capture cross-section greater than the electron capture cross-section of the first moiety alone. A method including forming a film on a substrate including a first moiety and a different second moiety; exposing the film to photonic or charged particle radiation; and patterning the film.
摘要翻译： 包含第一部分的组合物; 以及能够从外部源收获能量的不同的第二部分，其中第二部分被定位成使得在第二部分收获的能量可以转移到第一部分。 包括包括第一部分和能够从外部源收集能量的不同第二部分的膜的制品，其中所述第二部分被定位成使得所述第一部分和所述第二部分的电子捕获截面大于所述电子 仅捕获第一部分的横截面。 一种方法，包括在包括第一部分和不同的第二部分的基底上形成膜; 将膜暴露于光子或带电粒子辐射; 并构图。
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