公开(公告)号：US06692999B2

公开(公告)日：2004-02-17

申请号：US10037492

申请日：2002-01-03

申请人： Michiko Takei ,  Akito Hara

发明人： Michiko Takei ,  Akito Hara

IPC分类号： H01L2100

CPC分类号： H01L21/02683 ,  C30B1/00 ,  C30B29/06 ,  H01L21/02532 ,  H01L21/2026 ,  H01L29/66757 ,  H01L29/78675

摘要： There is provided the step of forming a polysilicon film by scanning a laser irradiation region while irradiating a continuous wave laser onto an amorphous silicon film formed into an island or ribbon-like shape on a substrate. If a width of a rectangle in which the amorphous silicon film is inscribed is 30 &mgr;m or less, any one condition of (1) a top end shape of a pattern is a convex shape, (2) a top end shape is a concave shape and consists of straight lines and has three corner portions at a top end side, and both angles of the corner portions on both sides of the top end shape are set to 45 degree or more, (3) a top end shape is a concave shape and consists of curved lines, and (4) a width of a top end portion is 25 &mgr;m or less, is satisfied.

摘要翻译： 提供了通过扫描激光照射区域同时将连续波激光照射到在基板上形成为岛状或带状形状的非晶硅膜上而形成多晶硅膜的步骤。 如果非晶硅膜内接的矩形的宽度为30μm以下，则（1）图案的顶端形状的任一条件为凸形，（2）顶端形状为凹形 并且由直线构成，并且在顶端侧具有三个角部，顶端形状的两侧的角部的两个角度被设定为45度以上，（3）顶端形状为凹形 并且由曲线构成，（4）顶端部的宽度为25μm以下。

公开(公告)号：US06677222B1

公开(公告)日：2004-01-13

申请号：US09637276

申请日：2000-08-11

申请人： Yasuyoshi Mishima ,  Katsuyuki Suga ,  Michiko Takei ,  Akito Hara

发明人： Yasuyoshi Mishima ,  Katsuyuki Suga ,  Michiko Takei ,  Akito Hara

IPC分类号： H01L2120

CPC分类号： H01L21/02675 ,  H01L21/2022 ,  H01L21/2026

摘要： A first layer made of polysilicon is formed on the surface of an underlying substrate. The surface of the first layer is exposed to an environment which etches silicon oxide. If the surface of the first layer is covered with a silicon oxide film, the silicon oxide film is removed. An energy is supplied to the first layer, the energy allowing silicon crystal to re-grow. Solid phase growth of silicon occurs in the first layer to planarize the surface thereof. A polysilicon film having small root mean square of roughness can be formed.

摘要翻译： 在下面的衬底的表面上形成由多晶硅制成的第一层。 第一层的表面暴露于蚀刻氧化硅的环境中。 如果第一层的表面被氧化硅膜覆盖，则去除氧化硅膜。 能量被供应到第一层，能量允许硅晶体再生长。 在第一层中发生硅的固相生长以平坦化其表面。 可以形成具有小的粗糙度均方根的多晶硅膜。

公开(公告)号：US20080185667A1

公开(公告)日：2008-08-07

申请号：US11663057

申请日：2004-09-17

申请人： Kenichi Yoshino ,  Akito Hara ,  Michiko Takei ,  Takuya Hirano

发明人： Kenichi Yoshino ,  Akito Hara ,  Michiko Takei ,  Takuya Hirano

IPC分类号： H01L29/786 ,  H01L21/28

CPC分类号： H01L27/1259 ,  H01L21/26513 ,  H01L21/28079 ,  H01L21/82385 ,  H01L21/84 ,  H01L27/1214 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/7845 ,  H01L29/78675

摘要： An Mo film (6) is formed on a SiO2 film (5) by particularly using the film thickness and the deposition temperature (ambient temperature in a sputtering chamber) as the primary parameters and adjusting the film thickness to be within the range from 100 nm to 500 nm (more preferably 100 nm to 300 nm) and the deposition temperature to be within the range from 25° C. to 300° C., so as to control residual stress to have a predetermined value of 300 MPa or greater and to be oriented to increase the in-plane lattice constant. There can be thus provided a reliable CMOSTFT in which desired strain is easily and reliably imparted to polysilicon thin films (4a and 4b) to improve the mobility therein without adding an extra step of imparting the strain to the silicon thin film.

摘要翻译： 通过特别使用膜厚度和沉积温度（溅射室中的环境温度）作为主要参数，在SiO 2膜（5）上形成Mo膜（6）并调节膜厚度 为100nm〜500nm（更优选为100nm〜300nm），淀积温度为25℃〜300℃的范围，从而将残留应力控制为具有规定的 值为300MPa以上，并且取向为增加面内晶格常数。 因此可以提供可靠的CMOSTFT，其中期望的应变容易且可靠地赋予多晶硅薄膜（4a和4b），以提高其迁移率，而不增加赋予硅薄膜的应变的额外步骤。

公开(公告)号：US06767773B2

公开(公告)日：2004-07-27

申请号：US10230161

申请日：2002-08-29

申请人： Yasuyuki Sano ,  Akito Hara ,  Michiko Takei ,  Nobuo Sasaki

发明人： Yasuyuki Sano ,  Akito Hara ,  Michiko Takei ,  Nobuo Sasaki

IPC分类号： H01L2100

CPC分类号： H01L21/02683 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/0262 ,  H01L21/02691 ,  H01L21/2026 ,  H01L29/66757 ,  H01L29/78675 ,  Y10S438/949

摘要： An operating semiconductor layer is formed in such a manner that amorphous silicon layer is formed to be shaped so that it has a wide region and a narrow region and the narrow region is connected to the wide region at a position asymmetric to the wide region, and the amorphous silicon layer is crystallized by scanning a CW laser beam from the wide region toward the narrow region in a state that a polycrystalline silicon layer as a heat-retaining layer encloses the narrow region from a side face through the silicon oxide layer.

摘要翻译： 形成工作半导体层，使得非晶硅层形成为使得其具有宽的区域和窄的区域，并且窄区域在与宽区域不对称的位置处连接到宽区域，并且 在作为保温层的多晶硅层通过氧化硅层从侧面包围窄区域的状态下，通过从宽区域向窄区域扫描CW激光束而使非晶硅层结晶化。

公开(公告)号：US07795619B2

公开(公告)日：2010-09-14

申请号：US11138431

申请日：2005-05-27

申请人： Akito Hara

发明人： Akito Hara

IPC分类号： H01L31/036

CPC分类号： H01L23/585 ,  H01L21/76807 ,  H01L21/84 ,  H01L23/53228 ,  H01L27/12 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for manufacturing a semiconductor device, including the steps of: forming a shielding film 38 on a first insulating film 37; sequentially forming a second insulating film 39 and an amorphous semiconductor film 40 on the shielding film 38; melting the amorphous semiconductor film 40 at least in portions to be channels of thin-film transistors by irradiating an energy beam onto the amorphous semiconductor film 40, and converting the amorphous semiconductor film 40 into a polycrystalline semiconductor film 41; sequentially forming a gate insulating film 43a and a gate electrode 44a on the polycrystalline semiconductor film 41 on the channels; and forming source and drain regions 41a in the polycrystalline semiconductor film 41 on sides of the gate electrode 44a, and forming a TFT 60 by use of the source and drain regions 41a, the gate insulating film 43a, and the gate electrode 44a.

摘要翻译： 一种制造半导体器件的方法，包括以下步骤：在第一绝缘膜37上形成屏蔽膜38; 在屏蔽膜38上依次形成第二绝缘膜39和非晶半导体膜40; 通过将能量束照射到非晶半导体膜40上，将非晶半导体膜40至少部分地熔融成为薄膜晶体管的沟道，并将非晶半导体膜40转换为多晶半导体膜41; 在通道上的多晶半导体膜41上依次形成栅极绝缘膜43a和栅电极44a; 以及在多晶半导体膜41中在栅电极44a的侧面上形成源极和漏极区域41a，并且通过使用源极和漏极区域41a，栅极绝缘膜43a和栅极电极44a形成TFT60。

公开(公告)号：US06821343B2

公开(公告)日：2004-11-23

申请号：US10293753

申请日：2002-11-13

申请人： Akito Hara ,  Fumiyo Takeuchi ,  Kenichi Yoshino ,  Nobuo Sasaki

发明人： Akito Hara ,  Fumiyo Takeuchi ,  Kenichi Yoshino ,  Nobuo Sasaki

IPC分类号： C30B3500

CPC分类号： H01L21/02683 ,  H01L21/02422 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/02678 ,  H01L21/02691 ,  H01L21/2026 ,  H01L27/1281 ,  H01L27/1285 ,  H01L29/66757 ,  H01L29/78675 ,  H01L29/78696 ,  Y10S117/904 ,  Y10T117/10

摘要： A semiconductor manufacturing apparatus emits an energy beam for crystallizing a semiconductor film formed on a substrate. The apparatus can output a plurality of energy beams continuously in relation to time and move the energy beams to scan a target to be irradiated. The output instability of the energy beam is smaller than ±1%/h. The noise (optical noise) indicating the instability of the energy beam can be not more than 0.1 rms %.

摘要翻译： 半导体制造装置发射用于结晶形成在基板上的半导体膜的能量束。 该装置可以相对于时间连续地输出多个能量束，并且移动能量束以扫描待照射的目标。 能量束的输出不稳定性小于±1％/ h。 指示能量束不稳定的噪声（光学噪声）可以不大于0.1 rms％。

公开(公告)号：US5970369A

公开(公告)日：1999-10-19

申请号：US976012

申请日：1997-11-21

申请人： Akito Hara ,  Satoshi Murakami ,  Kuninori Kitahara

发明人： Akito Hara ,  Satoshi Murakami ,  Kuninori Kitahara

IPC分类号： H01L21/20 ,  H01L21/336 ,  H01L29/786

CPC分类号： H01L21/2026

摘要： A multilayer polysilicon semiconductor device having a first layer of amorphous semiconductor deposited on the surface of an underlying substrate. The first layer is polycrystallized by applying an energy beam to the first layer. A second layer is deposited on the surface of the polycrystallized first layer, the second layer being made of amorphous semiconductor having the same composition as the first layer or polycrystalline semiconductor. Crystallinity of the second layer is changed by applying an energy beam to the second layer. The substrate may be heated when the energy beam is applied to the second layer.

摘要翻译： 一种多层多晶硅半导体器件，具有沉积在下面的衬底的表面上的第一非晶半导体层。 第一层通过向第一层施加能量束而多晶化。 第二层沉积在多结晶第一层的表面上，第二层由具有与第一层或多晶半导体相同组成的非晶半导体制成。 通过向第二层施加能量束来改变第二层的结晶度。 当能量束施加到第二层时，衬底可以被加热。

公开(公告)号：US08264012B2

公开(公告)日：2012-09-11

申请号：US12908231

申请日：2010-10-20

申请人： Akito Hara

发明人： Akito Hara

IPC分类号： H01L29/76

CPC分类号： H01L29/1054 ,  H01L21/26506 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/78 ,  H01L29/7848

摘要： A semiconductor device includes a field effect transistor and a strain generating layer to apply a stress to a channel region of the field effect transistor. The strain generating layer contains at least one of oxygen and nitrogen of 1.0×1018 cm−3 to 5.0×1019 cm−3, or alternatively, the strain generating layer contains self-interstitial atoms and/or vacancies of 1.0×1018 cm−3 to 5.0×1019 cm−3. In the latter case, at least a portion of the self-interstitial atoms and/or the vacancies exist as a cluster.

摘要翻译： 半导体器件包括场效应晶体管和应力产生层，以向场效应晶体管的沟道区域施加应力。 应变产生层含有1.0×10 18 cm -3〜5.0×10 19 cm -3的氧和氮中的至少一种，或者，应变产生层含有1.0×10 18 cm -3的自间隙原子和/或空位 至5.0×1019cm-3。 在后一种情况下，至少一部分自间隙原子和/或空位作为簇存在。

公开(公告)号：US20060170046A1

公开(公告)日：2006-08-03

申请号：US11138431

申请日：2005-05-27

申请人： Akito Hara

发明人： Akito Hara

IPC分类号： H01L27/12

CPC分类号： H01L23/585 ,  H01L21/76807 ,  H01L21/84 ,  H01L23/53228 ,  H01L27/12 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for manufacturing a semiconductor device, including the steps of: forming a shielding film 38 on a first insulating film 37; sequentially forming a second insulating film 39 and an amorphous semiconductor film 40 on the shielding film 38; melting the amorphous semiconductor film 40 at least in portions to be channels of thin-film transistors by irradiating an energy beam onto the amorphous semiconductor film 40, and converting the amorphous semiconductor film 40 into a polycrystalline semiconductor film 41; sequentially forming a gate insulating film 43a and a gate electrode 44a on the polycrystalline semiconductor film 41 on the channels; and forming source and drain regions 41a in the polycrystalline semiconductor film 41 on sides of the gate electrode 44a, and forming a TFT 60 by use of the source and drain regions 41a, the gate insulating film 43a, and the gate electrode 44a.

摘要翻译： 一种制造半导体器件的方法，包括以下步骤：在第一绝缘膜37上形成屏蔽膜38; 在屏蔽膜38上依次形成第二绝缘膜39和非晶半导体膜40; 通过将能量束照射到非晶半导体膜40上，将非晶半导体膜40至少部分地熔融成为薄膜晶体管的沟道，并将非晶半导体膜40转换为多晶半导体膜41; 在通道上的多晶半导体膜41上依次形成栅极绝缘膜43a和栅极电极44a; 以及在多晶半导体膜41中在栅极电极44a的侧面上形成源极和漏极区域41a，并且通过使用源极和漏极区域41a，栅极绝缘膜43a和栅极电极形成TFT60 44 a。

公开(公告)号：US06909118B2

公开(公告)日：2005-06-21

申请号：US10790875

申请日：2004-03-02

申请人： Akito Hara

发明人： Akito Hara

IPC分类号： H01L29/423 ,  H01L21/20 ,  H01L21/336 ,  H01L29/49 ,  H01L29/786 ,  H01L29/04 ,  H01L27/01 ,  H01L27/12 ,  H01L29/76 ,  H01L31/036 ,  H01L31/112

CPC分类号： H01L29/6675 ,  H01L29/4908 ,  H01L29/78603 ,  H01L29/78648 ,  H01L29/78672

摘要： A TFT capable of showing a large gm (large ON-current) and having characteristics comparable to those of Si-MOSFET despite of its relatively simple configuration was fabricated by the steps of coating, for example, a positive photo-resist on an Mo film; subjecting the photo-resist to back light exposure from the glass-substrate side under masking with a bottom gate electrode, to thereby form a resist pattern having the same geometry and being aligned with the bottom gate electrode because exposure light is intercepted by the bottom gate electrode but can travel through the Mo film; and etching the Mo film under masking by the resist pattern to thereby form a top gate electrode in conformity with the geometry of the resist pattern in a self-aligned manner.

摘要翻译： 通过在Mo膜上涂布例如正性光致抗蚀剂的步骤来制造能够显示大的gm（大的导通电流）并且具有与Si-MOSFET相当的特性的TFT， ; 使用光刻胶从底部栅电极掩蔽下的玻璃衬底侧反射曝光，从而形成具有相同几何形状并与底栅电极对准的抗蚀剂图案，因为曝光光被底栅截取 电极，但可以穿过Mo膜; 并且通过抗蚀剂图案在掩蔽下蚀刻Mo膜，从而以自对准的方式形成与抗蚀剂图案的几何形状一致的顶栅电极。