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    TRANSPARENT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
    1.
    发明申请
    TRANSPARENT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME 有权
    透明晶体管及其制造方法

    公开(公告)号：US20100155792A1

    公开(公告)日：2010-06-24

    申请号：US12554066

    申请日：2009-09-04

    申请人： Min Ki Ryu ,  Chi Sun Hwang ,  Chun Won Byun ,  Hye Yong Chu ,  Kyong Ik Cho

    发明人： Min Ki Ryu ,  Chi Sun Hwang ,  Chun Won Byun ,  Hye Yong Chu ,  Kyong Ik Cho

    IPC分类号： H01L29/78 ,  H01L21/336

    CPC分类号： H01L29/66742 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/786 ,  H01L29/7869

    摘要： Provided is a transparent transistor including a substrate, source and drain electrodes formed on the substrate, each having a multi-layered structure of a lower transparent layer, a metal layer and an upper transparent layer, a channel formed between the source and drain electrodes, and a gate electrode aligned with the channel. Here, the lower transparent layer or the upper transparent layer is formed of a transparent semiconductor layer, which is the same as the channel. Thus, the use of the multi-layered transparent conductive layer can ensure transparency and conductivity, overcome a problem of contact resistance between the source and drain electrodes and a semiconductor, and improve processibility by patterning the multi-layered transparent conductive layer all at once, while deposition is performed layer by layer.

    摘要翻译： 提供了一种透明晶体管，其包括形成在基板上的基板，源电极和漏电极，每个具有下透明层，金属层和上透明层的多层结构，在源极和漏极之间形成的沟道， 以及与沟道对准的栅电极。 这里，下透明层或上透明层由与通道相同的透明半导体层形成。 因此，使用多层透明导电层可以确保透明性和导电性，克服了源极和漏极之间的接触电阻和半导体的问题，并且通过一次构图多层透明导电层来提高加工性， 同时逐层进行沉积。

    Transparent transistor with multi-layered structures and method of manufacturing the same
    5.
    发明授权
    Transparent transistor with multi-layered structures and method of manufacturing the same 有权
    具有多层结构的透明晶体管及其制造方法

    公开(公告)号：US08269220B2

    公开(公告)日：2012-09-18

    申请号：US12554066

    申请日：2009-09-04

    申请人： Min Ki Ryu ,  Chi Sun Hwang ,  Chun Won Byun ,  Hye Yong Chu ,  Kyoung Ik Cho

    发明人： Min Ki Ryu ,  Chi Sun Hwang ,  Chun Won Byun ,  Hye Yong Chu ,  Kyoung Ik Cho

    IPC分类号： H01L29/04

    CPC分类号： H01L29/66742 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/786 ,  H01L29/7869

    摘要： Provided is a transparent transistor including a substrate, source and drain electrodes formed on the substrate, each having a multi-layered structure of a lower transparent layer, a metal layer and an upper transparent layer, a channel formed between the source and drain electrodes, and a gate electrode aligned with the channel. Here, the lower transparent layer or the upper transparent layer is formed of a transparent semiconductor layer, which is the same as the channel. Thus, the use of the multi-layered transparent conductive layer can ensure transparency and conductivity, overcome a problem of contact resistance between the source and drain electrodes and a semiconductor, and improve processibility by patterning the multi-layered transparent conductive layer all at once, while deposition is performed layer by layer.

    摘要翻译： 提供了一种透明晶体管，其包括形成在基板上的基板，源电极和漏电极，每个具有下透明层，金属层和上透明层的多层结构，在源极和漏极之间形成的沟道， 以及与沟道对准的栅电极。 这里，下透明层或上透明层由与通道相同的透明半导体层形成。 因此，使用多层透明导电层可以确保透明性和导电性，克服了源极和漏极之间的接触电阻和半导体的问题，并且通过一次构图多层透明导电层来提高加工性， 同时逐层进行沉积。

    Composition for oxide semiconductor thin film and field effect transistor using the composition
    7.
    发明授权
    Composition for oxide semiconductor thin film and field effect transistor using the composition 有权
    使用该组合物的氧化物半导体薄膜和场效应晶体管的组成

    公开(公告)号：US08017045B2

    公开(公告)日：2011-09-13

    申请号：US12331688

    申请日：2008-12-10

    申请人： Doo Hee Cho ,  Shin Hyuk Yang ,  Chun Won Byun ,  Chi Sun Hwang ,  Hye Yong Chu ,  Kyoung Ik Cho

    发明人： Doo Hee Cho ,  Shin Hyuk Yang ,  Chun Won Byun ,  Chi Sun Hwang ,  Hye Yong Chu ,  Kyoung Ik Cho

    IPC分类号： H01B1/02

    CPC分类号： H01L29/7869 ,  H01L29/66969

    摘要： Provided is a composition for an oxide semiconductor thin film and a field effect transistor (FET) using the composition. The composition includes from about 50 to about 99 mol % of a zinc oxide (ZnO); from about 0.5 to 49.5 mol % of a tin oxide (SnOx); and remaining molar percentage of an aluminum oxide (AlOx). The thin film formed of the composition remains in amorphous phase at a temperature of 400° C. or less. The FET includes an active layer formed of the composition and has improved electrical characteristics. The FET can be fabricated using a low-temperature process without expensive raw materials, such as In and Ga.

    摘要翻译： 提供了使用该组合物的氧化物半导体薄膜和场效应晶体管（FET）的组合物。 该组合物包含约50-约99mol％的氧化锌（ZnO）; 约0.5〜49.5摩尔％的氧化锡（SnO x）; 和氧化铝（AlOx）的剩余摩尔百分数。 由该组合物形成的薄膜在400℃以下的温度下保持为非晶相。 FET包括由该组合物形成的有源层并具有改善的电特性。 可以使用低温工艺制造FET，而不需要昂贵的原材料，例如In和Ga。

    Method and apparatus for modeling source-drain current of thin film transistor
    8.
    发明授权
    Method and apparatus for modeling source-drain current of thin film transistor 有权
    薄膜晶体管源漏电流建模方法及设备

    公开(公告)号：US08095343B2

    公开(公告)日：2012-01-10

    申请号：US12201457

    申请日：2008-08-29

    申请人： Jae Heon Shin ,  Chi Sun Hwang ,  Min Ki Ryu ,  Woo Seok Cheong ,  Hye Yong Chu

    发明人： Jae Heon Shin ,  Chi Sun Hwang ,  Min Ki Ryu ,  Woo Seok Cheong ,  Hye Yong Chu

    IPC分类号： G06F17/11

    CPC分类号： G06F17/5036

    摘要： Provided are a method and apparatus for modeling source-drain current of a TFT. The method includes receiving sample data, the sample data including a sample input value and a sample output value; adjusting modeling variables according to the sample data; calculating a current model value according to the adjusted modeling variables; when a difference between the calculated current model value and the sample output value is smaller than a predetermined threshold value, fitting a current model by applying the adjusted modeling variables to the current model; applying actual input data to the fitted current model; and outputting a result value corresponding to the actual input data, wherein the current model is a model for predicting the source-drain current of the TFT.

    摘要翻译： 提供了一种用于建模TFT的源极 - 漏极电流的方法和装置。 该方法包括接收样本数据，样本数据包括样本输入值和样本输出值; 根据样本数据调整建模变量; 根据调整后的建模变量计算当前模型值; 当所计算的当前模型值与样本输出值之间的差小于预定阈值时，通过将调整的建模变量应用于当前模型来拟合当前模型; 将实际输入数据应用于拟合的当前模型; 并输出与实际输入数据对应的结果值，其中当前模型是用于预测TFT的源极 - 漏极电流的模型。

    METHOD AND APPARATUS FOR MODELING SOURCE-DRAIN CURRENT OF THIN FILM TRANSISTOR
    10.
    发明申请
    METHOD AND APPARATUS FOR MODELING SOURCE-DRAIN CURRENT OF THIN FILM TRANSISTOR 有权
    用于建模薄膜晶体管的源极 - 漏极电流的方法和装置

    公开(公告)号：US20090157372A1

    公开(公告)日：2009-06-18

    申请号：US12201457

    申请日：2008-08-29

    申请人： Jae Heon SHIN ,  Chi Sun Hwang ,  Min Ki Ryu ,  Woo Seok Cheong ,  Hye Yong Chu

    发明人： Jae Heon SHIN ,  Chi Sun Hwang ,  Min Ki Ryu ,  Woo Seok Cheong ,  Hye Yong Chu

    IPC分类号： G06G7/62

    CPC分类号： G06F17/5036

    摘要： Provided are a method and apparatus for modeling source-drain current of a TFT. The method includes receiving sample data, the sample data including a sample input value and a sample output value; adjusting modeling variables according to the sample data; calculating a current model value according to the adjusted modeling variables; when a difference between the calculated current model value and the sample output value is smaller than a predetermined threshold value, fitting a current model by applying the adjusted modeling variables to the current model; applying actual input data to the fitted current model; and outputting a result value corresponding to the actual input data, wherein the current model is a model for predicting the source-drain current of the TFT.

    摘要翻译： 提供了一种用于建模TFT的源极 - 漏极电流的方法和装置。 该方法包括接收样本数据，样本数据包括样本输入值和样本输出值; 根据样本数据调整建模变量; 根据调整后的建模变量计算当前模型值; 当所计算的当前模型值与样本输出值之间的差小于预定阈值时，通过将调整的建模变量应用于当前模型来拟合当前模型; 将实际输入数据应用于拟合的当前模型; 并输出与实际输入数据对应的结果值，其中当前模型是用于预测TFT的源极 - 漏极电流的模型。