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    BLEEDING APPARATUS
    1.
    发明申请
    BLEEDING APPARATUS 审中-公开

    公开(公告)号：US20090112121A1

    公开(公告)日：2009-04-30

    申请号：US12125020

    申请日：2008-05-21

    申请人： Min-Chieh Chuang ,  Herbert Ho

    发明人： Min-Chieh Chuang ,  Herbert Ho

    IPC分类号： A61B5/15

    CPC分类号： A61B5/1519 ,  A61B5/150022 ,  A61B5/150114 ,  A61B5/150412 ,  A61B5/150503 ,  A61B5/15113

    摘要： A bleeding apparatus includes a first stimulating component for pressing an examinee at a first simulating point so as to induce sense perception, and a second stimulating component for pressing the examinee at a second simulating point so as to induce sense perception. A distance between the first stimulating component and the second stimulating component is less than or equal to a two-point sense threshold of a human perception system. The bleeding apparatus further includes a bleeding component disposed between the first stimulating component and the second stimulating component for bleeding the examinee between the first stimulating point and the second stimulating point when the first stimulating component is pressing the examinee at the first simulating point and the second stimulating component is pressing the examinee at the second simulating point.

    摘要翻译： 出血装置包括：第一刺激部件，用于在第一模拟点处按压受检者以引起感觉感知;以及第二刺激部件，用于在第二模拟点处按压受检者以引起感觉觉察。 第一刺激部件和第二刺激部件之间的距离小于或等于人感知系统的两点感测阈值。 出血装置还包括设置在第一刺激部件和第二刺激部件之间的出血部件，用于当第一刺激部件在第一模拟点按压受检者时使受检者在第一刺激点和第二刺激点之间渗色， 刺激组件在第二个模拟点上按压被试。

    VERTICAL SOI TRENCH SONOS CELL
    4.
    发明申请
    VERTICAL SOI TRENCH SONOS CELL 有权
    垂直SOI TRENCH SONOS电池

    公开(公告)号：US20070122971A1

    公开(公告)日：2007-05-31

    申请号：US11164513

    申请日：2005-11-28

    申请人： David Dobuzinsky ,  Herbert Ho ,  Jack Mandelman ,  Yoichi Otani

    发明人： David Dobuzinsky ,  Herbert Ho ,  Jack Mandelman ,  Yoichi Otani

    IPC分类号： H01L21/336 ,  H01L27/12

    CPC分类号： H01L29/792 ,  H01L21/26586 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/7926

    摘要： A semiconductor memory device in which a vertical trench semiconductor-oxide-nitride-oxide-semiconductor (SONOS) memory cell is created in a semiconductor-on-insulator (SOI) substrate is provided that allows for the integration of dense non-volatile random access memory (NVRAM) cells in SOI-based complementary metal oxide semiconductor (CMOS) technology. The trench is processed using conventional trench processing and it is processed near the beginning of the inventive method that allows for the fabrication of the memory cell to be fully separated from SOI logic processing.

    摘要翻译： 提供一种半导体存储器件，其中在绝缘体上半导体（SOI）衬底中形成垂直沟槽半导体氧化物 - 氮化物 - 氧化物半导体（SONOS）存储单元，其允许将致密的非易失性随机存取 基于SOI的互补金属氧化物半导体（CMOS）技术的存储器（NVRAM）单元。 使用常规沟槽处理处理沟槽，并且在本发明方法的开始附近处理允许将存储单元的制造完全从SOI逻辑处理分离开来的处理。

    Ferromagnetic memory cell and methods of making and using the same
    5.
    发明申请
    Ferromagnetic memory cell and methods of making and using the same 有权
    铁磁记忆单元及其制造和使用方法

    公开(公告)号：US20070045686A1

    公开(公告)日：2007-03-01

    申请号：US11216387

    申请日：2005-08-31

    申请人： Kangguo Cheng ,  Herbert Ho ,  Louis Hsu ,  Jack Mandelman

    发明人： Kangguo Cheng ,  Herbert Ho ,  Louis Hsu ,  Jack Mandelman

    IPC分类号： H01L29/94

    CPC分类号： G11C11/15 ,  H01L27/1203 ,  H01L43/065

    摘要： In a first aspect, a first apparatus is provided. The first apparatus is a memory cell that includes (1) a semiconductor fin enclosure formed on an insulating layer of a substrate; and (2) a ferromagnetic material within the semiconductor fin enclosure. A top surface of the ferromagnetic material is below a top surface of the semiconductor fin enclosure. Numerous other aspects are provided.

    摘要翻译： 在第一方面中，提供了一种第一装置。 第一装置是存储单元，其包括：（1）形成在基板的绝缘层上的半导体翅片外壳; 和（2）半导体翅片外壳内的铁磁材料。 铁磁材料的顶表面位于半导体翅片外壳的顶表面之下。 提供了许多其他方面。

    STRUCTURE AND METHOD OF FABRICATING HIGH-DENSITY, TRENCH-BASED NON-VOLATILE RANDOM ACCESS SONOS MEMORY CELLS FOR SOC APPLICATIONS
    6.
    发明申请
    STRUCTURE AND METHOD OF FABRICATING HIGH-DENSITY, TRENCH-BASED NON-VOLATILE RANDOM ACCESS SONOS MEMORY CELLS FOR SOC APPLICATIONS 有权
    用于SOC应用的高密度，基于TRENCH的非易失性随机接入SONOS存储器细胞的构造和方法

    公开(公告)号：US20060226474A1

    公开(公告)日：2006-10-12

    申请号：US10907686

    申请日：2005-04-12

    申请人： Herbert Ho ,  Jack Mandelman ,  Tak Ning ,  Yoichi Otani

    发明人： Herbert Ho ,  Jack Mandelman ,  Tak Ning ,  Yoichi Otani

    IPC分类号： H01L29/792

    CPC分类号： H01L27/115 ,  G11C16/0466 ,  H01L27/0207 ,  H01L27/105 ,  H01L27/11568 ,  H01L27/1157 ,  H01L27/11573 ,  H01L29/792 ,  H01L29/7926

    摘要： The present invention provides two-transistor silicon-oxide-nitride-oxide-semiconductor (2-Tr SONOS) non-volatile memory cells with randomly accessible storage locations as well as method of fabricating the same. In one embodiment, a 2-Tr SONOS cell is provided in which the select transistor is located within a trench structure having trench depth from 1 to 2 μm and the memory transistor is located on a surface of a semiconductor substrate adjoining the trench structure. In another embodiment, a 2-Tr SONOS memory cell is provided in which both the select transistor and the memory transistor are located within a trench structure having the depth mentioned above.

    摘要翻译： 本发明提供具有随机存取的存储位置的双晶体管氧化硅 - 氧化物 - 氧化物半导体（2-Tr SONOS）非易失性存储单元及其制造方法。 在一个实施例中，提供了2-Tr SONOS单元，其中选择晶体管位于沟槽深度为1至2μm的沟槽结构内，并且存储晶体管位于与沟槽结构相邻的半导体衬底的表面上。 在另一个实施例中，提供了2-Tr SONOS存储单元，其中选择晶体管和存储晶体管都位于具有上述深度的沟槽结构内。