公开(公告)号：US20090249840A1

公开(公告)日：2009-10-08

申请号：US12420473

申请日：2009-04-08

申请人： Min-Gyu JO ,  Hyun Seok SEO ,  Young Suk KIM ,  Jae Hyuk JANG

发明人： Min-Gyu JO ,  Hyun Seok SEO ,  Young Suk KIM ,  Jae Hyuk JANG

IPC分类号： D06F23/02 ,  D06F39/08 ,  D06B1/00

CPC分类号： D06F39/088 ,  D06F39/008 ,  D06F39/083

摘要： A washing machine includes a cabinet constituting the external appearance of the washing machine, a tub mounted in the cabinet for receiving wash water, a drum rotatably mounted in the tub for receiving laundry to be washed, a circulation unit for circulating wash water in the inner lower part of the tub through the upper part of the tub, and at least one circulation nozzle for spraying the wash water, supplied by the circulation unit, inwardly of the drum along a rotation axis of the drum in a longitudinal direction of the drum. According to the present invention, it is possible to improve washing or rinsing efficiency of the washing machine.

摘要翻译： 洗衣机包括构成洗衣机外观的机壳，安装在机壳中用于接收洗涤水的桶，可旋转地安装在桶中以接收被洗涤衣物的滚筒，用于将洗涤水循环在内部的循环单元 桶的下部通过桶的上部，以及至少一个循环喷嘴，用于沿滚筒的纵向方向沿滚筒的旋转轴线向滚筒的内侧喷射由循环单元提供的洗涤水。 根据本发明，可以提高洗衣机的洗涤或冲洗效率。

公开(公告)号：US20090294297A1

公开(公告)日：2009-12-03

申请号：US12243067

申请日：2008-10-01

申请人： Young Suk KIM ,  Yong Soo Oh ,  Byeung Gyu Chang ,  Won Hee Yoo ,  Sung Yeol Park

发明人： Young Suk KIM ,  Yong Soo Oh ,  Byeung Gyu Chang ,  Won Hee Yoo ,  Sung Yeol Park

IPC分类号： C25D5/10

CPC分类号： C25D5/022 ,  C25D5/12 ,  H05K1/0306 ,  H05K3/0076 ,  H05K3/108 ,  H05K2201/0129 ,  H05K2203/1105

摘要： There is provided a method of forming a plating layer, the method including: forming a seed layer on a substrate; forming a pattern layer on the seed layer, the pattern layer formed of a thermoplastic resin and including openings; forming a plating layer on portions of the seed layer corresponding to the openings; and removing the pattern layer. This method ensures that the plating layer is formed with a sufficient thickness and the substrate, particularly, a ceramic substrate suffers minimal chemical damage during a plating process. Moreover, the plating layer is formed with a more uniform thickness.

摘要翻译： 提供了形成镀层的方法，该方法包括：在基板上形成种子层; 在种子层上形成图案层，所述图案层由热塑性树脂形成并包括开口; 在对应于开口的种子层的部分上形成镀层; 并去除图案层。 该方法确保镀层形成足够的厚度，并且衬底，特别是陶瓷衬底在电镀过程中遭受最小的化学损伤。 此外，镀层形成为更均匀的厚度。

公开(公告)号：US20110147698A1

公开(公告)日：2011-06-23

申请号：US12786411

申请日：2010-05-24

申请人： Jung Won YOO ,  Jae Young PARK ,  Young Don PARK ,  Soo Young PARK ,  Young Suk KIM

发明人： Jung Won YOO ,  Jae Young PARK ,  Young Don PARK ,  Soo Young PARK ,  Young Suk KIM

IPC分类号： H01L49/00

CPC分类号： H01J31/123 ,  H01J1/304 ,  H01J29/04 ,  H01J29/467 ,  H01J2329/4613 ,  H01J2329/4634

摘要： A field emission device is provided. The field emission device includes a first substrate including a gate electrode including gate lines respectively extending in first, second, and third direction and a cathode electrode including cathode lines respectively extending in the first, second, and third directions; a second substrate facing the first substrate and including an anode electrode; and a space between the first and second substrates.

摘要翻译： 提供场致发射装置。 场发射器件包括：第一衬底，包括包括分别在第一，第二和第三方向上延伸的栅极线的栅电极和包括分别沿第一，第二和第三方向延伸的阴极线的阴极; 面向所述第一基板并包括阳极电极的第二基板; 以及第一和第二基板之间的空间。

公开(公告)号：US20130242678A1

公开(公告)日：2013-09-19

申请号：US13418968

申请日：2012-03-13

申请人： Bing WANG ,  Kuoyuan (Peter) HSU ,  Young Suk KIM

发明人： Bing WANG ,  Kuoyuan (Peter) HSU ,  Young Suk KIM

IPC分类号： G11C7/00

CPC分类号： G11C7/22 ,  G11C7/12 ,  G11C7/222 ,  G11C8/08 ,  G11C11/419 ,  G11C2207/005 ,  G11C2207/2254

摘要： In a method, a first edge of a first tracking signal in a first direction of a memory array is generated. A first edge of a second tracking signal in a second direction of the memory array is generated. A first edge of a write-timing control signal is generated based on a slower edge of the first edge the first tracking signal and of the first edge of the second tracking signal. The first edge of the write-timing control signal is used to generate a second edge of the second tracking signal.

摘要翻译： 在一种方法中，产生在存储器阵列的第一方向上的第一跟踪信号的第一边缘。 生成存储器阵列的第二方向上的第二跟踪信号的第一边缘。 基于第一边缘的较慢边缘和第二跟踪信号的第一边缘产生写时序控制信号的第一边沿。 写定时控制信号的第一边用于产生第二跟踪信号的第二边。

公开(公告)号：US20080121883A1

公开(公告)日：2008-05-29

申请号：US11961317

申请日：2007-12-20

申请人： Young Suk KIM

发明人： Young Suk KIM

IPC分类号： H01L29/12 ,  H01L21/336

CPC分类号： H01L29/41783 ,  H01L21/28052 ,  H01L21/28114 ,  H01L29/665 ,  H01L29/66545

摘要： A disclosed semiconductor device includes a gate electrode that is arranged on a substrate via a gate dielectric film. A gate electrode head is formed on the gate electrode, which gate electrode head is wider than the gate electrode, and extends between a first side wall dielectric film and a second side wall dielectric film that are formed on the same sides as first and second sides of the gate electrode, respectively. A first diffusion region is formed in the substrate on the same side as the first side of the gate electrode and a second diffusion region is formed in the substrate on the same side as the second side of the gate electrode. The gate electrode includes polysilicon at least at a bottom part in contact with the gate dielectric film.

摘要翻译： 所公开的半导体器件包括通过栅极电介质膜布置在衬底上的栅电极。 栅极电极头形成在栅电极上，该栅极电极头比栅电极宽，并且在第一侧壁电介质膜和第二侧壁电介质膜之间延伸，第一侧壁电介质膜和第二侧壁电介质膜形成在与第一侧和第二侧相同的侧面上 的栅电极。 第一扩散区域形成在与栅电极的第一侧相同侧的衬底中，并且在与栅电极的第二侧相同的一侧上的衬底中形成第二扩散区。 栅电极至少在与栅极电介质膜接触的底部具有多晶硅。

公开(公告)号：US20130013157A1

公开(公告)日：2013-01-10

申请号：US13312959

申请日：2011-12-06

申请人： Young Suk KIM ,  Jong Kyun SHIN ,  Kyeong Won JEON

发明人： Young Suk KIM ,  Jong Kyun SHIN ,  Kyeong Won JEON

IPC分类号： G06F7/00

CPC分类号： B60R16/037

摘要： A control system of a vehicle according to an exemplary embodiment of the present invention may include an input portion for inputting an order for generating an virtual avatar of a driver, an image detection portion that detects an outside image of the driver according to the order that is input by the input portion, an avatar generating portion that transforms the image of the real driver into the virtual avatar, and an integrated control portion that controls a driver seat, a steering device, a side view mirror, or a rear view mirror according to the shape of the virtual avatar.

摘要翻译： 根据本发明的示例性实施例的车辆的控制系统可以包括用于输入用于生成驾驶员的虚拟化身的命令的输入部分，根据以下命令检测驾驶员的外部图像的图像检测部分： 由输入部输入，虚拟生成部，其将真实驾驶员的图像变换为虚拟化身;以及综合控制部，其控制驾驶席，转向装置，侧视镜或后视镜，根据 到虚拟头像的形状。

公开(公告)号：US20120206983A1

公开(公告)日：2012-08-16

申请号：US13026021

申请日：2011-02-11

申请人： Yong ZHANG ,  Derek C. TAO ,  Dongsik JEONG ,  Young Suk KIM ,  Kuoyuan (Peter) HSU

发明人： Yong ZHANG ,  Derek C. TAO ,  Dongsik JEONG ,  Young Suk KIM ,  Kuoyuan (Peter) HSU

IPC分类号： G11C7/06 ,  G11C7/00

CPC分类号： G11C7/227 ,  G11C11/419

摘要： A memory has a tracking circuit for a read tracking operation. The memory includes a memory bit cell array, a tracking column, a tracking row, a sense amplifier row coupled to the memory bit cell array and the tracking row, and a sense amplifier enable logic. The memory further includes a tracking bit line coupled to the tracking column and the sense amplifier enable logic, and a tracking word line coupled to the tracking row and the sense amplifier enable logic. The tracking circuit is configured to track a column time delay along the tracking column before a row time delay along the tracking row.

摘要翻译： 存储器具有用于读取跟踪操作的跟踪电路。 存储器包括存储位单元阵列，跟踪列，跟踪行，耦合到存储器位单元阵列和跟踪行的读出放大器行以及读出放大器使能逻辑。 存储器还包括耦合到跟踪列和读出放大器使能逻辑的跟踪位线，以及耦合到跟踪行和读出放大器使能逻辑的跟踪字线。 跟踪电路被配置为沿着跟踪行在行时间延迟之前跟踪沿着跟踪列的列时间延迟。

公开(公告)号：US20120176856A1

公开(公告)日：2012-07-12

申请号：US13429117

申请日：2012-03-23

申请人： Kuoyuan HSU ,  Ming-Chieh HUANG ,  Young Suk KIM ,  Subramani KENGERI

发明人： Kuoyuan HSU ,  Ming-Chieh HUANG ,  Young Suk KIM ,  Subramani KENGERI

IPC分类号： G11C8/18 ,  G11C8/00

CPC分类号： G11C7/1042 ,  G11C8/04

摘要： An interleaved memory circuit includes a memory bank including at least one first memory cell for storing a charge representative of a first datum, the first memory cell being coupled with a first word line and a first bit line. The interleaved memory circuit further includes a local control circuit coupled with the memory bank. The interleaved memory circuit further includes a global control circuit coupled with the local control circuit, an interleaving access including a clock signal having a first cycle and a second cycle for accessing the first memory cell, where the second cycle is capable of enabling the local control circuit to trigger a first transition of a first read column select signal RSSL for accessing the first memory cell.

摘要翻译： 交织存储器电路包括一个存储体，该存储体包括至少一个用于存储表示第一数据的电荷的第一存储单元，第一存储单元与第一字线和第一位线耦合。 交错存储器电路还包括与存储体耦合的本地控制电路。 交错存储器电路还包括与本地控制电路耦合的全局控制电路，包括具有用于访问第一存储器单元的第一周期和第二周期的时钟信号的交织访问，其中第二周期能够实现本地控制 触发用于访问第一存储器单元的第一读取列选择信号RSSL的第一转换。

公开(公告)号：US20090215240A1

公开(公告)日：2009-08-27

申请号：US12434944

申请日：2009-05-04

申请人： Young Suk KIM ,  Yosuke Shimamune

发明人： Young Suk KIM ,  Yosuke Shimamune

IPC分类号： H01L21/336

CPC分类号： H01L21/82385 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/665 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7848

摘要： A semiconductor device has: a semiconductor substrate made of a first semiconductor material; an n-channel field effect transistor formed in the semiconductor substrate and having n-type source/drain regions made of a second semiconductor material different from the first semiconductor material; and a p-channel field effect transistor formed in the semiconductor substrate and having p-type source/drain regions made of a third semiconductor material different from the first semiconductor material, wherein the second and third semiconductor materials are different materials. The semiconductor device having n- and p-channel transistors has improved performance by utilizing stress.

摘要翻译： 半导体器件具有：由第一半导体材料制成的半导体衬底; n型沟道场效应晶体管，其形成在所述半导体衬底中并且具有由与所述第一半导体材料不同的第二半导体材料制成的n型源/漏区; 以及形成在所述半导体衬底中并具有由与所述第一半导体材料不同的第三半导体材料制成的p型源极/漏极区的p沟道场效应晶体管，其中所述第二和第三半导体材料是不同的材料。 具有n沟道晶体管和p沟道晶体管的半导体器件通过利用应力来提高性能。

公开(公告)号：US20120182819A1

公开(公告)日：2012-07-19

申请号：US13429082

申请日：2012-03-23

申请人： Young Seog KIM ,  Kuoyuan (Peter) HSU ,  Derek C. TAO ,  Young Suk KIM

发明人： Young Seog KIM ,  Kuoyuan (Peter) HSU ,  Derek C. TAO ,  Young Suk KIM

IPC分类号： G11C5/14 ,  G05F3/02

CPC分类号： G11C11/412

摘要： A circuit includes a first node; a second node; a first PMOS transistor having a source coupled to the first node, a drain coupled to a first control transistor, and a gate driven by a first voltage; and a first NMOS transistor having a source coupled to the second node, a drain coupled to the first control transistor, and a gate driven by a second voltage. The first PMOS transistor is configured to automatically turn off based on the first voltage and a first node voltage at the first node. The first NMOS transistor is configured to automatically turn off based on the second voltage and a second node voltage at the second node. When the first PMOS transistor, the control transistor, and the first NMOS transistor are on, the first node voltage is lowered while the second voltage is raised.

摘要翻译： 电路包括第一节点; 第二个节点; 具有耦合到第一节点的源极的第一PMOS晶体管，耦合到第一控制晶体管的漏极和由第一电压驱动的栅极; 以及第一NMOS晶体管，其具有耦合到第二节点的源极，耦合到第一控制晶体管的漏极和由第二电压驱动的栅极。 第一PMOS晶体管被配置为基于第一节点处的第一电压和第一节点电压自动关闭。 第一NMOS晶体管被配置为基于第二节点处的第二电压和第二节点电压自动关闭。 当第一PMOS晶体管，控制晶体管和第一NMOS晶体管导通时，第一节点电压降低，而第二电压升高。