Transistor device with strained germanium (Ge) layer by selectively growth and fabricating method thereof
    1.
    发明申请
    Transistor device with strained germanium (Ge) layer by selectively growth and fabricating method thereof 审中-公开
    具有应变锗(Ge)层的晶体管器件通过选择性生长及其制造方法

    公开(公告)号:US20070045610A1

    公开(公告)日:2007-03-01

    申请号:US11293275

    申请日:2005-12-05

    IPC分类号: H01L31/109

    摘要: A transistor device with strained Ge layer by selectively growth and a fabricating method thereof are provided. A strained Ge layer is selectively grown on a substrate, so that the material of source/drain region is still the same as that of the substrate, and the strained Ge layer serves as a carry transport channel. Therefore, the performance of the device characteristics can be improved and the leakage current of the transistor may be approximately commensurate with that of a Si substrate field effect transistor (FET).

    摘要翻译: 提供了通过选择性生长具有应变Ge层的晶体管器件及其制造方法。 应变Ge层选择性地生长在衬底上,使得源极/漏极区的材料与衬底的材料仍然相同,并且应变Ge层用作携带传输沟道。 因此,可以提高器件特性的性能,并且晶体管的漏电流可以与Si衬底场效应晶体管(FET)的漏电流近似相当。

    Strained germanium field effect transistor and method of making the same
    3.
    发明申请
    Strained germanium field effect transistor and method of making the same 审中-公开
    应变锗场效应晶体管及其制作方法

    公开(公告)号:US20060284164A1

    公开(公告)日:2006-12-21

    申请号:US11216179

    申请日:2005-09-01

    IPC分类号: H01L31/00

    摘要: A strained germanium field effect transistor (FET) and method of making the same, comprise forming a germanium layer on a substrate, then forming a Si protective layer on the germanium layer, next forming a gate insulation layer on the Si protective layer, and fmally positioning a gate on the gate insulation layer. The germanium layer is used as a carrier transport channel of the strained germanium FET to improve the drive current and the carrier mobility, and to increase the devices performance effectively. And because the Si protective layer is on the germanium layer, the interface property between the germanium layer and the gate insulation layer is improved.

    摘要翻译: 应变锗场效应晶体管(FET)及其制造方法包括在衬底上形成锗层,然后在锗层上形成Si保护层,接着在Si保护层上形成栅极绝缘层,并且最终形成 在栅极绝缘层上定位栅极。 锗层用作应变锗FET的载流子传输通道,以提高驱动电流和载流子迁移率,并有效提高器件性能。 并且由于Si保护层在锗层上,所以锗层和栅极绝缘层之间的界面性能得到改善。

    Reflector structure for improving irradiation uniformity of linear lamp array
    7.
    发明授权
    Reflector structure for improving irradiation uniformity of linear lamp array 有权
    用于提高线性灯阵列照射均匀性的反射器结构

    公开(公告)号:US06385396B1

    公开(公告)日:2002-05-07

    申请号:US09426963

    申请日:1999-10-26

    IPC分类号: H01L21205

    CPC分类号: H01L21/67115

    摘要: A reflector structure is provided for improving irradiation uniformity of a linear lamp array applied in a semiconductor process. The reflector structure includes a central reflector, two side reflectors, and two inclined reflectors. The central reflector is horizontally set above the linear lamp array at a first predetermined distance from a wafer for reflecting light irradiated from a central part of the linear lamp array to the wafer. The two side reflectors are horizontally set above the linear lamp at a second predetermined distance to the wafer, wherein the second predetermined distance is less than the first predetermined distance, and respectively connected to two opposite side parts of the central reflector for reflecting light irradiated from side parts of the linear lamp array to the wafer. The two inclined reflectors are respectively connected to one side of each of the two first side reflectors at an inclined angel to the wafer for reflecting light irradiated from two end parts of the linear lamp array to the wafer.

    摘要翻译: 提供了一种用于改善在半导体工艺中应用的线性灯阵列的照射均匀性的反射器结构。 反射器结构包括中央反射器,两个侧反射器和两个倾斜反射器。 中心反射器水平地设置在线状灯阵列上方,距晶片的第一预定距离处,用于将从线状灯阵列的中心部分照射的光反射到晶片。 两侧反射器水平地设置在线状灯的上方距离晶片的第二预定距离处,其中第二预定距离小于第一预定距离,并且分别连接到中心反射器的两个相对的侧部,以反射从 线性灯阵列的侧面部分到晶片。 两个倾斜反射器分别以两个倾斜的角度连接到两个第一侧反射器中的每一个的一侧到晶片,用于将从线状灯阵列的两个端部照射的光反射到晶片。

    System and method for characterizing the quality of the interface between a silicon and a gate insulator in a MOS device
    10.
    发明授权
    System and method for characterizing the quality of the interface between a silicon and a gate insulator in a MOS device 有权
    用于表征MOS器件中的硅和栅极绝缘体之间的界面的质量的系统和方法

    公开(公告)号:US06812729B2

    公开(公告)日:2004-11-02

    申请号:US10175720

    申请日:2002-06-19

    IPC分类号: G01R3126

    CPC分类号: G01R31/311 G01R31/2656

    摘要: A method for characterizing the quality of the interface between a silicon and a gate insulator in a MOS device includes the steps of: applying at least one current to the MOS device through the gate; detecting at least one electroluminescent signal corresponding to the silicon bandgap energy after the current flows through the MOS device; and outputting the electroluminescent waveform in the time domain. The quality of the interface between a silicon and a gate insulator in the MOS device is determined by analyzing the minority carrier lifetime in silicon. The invention also discloses a characterization system for implementing the method.

    摘要翻译: 用于表征MOS器件中的硅和栅极绝缘体之间的界面的质量的方法包括以下步骤:通过栅极将至少一个电流施加到MOS器件; 在电流流过MOS器件之后检测至少一个对应于硅带隙能量的电致发光信号; 并在时域中输出电致发光波形。 通过分析硅中的少数载流子寿命来确定MOS器件中的硅和栅极绝缘体之间的界面的质量。 本发明还公开了一种用于实现该方法的表征系统。