公开(公告)号：US06226453B1

公开(公告)日：2001-05-01

申请号：US08931331

申请日：1997-09-16

Applicant: Mark Yam ,  Bruce W. Peuse

Inventor： Mark Yam ,  Bruce W. Peuse

IPC: H01L21205

CPC classification number: G01J5/0003 ,  G01J5/0007 ,  G01J5/04 ,  G01J5/046 ,  G01J5/048 ,  G01J5/08 ,  G01J5/0821 ,  G01J5/0893

Abstract: A temperature probe has a light conductor for optically transmitting temperature information to a pyrometer. The light conductor has a first portion which is adapted to capture temperature information and a second portion which is connected to the pyrometer. The probe also has an enclosure for protecting the second portion of the light conductor. The enclosure in turn has a passageway for housing the second portion of the light conductor and an opening for projecting the first portion of the light conductor from the passageway to the outside of the enclosure. Additionally, a seal is provided in the passageway adjacent the opening to encapsulate the second portion of the light conductor inside the passageway.

Abstract translation: 温度探头具有用于将温度信息光学传递到高温计的光导体。 光导体具有适于捕获温度信息的第一部分和连接到高温计的第二部分。 探头还具有用于保护光导体的第二部分的外壳。 外壳又具有用于容纳光导体的第二部分的通道和用于将光导体的第一部分从通道突出到外壳的外部的开口。 此外，在邻近开口的通道中设置密封件，以将光导体的第二部分封装在通道内。

公开(公告)号：US06488776B2

公开(公告)日：2002-12-03

申请号：US10145469

申请日：2002-05-13

Applicant: Shulin Wang

Inventor： Shulin Wang

IPC: H01L21205

CPC classification number: C23C16/45502 ,  C23C16/24 ,  H01L21/02381 ,  H01L21/02395 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02661

Abstract: A method and apparatus for depositing a boron insitu doped amorphous or polycrystalline silicon film on a substrate. According to the present invention, a substrate is placed into deposition chamber. A reactant gas mix comprising a silicon source gas, boron source gas, and a carrier gas is fed into the deposition chamber. The carrier gas is fed into the deposition chamber at a rate so that the residence of the carrier gas in the deposition chamber is less then or equal to 3 seconds or alternatively has a velocity of at least 4 inches/sec. In another embodiment of forming a boron doped amorphous for polycrystalline silicon film a substrate is placed into a deposition chamber. The substrate is heated to a deposition temperature between 580-750° C. and the chamber pressure reduced to a deposition pressure of less than or equal to 50 torr. A silicon source gas is fed into the deposition at a rate to provide a silicon source gas partial pressure of between 1-5 torr. Additionally, a boron source gas is fed into the deposition chamber at a rate to provide a boron gas partial pressure of between 0.005-0.05 torr.

Abstract translation: 一种用于在衬底上沉积硼原位掺杂的非晶或多晶硅膜的方法和装置。 根据本发明，将基板放置在沉积室中。 将包含硅源气体，硼源气体和载气的反应气体混合物供入沉积室。 载体气体以一定的速率进料到沉积室中，使得载气在沉积室中的停留时间小于或等于3秒，或者备选地具有至少4英寸/秒的速度。在成形的另一个实施方案中 将用于多晶硅膜的硼掺杂非晶体的衬底放置到沉积室中。 将衬底加热至580-750℃之间的沉积温度，并将室压降低至小于或等于50托的沉积压力。 硅源气体以提供1-5托之间的硅源气体分压的速率进料到沉积物中。 此外，硼源气体以提供0.005-0.05托的硼气分压的速率进料到沉积室中。

公开(公告)号：US06255004B1

公开(公告)日：2001-07-03

申请号：US09101662

申请日：1998-07-14

Applicant: Seikoh Yoshida

Inventor： Seikoh Yoshida

IPC: H01L21205

CPC classification number: H01L33/007 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02491 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/0262 ,  Y10S148/113 ,  Y10T428/12576 ,  Y10T428/12611 ,  Y10T428/12674

Abstract: A device made of a III-V nitride compound semiconductor comprising a substrate of sapphire, a Si single crystal, a GaAs single crystal, or a GaP single crystal; a GaN single crystal film with a thickness not greater than 3 nm formed on the substrate; and at least one layer of a III-V nitride compound semiconductor formed on the GaN single crystal film. Also a device made of a III-V nitride compound semiconductor comprising a Si single crystal substrate having a natural oxide film; a SiOn film formed by partially nitriding the natural oxide film; and a layer of a III-V nitride compound semiconductor formed on the SiON film.

Abstract translation: 由包括蓝宝石衬底，Si单晶，GaAs单晶或GaP单晶的III-V族氮化物化合物半导体制成的器件; 在衬底上形成厚度不大于3nm的GaN单晶膜; 以及形成在GaN单晶膜上的至少一层III-V族氮化物化合物半导体。 还有一种由III-V族氮化物化合物半导体制成的器件，它包括具有自然氧化膜的Si单晶衬底; 通过部分氮化天然氧化膜形成的SiOn膜; 以及形成在SiON膜上的III-V族氮化物化合物半导体层。

公开(公告)号：US06494955B1

公开(公告)日：2002-12-17

申请号：US09596854

申请日：2000-06-19

Applicant: Lawrence Chung-Lai Lei ,  Sal Umotoy ,  Xiaoxiong Yuan ,  Anzhong Chang ,  Hongbee Teoh ,  Anh N. Nguyen ,  Ron Rose

Inventor： Lawrence Chung-Lai Lei ,  Sal Umotoy ,  Xiaoxiong Yuan ,  Anzhong Chang ,  Hongbee Teoh ,  Anh N. Nguyen ,  Ron Rose

IPC: H01L21205

CPC classification number: C23C16/45521 ,  C23C16/4581 ,  C23C16/4586 ,  H01L21/67017 ,  H01L21/68721 ,  H01L21/68735 ,  H01L21/6875 ,  H01L21/68785 ,  H01L21/68792

Abstract: A substrate support assembly for supporting a substrate during processing is provided. In one embodiment, a support assembly includes a top ceramic plate having a first side, a bottom ceramic plate having a first side and an embedded electrode, the first side of the bottom plate fused to the first side of the top plate defining a channel therebetween. In another embodiment, a support assembly includes a first plate having a first side and second side. A ring is disposed on the first side. A stepped surface is formed on the first side radially inward of the ring. A second plate is connected to the second side of the first plate.

Abstract translation: 提供了一种用于在处理期间支撑基板的基板支撑组件。 在一个实施例中，支撑组件包括具有第一侧的顶部陶瓷板，具有第一侧和嵌入电极的底部陶瓷板，底板的与顶板的第一侧熔合的第一侧在其间限定通道 。 在另一个实施例中，支撑组件包括具有第一侧面和第二侧面的第一板。 环设在第一侧。 在环的径向内侧的第一侧上形成台阶面。 第二板连接到第一板的第二侧。

公开(公告)号：US06204489B1

公开(公告)日：2001-03-20

申请号：US09218701

申请日：1998-12-22

Applicant: Yuji Katsuda ,  Kiyoshi Araki ,  Tsuneaki Ohashi

Inventor： Yuji Katsuda ,  Kiyoshi Araki ,  Tsuneaki Ohashi

IPC: H01L21205

CPC classification number: H05B3/748 ,  H05B3/283 ,  H05B3/74 ,  Y10T29/49083

Abstract: A heater including a substrate having a heating surface to treat a substance to be heated on the substrate, a heating element embedded in the substrate, and a resistance control part. The substrate includes a first ceramic material and the resistance control part includes a second ceramic material which has higher volume resistivity than that of the first ceramic material.

Abstract translation: 一种加热器，包括具有用于处理基板上待加热物质的加热面的基板，嵌入基板的加热元件和电阻控制部。 基板包括第一陶瓷材料，并且电阻控制部分包括具有比第一陶瓷材料的体积电阻率更高的体积电阻率的第二陶瓷材料。

公开(公告)号：US06720251B1

公开(公告)日：2004-04-13

申请号：US09990197

申请日：2001-11-21

Applicant: Bart van Schravendijk ,  Ming Li ,  Jason Tian ,  Tom Mountsier ,  M. Zlaul Karim

Inventor： Bart van Schravendijk ,  Ming Li ,  Jason Tian ,  Tom Mountsier ,  M. Zlaul Karim

IPC: H01L21205

CPC classification number: H01L21/02126 ,  C23C16/401 ,  G03F7/091 ,  H01L21/02274 ,  H01L21/0276 ,  H01L21/31144 ,  H01L21/31612

Abstract: A nitrogen-free anti-reflective layer for use in semiconductor photolithography is fabricated in a chemical vapor deposition process, optionally plasma-enhanced, using a gaseous mixture of carbon, silicon, and oxygen sources. By varying the process parameters, acceptable values of the refractive index n and extinction coefficient k can be obtained. The nitrogen-free anti-reflective layer produced by this technique eliminates the mushrooming and footing problems found with conventional anti-reflective layers.

Abstract translation: 使用碳，硅和氧源的气体混合物，在化学气相沉积工艺（任选地等离子体增强）中制造用于半导体光刻中的无氮抗反射层。 通过改变工艺参数，可以获得折射率n和消光系数k的可接受值。 通过这种技术生产的无氮抗反射层消除了常规抗反射层发现的萌发和基础问题。

公开(公告)号：US06331697B2

公开(公告)日：2001-12-18

申请号：US09754779

申请日：2001-01-04

Applicant: Stephen E. Savas

Inventor： Stephen E. Savas

IPC: H01L21205

CPC classification number: C23C16/463 ,  C23C16/46 ,  H01L21/67103 ,  Y10S414/135

Abstract: A system and method for thermally processing a substrate. A substrate is heated to a processing temperature at which the substrate is susceptible to plastic deformation or slip. An insulating cover may be removed to initially cool the substrate below such temperature before removal from the system. Gas pressure may also be adjusted to enhance heat transfer during processing and decrease heat transfer prior to removal of the substrate. Susceptors or surfaces for cooling the substrate may also be included in the system. The substrate may be transferred from a heating surface to a cooling surface by moving or rotating the substrate through warm transitional regions to avoid slip.

公开(公告)号：US06310328B1

公开(公告)日：2001-10-30

申请号：US09208958

申请日：1998-12-10

Applicant: Arnon Gat

Inventor： Arnon Gat

IPC: H01L21205

CPC classification number: H01L21/67115

Abstract: A system for heating a plurality of semiconductor wafers at the same time includes a thermal processing chamber containing a substrate holder designed to hold from about three to about ten wafers. The thermal processing chamber is surrounded by light energy sources which heat the wafers contained in the chamber. The light energy sources can heat the wafers directly or indirectly. In one embodiment, the thermal processing chamber includes a liner made from a heat conductive material. The light energy sources are used to heat the liner which, in turn, heats the wafers. In an alternative embodiment, energy dispersing plates are placed in between adjacent wafers. Light energy being emitted by the light energy sources enters the energy dispersing members and gets distributed across the surface of adjacent wafers for heating the wafers uniformly.

Abstract translation: 用于同时加热多个半导体晶片的系统包括热处理室，其包含设计成保持约三个至约十个晶片的基板保持架。 热处理室被包含在腔室中的晶片加热的光能源包围。 光能源可以直接或间接地加热晶片。 在一个实施例中，热处理室包括由导热材料制成的衬垫。 光能源用于加热衬里，衬垫又加热晶片。 在替代实施例中，将能量分散板放置在相邻晶片之间。 由光能源发射的光能进入能量分散构件并分布在相邻晶片的表面上，以均匀地加热晶片。

公开(公告)号：US06191397B1

公开(公告)日：2001-02-20

申请号：US09345749

申请日：1999-07-01

Applicant: Kei Hayasaki ,  Shinichi Ito ,  Kenji Kawano

Inventor： Kei Hayasaki ,  Shinichi Ito ,  Kenji Kawano

IPC: H01L21205

CPC classification number: H01L21/67115 ,  G03F7/168 ,  G03F7/38

Abstract: A heating apparatus for performing heat treatment on a wafer applied with a resist before or after exposure includes a heating plate for heating a wafer which is placed on the heating plate, a light intensity detecting apparatus for irradiating light on the wafer to detect intensity of reflected light from the resist on the wafer, and a control section for controlling heating performed by the heating plate on the basis of the detected intensity of reflected light so that heating amount applied to a plurality of wafers becomes constant. Accordingly, the heating amount of the wafer can be controlled to be constant and variations in dimension of resist patterns can be reduced.

Abstract translation: 用于在曝光前后施加抗蚀剂的晶片上进行热处理的加热装置包括用于加热放置在加热板上的晶片的加热板，用于在晶片上照射光以检测反射的强度的光强度检测装置 来自晶片上的抗蚀剂的光，以及控制部分，用于根据检测到的反射光强度控制由加热板进行的加热，使得施加到多个晶片的加热量变得恒定。 因此，可以将晶片的加热量控制为恒定，并且可以减小抗蚀剂图案的尺寸变化。

公开(公告)号：US06693022B2

公开(公告)日：2004-02-17

申请号：US10226764

申请日：2002-08-23

Applicant: Joerg Dreybrodt ,  Dirk Drescher ,  Ralf Zedlitz ,  Stephan Wege

Inventor： Joerg Dreybrodt ,  Dirk Drescher ,  Ralf Zedlitz ,  Stephan Wege

IPC: H01L21205

CPC classification number: H01L21/28061 ,  C23C16/0272 ,  C23C16/24 ,  C23C16/42 ,  C23C16/4404 ,  H01L21/0242 ,  H01L21/02491 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02664 ,  H01L21/32135 ,  H01L21/32137 ,  H01L21/32155

Abstract: Doped polysilicon layers and layered polysilicon structures are produced, and the layers and layered structures are structured. The doping is distinguished by the fact that the doping compound is added as a process gas during the chemical vapor deposition of the polysilicon to define the doping profile. The feed of dopant to the process gas is stopped toward the end of the vapor deposition, with the result that a boundary layer of undoped silicon is deposited. As a result, a favorable surface quality and better adhesion to a neighboring layer is obtained. The structuring process comprises an at least three-step etching process in which a fluorine containing gas is used for etching in a first step, a chlorine-containing gas is used for etching in a second step and a bromine-containing gas is used for etching in a third step. The invention also encompasses wafers and semiconductor chips produced with the novel doping and/or structuring method.

Abstract translation: 制造掺杂的多晶硅层和分层多晶硅结构，并且层和层状结构被构造。 掺杂的特征在于，在多晶硅的化学气相沉积期间掺杂化合物作为工艺气体加入以限定掺杂分布。 向气相沉积的终点停止向工艺气体的掺杂剂的进料，结果沉积未掺杂的硅的边界层。 结果，获得良好的表面质量和对相邻层的更好的附着力。 结构工艺包括在第一步骤中使用含氟气体进行蚀刻的至少三步蚀刻工艺，在第二步骤中使用含氯气体进行蚀刻，并且使用含溴气体进行蚀刻 在第三步。 本发明还包括用新的掺杂和/或结构化方法制造的晶片和半导体芯片。