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    Electrochemical etching method for silicon substrate having PN junction
    1.
    发明授权
    Electrochemical etching method for silicon substrate having PN junction 有权
    具有PN结的硅衬底的电化学蚀刻方法

    公开(公告)号：US06194236B1

    公开(公告)日：2001-02-27

    申请号：US09247908

    申请日：1999-02-11

    申请人： Minekazu Sakai ,  Tsuyoshi Fukada ,  Yukihiko Tanizawa ,  Koki Mizuno ,  Yasutoshi Suzuki ,  Yoshitsugu Abe ,  Hiroshi Tanaka ,  Motoki Ito ,  Kazuhisa Ikeda ,  Hiroshi Okada

    发明人： Minekazu Sakai ,  Tsuyoshi Fukada ,  Yukihiko Tanizawa ,  Koki Mizuno ,  Yasutoshi Suzuki ,  Yoshitsugu Abe ,  Hiroshi Tanaka ,  Motoki Ito ,  Kazuhisa Ikeda ,  Hiroshi Okada

    IPC分类号： H01L2166

    CPC分类号： G01L9/0042 ,  H01L29/84 ,  Y10S438/977

    摘要： An etching method for a silicon substrate, which can easily smooth the etching surface of the (110)-oriented silicon, is disclosed. A container is filled with KOH solution. In the KOH solution is immersed a (110)-oriented silicon wafer having a PN junction and is also disposed a platinum electrode plate to face the silicon wafer. To between a platinum electrode of the silicon wafer and the platinum electrode plate are connected a constant voltage power source, an ammeter and a contact in series. A controller starts etching from one surface on which the PN junction is formed, and terminates voltage application when the specified time lapses after the formation of an anodic oxide film is equilibrated with the etching of the anodic oxide film on the etching surface on the PN junction part. In this case, the controller detects flowing current through the ammeter, and the point of time when the equilibrium state is obtained is the point of inflection of the detected current to the constant current after the peak thereof.

    摘要翻译： 公开了一种可以容易地平滑（110）取向的硅的蚀刻表面的硅衬底的蚀刻方法。 容器中充满KOH溶液。 在KOH溶液中浸渍具有PN结的（110）取向的硅晶片，并且还设置有与铂晶片相对的铂电极板。 在硅晶片的铂电极和铂电极板之间连接恒压电源，电流表和触点串联。 控制器从其上形成PN结的一个表面开始蚀刻，并且在阳极氧化膜形成之后指定的时间经过平衡后，在PN结的蚀刻表面上蚀刻阳极氧化膜来终止电压施加 部分。 在这种情况下，控制器检测通过电流表的流动电流，并且获得平衡状态的时间点是检测电流在其峰值之后的恒定电流的拐点。

    Etching method for silicon substrates and semiconductor sensor
    2.
    发明授权
    Etching method for silicon substrates and semiconductor sensor 失效
    硅衬底和半导体传感器的蚀刻方法

    公开(公告)号：US5949118A

    公开(公告)日：1999-09-07

    申请号：US637128

    申请日：1996-04-24

    申请人： Minekazu Sakai ,  Tsuyoshi Fukada ,  Koki Mizuno ,  Yasutoshi Suzuki ,  Yoshitsugu Abe ,  Hiroshi Tanaka ,  Motoki Ito ,  Kazuhisa Ikeda ,  Hiroshi Okada

    发明人： Minekazu Sakai ,  Tsuyoshi Fukada ,  Koki Mizuno ,  Yasutoshi Suzuki ,  Yoshitsugu Abe ,  Hiroshi Tanaka ,  Motoki Ito ,  Kazuhisa Ikeda ,  Hiroshi Okada

    IPC分类号： G01L9/00 ,  H01L29/84 ,  H01L29/82

    CPC分类号： G01L9/0042 ,  H01L29/84 ,  Y10S438/977

    摘要： An etching method for a silicon substrate, which can easily smooth the etching surface of the (110)-oriented silicon, is disclosed. A container is filled with KOH solution. In the KOH solution is immersed a (110)-oriented silicon wafer having a PN junction and is also disposed a platinum electrode plate to face the silicon wafer. To between a platinum electrode of the silicon wafer and the platinum electrode plate are connected a constant voltage power source, an ammeter and a contact in series. A controller starts etching from one surface on which the PN junction is formed, and terminates voltage application when the specified time lapses after the formation of an anodic oxide film is equilibrated with the etching of the anodic oxide film on the etching surface on the PN junction part. In this case, the controller detects flowing current through the ammeter, and the point of time when the equilibrium state is obtained is the point of inflection of the detected current to the constant current after the peak thereof.

    摘要翻译： 公开了一种可以容易地平滑（110）取向的硅的蚀刻表面的硅衬底的蚀刻方法。 容器中充满KOH溶液。 在KOH溶液中浸渍具有PN结的（110）取向的硅晶片，并且还设置有与铂晶片相对的铂电极板。 在硅晶片的铂电极和铂电极板之间连接恒压电源，电流表和触点串联。 控制器从其上形成PN结的一个表面开始蚀刻，并且在阳极氧化膜形成之后指定的时间经过平衡后，在PN结的蚀刻表面上蚀刻阳极氧化膜来终止电压施加 部分。 在这种情况下，控制器检测通过电流表的流动电流，并且获得平衡状态的时间点是检测电流在其峰值之后的恒定电流的拐点。

    Method of etching silicon wafer and silicon wafer
    3.
    发明授权
    Method of etching silicon wafer and silicon wafer 失效
    蚀刻硅晶片和硅晶片的方法

    公开(公告)号：US06284670B1

    公开(公告)日：2001-09-04

    申请号：US09120803

    申请日：1998-07-23

    申请人： Yoshitsugu Abe ,  Hiroshi Tanaka ,  Atsushi Sakaida ,  Toshihisa Taniguchi ,  Tsuyoshi Fukada

    发明人： Yoshitsugu Abe ,  Hiroshi Tanaka ,  Atsushi Sakaida ,  Toshihisa Taniguchi ,  Tsuyoshi Fukada

    IPC分类号： H01L213063

    CPC分类号： B81C1/00158 ,  B81B2201/0235 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81C2201/0114 ,  B81C2201/0133 ,  H01L21/3063

    摘要： After an Si wafer is anisotropically etched through an etching mask having an opening in an anisotropically etching solution, an etching face of the Si wafer emerged by the anisotropic etching is subjected to anodic oxidation by applying a positive voltage for anodic oxidation on the Si wafer. As a result, the etching face of the Si wafer is isotropically etched due to the anodic oxidation in the anisotropic etching solution. By the isotropic etching thus performed, a sharp corner formed at an end portion of a recess portion formed in the Si wafer by the anisotropic etching, is rounded. Because the isotropic etching reaction progresses very slowly in comparison with the anisotropic etching, control of the etching can be made easy and accurately. As a result, the thickness of the diaphragm can be prevented from being dispersed.

    摘要翻译： 在通过各向异性蚀刻溶液中具有开口的蚀刻掩模对Si晶片进行各向异性蚀刻之后，通过在Si晶片上施加阳极氧化的正电压，通过各向异性蚀刻出现的Si晶片的蚀刻面进行阳极氧化。 结果，由于各向异性蚀刻溶液中的阳极氧化，Si晶片的蚀刻面被各向同性地蚀刻。 通过如此进行的各向同性蚀刻，通过各向异性蚀刻形成在形成在Si晶片中的凹部的端部处形成的尖角变圆。 由于与各向异性蚀刻相比，各向同性蚀刻反应进行得非常缓慢，因此可以容易且精确地控制蚀刻。 结果，可以防止隔膜的厚度分散。

    Fine processing method
    5.
    发明授权
    Fine processing method 失效
    精细加工方法

    公开(公告)号：US5899750A

    公开(公告)日：1999-05-04

    申请号：US814936

    申请日：1997-03-12

    申请人： Hiroshi Tanaka ,  Yoshitsugu Abe ,  Koji Matsumoto ,  Kazuyuki Inoue

    发明人： Hiroshi Tanaka ,  Yoshitsugu Abe ,  Koji Matsumoto ,  Kazuyuki Inoue

    IPC分类号： G01L1/18 ,  H01L21/306 ,  H01L21/308 ,  H01L29/84 ,  H01L21/302

    CPC分类号： H01L21/3081 ,  Y10S438/942

    摘要： In a fine processing method for forming a silicon substrate, first, an oxynitride layer is formed on the silicon substrate. Thereafter, a silicon nitride layer is formed on the oxynitride layer and patterned into a predetermined shape to cause it to function as an etching mask. The silicon substrate is etched through the etching mask. In this case, because of the oxynitride layer formed between the silicon substrate and the silicon nitride layer, an interface between the silicon substrate and the silicon nitride layer is not easily eroded in the etching process. As a result, processing accuracy of the substrate is improved.

    摘要翻译： 在用于形成硅衬底的精细加工方法中，首先在硅衬底上形成氧氮化物层。 此后，在氧氮化物层上形成氮化硅层，并将其图案化成预定的形状，使其作为蚀刻掩模。 通过蚀刻掩模蚀刻硅衬底。 在这种情况下，由于在硅衬底和氮化硅层之间形成氧氮化物层，所以在蚀刻工艺中硅衬底和氮化硅层之间的界面不容易被侵蚀。 结果，提高了基板的加工精度。

    Semiconductor wafer etching method
    7.
    发明授权
    Semiconductor wafer etching method 失效
    半导体晶片蚀刻方法

    公开(公告)号：US06251542B1

    公开(公告)日：2001-06-26

    申请号：US09188565

    申请日：1998-11-10

    申请人： Masahiro Tomita ,  Yasuo Souki ,  Motoki Ito ,  Kazuo Tanaka ,  Hiroshi Tanaka

    发明人： Masahiro Tomita ,  Yasuo Souki ,  Motoki Ito ,  Kazuo Tanaka ,  Hiroshi Tanaka

    IPC分类号： H01L21302

    CPC分类号： H01L21/30608 ,  H01L21/02019 ,  H01L21/31127 ,  H01L21/3121 ,  Y10S438/928

    摘要： A semiconductor wafer etching method is disclosed that allows etching without use of restricted ozone-destroying solvents such as trichloroethane or fluorocarbons. This method involves forming a protective film of silicon resin or alkali resistant resin on a semiconductor wafer. Then, a surface region of the wafer not covered by the protective film is etched. Finally, the protective film is peeled from the semiconductor wafer without damaging the wafer or employing solvents harmful to the environment.

    摘要翻译： 公开了半导体晶片蚀刻方法，其允许在不使用限制性的臭氧破坏溶剂如三氯乙烷或碳氟化合物的情况下进行蚀刻。 该方法包括在半导体晶片上形成硅树脂或耐碱树脂的保护膜。 然后，蚀刻未被保护膜覆盖的晶片的表面区域。 最后，保护膜从半导体晶片剥离而不会损坏晶片或者使用对环境有害的溶剂。