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1.发明申请Device using ambipolar transport in SB-MOSFET and method for operating the same 失效在SB-MOSFET中使用双极传输的器件及其操作方法公开(公告)号：US20060131621A1
公开(公告)日：2006-06-22
申请号：US11187654
申请日：2005-07-22
IPC分类号： H01L31/112
CPC分类号： H01L29/7839 , G11C11/56
摘要： A device using an ambipolar transport of an SB-MOSFET and a method for operating the same are provided. The SB-MOSFET includes: a silicon channel region; a source and a drain contacted on both sides of the channel region and formed of material including metal layer; and a gate formed on the channel region, with a gate dielectric layer interposed therebetween. Positive (+), 0 or negative (−) gate voltage is selectively applied to the gate, the channel becomes off-state when the gate voltage between a negative threshold voltage and a positive threshold voltage is applied, and the channel becomes a first on-state and a second on-state when the gate voltage is lower than the negative threshold voltage or higher than the positive threshold voltage. Accordingly, it is possible to implement three current states, that is, hole current, electron current, and no current. The SB-MOSFET can be applied to a multi-bit memory and/or multi-bit logic device.
摘要翻译： 提供了使用SB-MOSFET的双极运输的装置及其操作方法。 SB-MOSFET包括：硅沟道区; 源极和漏极在沟道区域的两侧接触并由包括金属层的材料形成; 以及形成在沟道区上的栅极，介于其间的栅介质层。 正极（+），0或负（ - ）栅极电压选择性地施加到栅极，当施加负阈值电压和正阈值电压之间的栅极电压时，通道变为截止状态，并且通道变为第一个 当门电压低于负阈值电压或高于正阈值电压时，状态和第二导通状态。 因此，可以实现三种电流状态，即空穴电流，电子电流，无电流。 SB-MOSFET可以应用于多位存储器和/或多位逻辑器件。
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公开(公告)号：US20060118899A1
公开(公告)日：2006-06-08
申请号：US11196180
申请日：2005-08-03
IPC分类号： H01L31/07
CPC分类号： H01L29/7613 , B82Y10/00 , H01L29/872
摘要： Provided are a Schottky barrier tunnel single electron transistor and a method of manufacturing the same that use a Schottky barrier formed between metal and semiconductor by replacing a source and a drain with silicide as a reactant of silicon and metal, instead of a conventional method of manufacturing a single electron transistor (SET) that includes source and drain regions by implanting dopants such that an artificial quantum dot is formed in a channel region. As a result, it does not require a conventional PADOX process to form a quantum dot for a single electron transistor (SET), height and width of a tunneling barrier can be artificially adjusted by using silicide materials that have various Schottky junction barriers, and it is possible to improve current driving capability of the single electron transistor (SET).
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3.发明申请公开(公告)号：US20060131664A1
公开(公告)日：2006-06-22
申请号：US11188076
申请日：2005-07-22
IPC分类号： H01L29/76
CPC分类号： H01L29/665 , H01L21/2252 , H01L21/2254 , H01L21/28518 , H01L21/28537 , H01L29/458 , H01L29/4908 , H01L29/66636 , H01L29/7834 , H01L29/7839
摘要： An n-type SBTT and a manufacturing method thereof are provided. The SBTT includes a silicon layer, a gate, a double layer that has a rare-earth metal suicide layer and a transition metal silicide layer. The silicon layer has a channel region. The gate is formed in an overlapping manner on the channel region and has a gate dielectric layer on its interface with respect to the silicon layer. The double layer is formed as a source/drain that has the channel region interposed on the silicon layer.
摘要翻译： 提供了n型SBTT及其制造方法。 SBTT包括硅层，栅极，具有稀土金属硅化物层和过渡金属硅化物层的双层。 硅层具有沟道区。 栅极以重叠的方式形成在沟道区上，并且在其相对于硅层的界面上具有栅极电介质层。 双层形成为具有介于硅层之间的沟道区的源极/漏极。
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4.发明申请公开(公告)号：US20070128781A1
公开(公告)日：2007-06-07
申请号：US11502948
申请日：2006-08-11
IPC分类号： H01L21/338
CPC分类号： H01L29/458 , H01L29/517 , H01L29/66643
摘要： Provided are a Schottky barrier tunnel transistor and a method of manufacturing the same. The method includes the steps of: preparing a substrate; forming an active silicon layer on the substrate; forming a gate insulating layer on a region of the silicon layer; forming a gate electrode on the gate insulating layer; implanting ions into the silicon layer on which the gate insulating layer is not formed; and annealing the ion-implanted silicon layer. Accordingly, it is possible to manufacture the Schottky barrier tunnel transistor having stable characteristics and high performance by implanting the ions into the silicon layer using an ion implantation method and then annealing the silicon layer to form metal-silicide.
摘要翻译： 提供了一种肖特基势垒隧道晶体管及其制造方法。 该方法包括以下步骤：制备衬底; 在衬底上形成有源硅层; 在所述硅层的区域上形成栅极绝缘层; 在栅极绝缘层上形成栅电极; 将离子注入未形成栅极绝缘层的硅层中; 并对离子注入的硅层退火。 因此，通过使用离子注入法将离子注入硅层，然后使硅层退火以形成金属硅化物，可以制造具有稳定特性和高性能的肖特基势垒隧道晶体管。
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5.发明申请SB-MOSFET (Schottky barrier metal-oxide-semiconductor field effect transistor) with low barrier height and fabricating method thereof 审中-公开具有低势垒高度的SB-MOSFET（肖特基势垒金属氧化物半导体场效应晶体管）及其制造方法公开(公告)号：US20070187758A1
公开(公告)日：2007-08-16
申请号：US11635179
申请日：2006-12-07
IPC分类号： H01L27/12
CPC分类号： H01L29/458 , H01L29/045 , H01L29/66772 , H01L29/7839 , H01L29/78696
摘要： Provided is a high-performance n-type Schottky barrier tunneling transistor with low Schottky barrier for electrons due to a Schottky junction formed on a Si (111) surface created through anisotropic etching. The Schottky barrier tunneling transistor includes: a silicon on insulator (SOI) substrate; a source and a drain formed on the SOI substrate; a channel formed between the source and the drain; a gate insulating layer and a gate electrode sequentially formed on the channel; and a sidewall insulating layer formed on both sidewalls of the gate insulating layer and the gate electrode, wherein an interface between the source/drain and the channel is on a Si (111) in the channel, and the source and drain consists of metal silicide through silicidation with a predetermined metal and forms a Schottky junction with the silicon channel.
摘要翻译： 提供了由于通过各向异性蚀刻形成的Si（111）表面上形成的肖特基结，具有用于电子的肖特基势垒低的高性能n型肖特基势垒隧道晶体管。 肖特基势垒隧道晶体管包括：绝缘体上硅（SOI）衬底; 在SOI衬底上形成的源极和漏极; 在源极和漏极之间形成的沟道; 顺序地形成在沟道上的栅极绝缘层和栅电极; 以及形成在栅极绝缘层和栅极电极的两个侧壁上的侧壁绝缘层，其中源极/漏极和沟道之间的界面在通道中的Si（111）上，并且源极和漏极由金属硅化物 通过与预定金属的硅化，并与硅通道形成肖特基结。
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6.发明申请公开(公告)号：US20070034951A1
公开(公告)日：2007-02-15
申请号：US11485837
申请日：2006-07-13
IPC分类号： H01L27/12 , H01L27/01 , H01L31/0392
CPC分类号： H01L29/47 , H01L29/458 , H01L29/4908 , H01L29/66545 , H01L29/66772 , H01L29/7839
摘要： Provided are a Schottky barrier tunnel transistor and a method of manufacturing the same that are capable of minimizing leakage current caused by damage to a gate sidewall of the Schottky barrier tunnel transistor using a Schottky tunnel barrier naturally formed at a semiconductor-metal junction as a tunnel barrier. The method includes the steps of: forming a semiconductor channel layer on an insulating substrate; forming a dummy gate on the semiconductor channel layer; forming a source and a drain at both sides of the dummy gate on the insulating substrate; removing the dummy gate; forming an insulating layer on a sidewall from which the dummy gate is removed; and forming an actual gate in a space from which the dummy gate is removed. In manufacturing the Schottky barrier tunnel transistor using the dummy gate, it is possible to form a high-k dielectric gate insulating layer and a metal gate, and stable characteristics in silicidation of the metal layer having very strong reactivity can be obtained.
摘要翻译： 提供了一种肖特基势垒隧道晶体管及其制造方法，该晶体管能够使用在半导体 - 金属结上自然形成的肖特基隧道势垒作为隧道来最小化对肖特基势垒隧道晶体管的栅极侧壁的损坏所造成的漏电流 屏障。 该方法包括以下步骤：在绝缘基板上形成半导体沟道层; 在半导体沟道层上形成虚拟栅极; 在绝缘基板上的虚拟栅极的两侧形成源极和漏极; 去除虚拟门; 在去除所述伪栅极的侧壁上形成绝缘层; 并且在从其中去除虚拟栅极的空间中形成实际栅极。 在使用伪栅极制造肖特基势垒隧道晶体管时，可以形成高k电介质栅极绝缘层和金属栅极，并且可以获得具有非常强反应性的金属层的硅化物的稳定特性。
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公开(公告)号：US20070256459A1
公开(公告)日：2007-11-08
申请号：US10556344
申请日：2005-07-08
申请人： Seong No Yoon , Bong Sang Lee , Sung Rak Gong , Bo Yeon Kim , Seong Lee , Dae Hee Kwon
发明人： Seong No Yoon , Bong Sang Lee , Sung Rak Gong , Bo Yeon Kim , Seong Lee , Dae Hee Kwon
IPC分类号： A47H33/00
CPC分类号： D06F37/28
摘要： Disclosed herein is a door for drum type washing machines wherein a decorative band is permanently attached to a door frame by means of improved engagement between the decorative band and the door frame. The door comprises a door frame formed by injection molding, and a decorative band inserted in a mold by an insert injection method when the door frame is formed by injection molding such that the decorative band is attached to the front surface of the door frame.
摘要翻译： 本文公开了一种用于滚筒式洗衣机的门，其中装饰带通过改进的装饰带和门框架之间的接合永久地附接到门框。 该门包括通过注射成型形成的门框，以及当通过注射模制形成门框时，通过插入注射法插入模具中的装饰带，使得装饰带附接到门框的前表面。
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公开(公告)号：US20070046762A1
公开(公告)日：2007-03-01
申请号：US11511153
申请日：2006-08-28
申请人： Tae Min Kang , Jin Kim , Mu Kim , Sun Kim , Noh Kwak , Sang Lee , Seong Lee , Seung Lee , Sok Noh , Jin Seong , Myung Song , Yeun Sung , Byeong Yoo
发明人： Tae Min Kang , Jin Kim , Mu Kim , Sun Kim , Noh Kwak , Sang Lee , Seong Lee , Seung Lee , Sok Noh , Jin Seong , Myung Song , Yeun Sung , Byeong Yoo
IPC分类号： B41J2/38
CPC分类号： B41M5/265 , B41M5/38221 , H01L51/0013
摘要： A laser induced thermal imaging (LITI) apparatus and a method of making an electronic device using the same are disclosed. The LITI apparatus includes a chamber, a substrate support, a contact frame, and a laser source or oscillator. The LITI apparatus transfers a transferable layer from a film donor device onto a surface of an intermediate electronic device. The LITI apparatus uses a magnetic force to provide a close contact between the transferable layer and the surface of the intermediate device. The magnetic force is generated by magnetic materials formed in two components of the LITI apparatus that are spaced apart interposing transferable layer and the surface of the intermediate device. Magnets or magnetic materials are formed in the two following components of the LITI apparatus: 1) the intermediate device and the film donor device; 2) the intermediate device and the contact frame; 3) the substrate support and the film donor device; or 4) the substrate support and the contact frame.
摘要翻译： 公开了一种激光诱导热成像（LITI）装置和使用其的电子装置的制造方法。 LITI装置包括腔室，衬底支撑件，接触框架和激光源或振荡器。 LITI装置将可转移层从成膜剂装置转移到中间电子装置的表面上。 LITI装置使用磁力来提供可转移层与中间装置的表面之间的紧密接触。 磁力由形成在LITI装置的两个部件中的磁性材料产生，该两个部件是间隔开的中间转印层和中间装置的表面。 在LITI装置的以下两个部件中形成磁体或磁性材料：1）中间装置和薄膜供体装置; 2）中间装置和接触框架; 3）基底支撑体和薄膜供体装置; 或4）衬底支撑件和接触框架。
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公开(公告)号：US20060229461A1
公开(公告)日：2006-10-12
申请号：US11388416
申请日：2006-03-24
申请人： Soon-Kee Sung , Jung Yi , Seong Lee
发明人： Soon-Kee Sung , Jung Yi , Seong Lee
IPC分类号： C07C51/43
摘要： Disclosed relates to a method for preparing unsaturated fatty acids and, more particularly, to a method for preparing unsaturated fatty acids in a high purity of at least 99% by isolating and purifying unsaturated fatty acids via a secondary nucleation mechanism using fatty acid-urea inclusion compounds.
摘要翻译： 本发明涉及一种制备不饱和脂肪酸的方法，更具体地说，涉及通过使用脂肪酸 - 脲包合物通过二次成核机理分离和纯化不饱和脂肪酸，制备高纯度至少99％的不饱和脂肪酸的方法 化合物。
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公开(公告)号：US20060013183A1
公开(公告)日：2006-01-19
申请号：US11124295
申请日：2005-05-09
IPC分类号： H04J1/00
CPC分类号： H04B7/15564
摘要： Embodies of peripheral a wireless relay system apparatus and method for a multi-path interference removing using by same channel frequency is shown and described, which purpose of the present invention is to overcome extension of service coverage and a dead spot with amplifying same channel frequency, a problem in doing the relay, system wireless relay system was a same frequency interference of RF (Radio Frequency) output is become feedback radiating from tx antenna to rx antenna of the relay system, the wireless relay system apparatus and method effectively eliminates the same frequency interference so that it can ensure an additional system gain and easy to set up relatively to general same frequency relay system.
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