公开(公告)号：US20150318228A1

公开(公告)日：2015-11-05

申请号：US14797752

申请日：2015-07-13

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi Ito

IPC: H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L21/48 ,  H01L25/065 ,  H01L23/29 ,  H01L21/56

CPC classification number: H01L23/3114 ,  H01L21/4803 ,  H01L21/563 ,  H01L21/565 ,  H01L23/295 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/3737 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0655 ,  H01L25/16 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2224/2929 ,  H01L2224/29386 ,  H01L2224/29387 ,  H01L2224/29393 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/81815 ,  H01L2224/83001 ,  H01L2224/92125 ,  H01L2924/01006 ,  H01L2924/05032 ,  H01L2924/05042 ,  H01L2924/05432 ,  H01L2924/05442 ,  H01L2924/06 ,  H01L2924/066 ,  H01L2924/0665 ,  H01L2924/07025 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2924/014

Abstract: The present disclosure is intended to provide a module in which connection reliability between a wiring substrate and an electronic component mounted on the wiring substrate can be improved. A module 1 includes a wiring substrate, an electronic component that is mounted on one principal surface of the wiring substrate, an underfill resin layer that is formed all over the one principal surface of the wiring substrate, and that is formed to fill up a gap between the one principal surface of the wiring substrate and the electronic component, and a molded resin layer that is formed to cover the underfill resin layer and the electronic component, wherein the underfill resin layer is formed of a resin containing a filler having a particle diameter that is smaller than a spacing between the one principal surface of the wiring substrate and the electronic component.

Abstract translation: 本公开旨在提供一种模块，其中可以提高布线基板和安装在布线基板上的电子部件之间的连接可靠性。 模块1包括布线基板，安装在布线基板的一个主表面上的电子部件，形成在布线基板的整个主表面上的底部填充树脂层，并且形成为填充间隙 在布线基板的一个主面和电子部件之间，形成有用于覆盖底部填充树脂层和电子部件的成型树脂层，其中，底部填充树脂层由含有粒径的填料的树脂形成 小于布线基板的一个主表面和电子部件之间的间隔。

公开(公告)号：US20150173185A1

公开(公告)日：2015-06-18

申请号：US14635429

申请日：2015-03-02

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi Ito ,  Yoichi Moriya ,  Tetsuo Kanamori ,  Yukihiro Yagi ,  Yuki Yamamoto

IPC: H05K1/02 ,  H05K3/46 ,  H05K3/06 ,  H05K1/11

CPC classification number: H05K1/0298 ,  H05K1/115 ,  H05K3/06 ,  H05K3/38 ,  H05K3/4038 ,  H05K3/4661 ,  H05K2201/0338 ,  H05K2201/0355 ,  H05K2201/09563 ,  H05K2203/0369 ,  H05K2203/0554 ,  H05K2203/063 ,  H05K2203/1105 ,  H05K2203/1461

Abstract: A circuit board structure and a manufacturing method for a circuit board that ensures an electrical connection between a metal foil and a projection without using a conductive adhesive and is less likely to cause a decrease in the reliability of the connection due to the interlayer separation or the like is provided. A circuit board includes an insulating layer, a lower main surface wiring pattern and an upper main surface wiring pattern disposed on either side of the insulating layer, and an interlayer connection conductor passing through the insulating layer in a thickness direction and electrically connecting to the lower main surface wiring pattern and the upper main surface wiring pattern. The interlayer connection conductor is formed integrally with the lower main surface wiring pattern, and is bonded to the upper main surface wiring pattern via an intermetallic compound.

Abstract translation: 一种用于电路板的电路板结构和制造方法，其确保金属箔和突起之间的电连接而不使用导电粘合剂，并且不太可能导致由于层间隔离引起的连接的可靠性降低 喜欢被提供。 电路板包括绝缘层，下主表面布线图案和布置在绝缘层两侧的上主表面布线图案，以及层间连接导体，其沿​​厚度方向穿过绝缘层并电连接到下层 主表面布线图案和上表面布线图案。 层间连接导体与下主表面布线图形一体地形成，并且通过金属间化合物结合到上主表面布线图案。