SEMICONDUCTOR THERMOELECTRIC MODULE CHARGER FOR MOBILE COMPUTING DEVICE
    1.
    发明申请
    SEMICONDUCTOR THERMOELECTRIC MODULE CHARGER FOR MOBILE COMPUTING DEVICE 审中-公开
    用于移动计算设备的半导体热电模块充电器

    公开(公告)号:US20140176041A1

    公开(公告)日:2014-06-26

    申请号:US13722387

    申请日:2012-12-20

    发明人: Xiang Sun

    IPC分类号: H02J7/00

    摘要: A system and method for recycling the electrical energy that has been consumed and converted into unwanted thermal energy. A power source for supplying power to a mobile computing system comprises a rechargeable battery and a semiconductor thermoelectric module coupled to the rechargeable battery and a charring circuit. The thermoelectric module is disposed proximate to a heat generating member of the computing system and operable to sense the thermal energy released by the member and convert it into electrical energy based on Seeback effect. The converted electrical energy can be regulated and stored in the rechargeable battery.

    摘要翻译: 一种用于回收已经消耗并转换成不想要的热能的电能的系统和方法。 用于向移动计算系统供电的电源包括可再充电电池和耦合到可再充电电池和烧焦电路的半导体热电模块。 热电模块靠近计算系统的发热构件设置,并且可操作以感测由构件释放的热能并基于回复效应将其转换为电能。 转换的电能可以被调节并存储在可充电电池中。

    Blower design for a graphics processing unit

    公开(公告)号:US12022633B2

    公开(公告)日:2024-06-25

    申请号:US17011437

    申请日:2020-09-03

    IPC分类号: H05K7/20 G06F1/20

    摘要: A graphics subsystem includes a printed circuit board (PCB), a blower, and a heat sink. A graphics processing unit (GPU) is integrated into the PCB. The PCB is shortened to occupy a portion of the width of the graphics subsystem. The heat sink is coupled to the PCB and/or GPU similarly occupies just a portion of the width of the graphics subsystem. The blower is disposed adjacent to the PCB and heat sink and configured to occupy the full height of the graphics subsystem. The blower is further configured to intake air from both the top side of the graphics subsystem and the bottom side of the graphics subsystem. In this configuration, the blower provides an elevated air flow rate in order to facilitate cooling of the PCB and/or GPU.

    METHOD AND SYSTEM FOR TESTING A MEMORY
    3.
    发明申请
    METHOD AND SYSTEM FOR TESTING A MEMORY 有权
    用于测试存储器的方法和系统

    公开(公告)号:US20150058678A1

    公开(公告)日:2015-02-26

    申请号:US14066602

    申请日:2013-10-29

    IPC分类号: G06F11/22

    CPC分类号: G11C29/08 G11C29/10

    摘要: A method and system for testing a memory is provided in the present invention. The method includes the following steps. Each of at least one address bit to be tested of the memory is set to a fixed value. Current test data is written into memory unit(s) of the memory which the set address bit(s) correspond(s) to. Current read back data is read from the memory unit(s) which the set address bit(s) correspond(s) to. The current test data is compared with the current read back data. It is judged whether there is any signal integrity problem in unset address bit(s) of the memory according to the comparison result of the current test data and the current read back data, in order to determine fault address bit(s). The method and system for testing a memory provided by the present invention may determine fault address bit(s) of the memory simply and quickly.

    摘要翻译: 本发明提供了一种用于测试存储器的方法和系统。 该方法包括以下步骤。 将要测试的存储器的至少一个地址位中的每一个被设置为固定值。 当前的测试数据被写入存储器的存储器单元中,该存储器单元与设置的地址位相对应。 从设置的地址位对应的存储器单元读取当前的读回数据。 将当前的测试数据与当前的回读数据进行比较。 根据当前测试数据和当前读回数据的比较结果,判断存储器的未设定地址位是否存在任何信号完整性问题,以便确定故障地址位。 用于测试由本发明提供的存储器的方法和系统可以简单且快速地确定存储器的故障地址位。

    CIRCUIT BOARD AND POWER SOURCE MANAGEMENT SYSTEM OF CIRCUIT BOARD
    4.
    发明申请
    CIRCUIT BOARD AND POWER SOURCE MANAGEMENT SYSTEM OF CIRCUIT BOARD 有权
    电路板电路板和电源管理系统

    公开(公告)号:US20140132235A1

    公开(公告)日:2014-05-15

    申请号:US13791099

    申请日:2013-03-08

    IPC分类号: G05F1/46 G05F1/575

    摘要: A power source management system of a circuit board that comprises: a processor, comprising a core voltage input terminal; and a core voltage feedback terminal; and a voltage regulating member, comprising a setting terminal with a fixed reference voltage provided thereto; a detecting terminal connected to the core voltage feedback terminal to detect a feedback core voltage from the core voltage feedback terminal; and a core voltage output terminal connected to the core voltage input terminal to provide a core voltage thereto, wherein the core voltage is regulated by the voltage regulating member based on the feedback core voltage, such that the feedback core voltage is equal to the fixed reference voltage, wherein an offset voltage equal to a difference between a desired core voltage of the processor and the fixed reference voltage is provided between the core voltage input terminal and the core voltage feedback terminal by the processor.

    摘要翻译: 一种电路板的电源管理系统,包括:处理器,包括核心电压输入端; 和核心电压反馈端子; 以及电压调节构件,包括具有固定参考电压的设定端子; 检测端子,连接到核心电压反馈端子,以检测来自核心电压反馈端子的反馈核心电压; 以及与核心电压输入端子连接以提供核心电压的核心电压输出端子,其中,基于反馈核心电压,电压调节部件对核心电压进行调节,使得反馈核心电压等于固定参考值 电压,其中由所述处理器在所述核心电压输入端子和所述核心电压反馈端子之间提供等于所述处理器的期望核心电压与所述固定参考电压之间的差的偏移电压。

    Circuit board and power source management system of circuit board
    5.
    发明授权
    Circuit board and power source management system of circuit board 有权
    电路板电路板和电源管理系统

    公开(公告)号:US09436243B2

    公开(公告)日:2016-09-06

    申请号:US13791099

    申请日:2013-03-08

    摘要: A power source management system of a circuit board that comprises: a processor, comprising a core voltage input terminal; and a core voltage feedback terminal; and a voltage regulating member, comprising a setting terminal with a fixed reference voltage provided thereto; a detecting terminal connected to the core voltage feedback terminal to detect a feedback core voltage from the core voltage feedback terminal; and a core voltage output terminal connected to the core voltage input terminal to provide a core voltage thereto, wherein the core voltage is regulated by the voltage regulating member based on the feedback core voltage, such that the feedback core voltage is equal to the fixed reference voltage, wherein an offset voltage equal to a difference between a desired core voltage of the processor and the fixed reference voltage is provided between the core voltage input terminal and the core voltage feedback terminal by the processor.

    摘要翻译: 一种电路板的电源管理系统,包括:处理器,包括核心电压输入端; 和核心电压反馈端子; 以及电压调节构件,包括具有固定参考电压的设定端子; 检测端子,连接到核心电压反馈端子,以检测来自核心电压反馈端子的反馈核心电压; 以及与核心电压输入端子连接以提供核心电压的核心电压输出端子,其中,基于反馈核心电压,电压调节部件对核心电压进行调节,使得反馈核心电压等于固定基准电压 电压,其中由所述处理器在所述核心电压输入端子和所述核心电压反馈端子之间提供等于所述处理器的期望核心电压与所述固定参考电压之间的差的偏移电压。

    Method and system for testing a memory
    6.
    发明授权
    Method and system for testing a memory 有权
    用于测试内存的方法和系统

    公开(公告)号:US09373416B2

    公开(公告)日:2016-06-21

    申请号:US14066602

    申请日:2013-10-29

    CPC分类号: G11C29/08 G11C29/10

    摘要: A method and system for testing a memory is provided in the present invention. The method includes the following steps. Each of at least one address bit to be tested of the memory is set to a fixed value. Current test data is written into memory unit(s) of the memory which the set address bit(s) correspond(s) to. Current read back data is read from the memory unit(s) which the set address bit(s) correspond(s) to. The current test data is compared with the current read back data. It is judged whether there is any signal integrity problem in unset address bit(s) of the memory according to the comparison result of the current test data and the current read back data, in order to determine fault address bit(s). The method and system for testing a memory provided by the present invention may determine fault address bit(s) of the memory simply and quickly.

    摘要翻译: 本发明提供了一种用于测试存储器的方法和系统。 该方法包括以下步骤。 将要测试的存储器的至少一个地址位中的每一个被设置为固定值。 当前的测试数据被写入存储器的存储器单元中,该存储器单元与设置的地址位相对应。 从设置的地址位对应的存储器单元读取当前的读回数据。 将当前的测试数据与当前的回读数据进行比较。 根据当前测试数据和当前读回数据的比较结果,判断存储器的未设定地址位是否存在任何信号完整性问题,以便确定故障地址位。 用于测试由本发明提供的存储器的方法和系统可以简单且快速地确定存储器的故障地址位。

    Blow-through axial fan for a graphics processing unit

    公开(公告)号:US11681340B2

    公开(公告)日:2023-06-20

    申请号:US17121565

    申请日:2020-12-14

    IPC分类号: G06F1/20 H05K7/20

    摘要: A graphics subsystem includes a printed circuit board (PCB), a set of one or more fans, and a heat sink. A graphics processing unit (GPU) is integrated into the PCB. The PCB is shortened to occupy a portion of the width of the graphics subsystem. The heat sink is coupled to the PCB and/or GPU and configured to extend beyond an edge of the PCB, thereby occupying a larger portion of the width of the graphics subsystem compared to the PCB. A first fan is disposed partially or fully beyond the edge of the PCB and is configured to direct air through the portion of the heat sink that extends beyond the edge of the PCB, along a first airflow path, and out of the graphics subsystem. A second fan is configured to direct air through the heat sink, along a second airflow path, towards the GPU.