公开(公告)号：US08981442B2

公开(公告)日：2015-03-17

申请号：US14108106

申请日：2013-12-16

Applicant: NXP B.V.

Inventor： Victor Zieren ,  Anco Heringa ,  Olaf Wunnicke ,  Jan Slotboom ,  Robert Hendrikus Margaretha van Veldhoven ,  Jan Claes

IPC: H01L29/82 ,  H01L43/02 ,  G01R33/06 ,  H01L29/735 ,  H01L29/861

CPC classification number: H01L43/02 ,  G01R33/066 ,  H01L29/735 ,  H01L29/82 ,  H01L29/8611

Abstract: A semiconductor magnetic field sensor comprising a semiconductor well on top of a substrate layer is disclosed. The semiconductor well includes a first current collecting region and a second current collecting region and a current emitting region placed between the first current collecting region and the second current collecting region. The semiconductor well also includes a first MOS structure, having a first gate terminal, located between the first current collecting region and the current emitting region and a second MOS structure, having a second gate terminal, located between the current emitting region and the second current collecting region. In operation, the first gate terminal and the second gate terminal are biased for increasing a deflection length of a first current and of a second current. The deflection length is perpendicular to a plane defined by a surface of the semiconductor magnetic field sensor and parallel to a magnetic field.

Abstract translation: 公开了一种半导体磁场传感器，其包括在衬底层顶部的半导体阱。 半导体阱包括第一集电区域和第二集电区域以及放置在第一集电区域和第二集电区域之间的电流发射区域。 半导体阱还包括第一MOS结构，其具有位于第一集电区和电流发射区之间的第一栅极端子和第二MOS结构，具有位于电流发射区和第二电流之间的第二栅极端 收集区域。 在操作中，第一栅极端子和第二栅极端子被偏置以增加第一电流和第二电流的偏转长度。 偏转长度垂直于由半导体磁场传感器的表面限定并平行于磁场的平面。

公开(公告)号：US20140175528A1

公开(公告)日：2014-06-26

申请号：US14108106

申请日：2013-12-16

Applicant: NXP B.V.

Inventor： Victor Zieren ,  Anco Heringa ,  Olaf Wunnicke ,  Jan Slotboom ,  Robert Hendrikus Margaretha van Veldhoven ,  Jan Claes

IPC: H01L43/02

CPC classification number: H01L43/02 ,  G01R33/066 ,  H01L29/735 ,  H01L29/82 ,  H01L29/8611

Abstract: A semiconductor magnetic field sensor comprising a semiconductor well on top of a substrate layer is disclosed. The semiconductor well includes a first current collecting region and a second current collecting region and a current emitting region placed between the first current collecting region and the second current collecting region. The semiconductor well also includes a first MOS structure, having a first gate terminal, located between the first current collecting region and the current emitting region and a second MOS structure, having a second gate terminal, located between the current emitting region and the second current collecting region. In operation, the first gate terminal and the second gate terminal are biased for increasing a deflection length of a first current and of a second current. The deflection length is perpendicular to a plane defined by a surface of the semiconductor magnetic field sensor and parallel to a magnetic field.

Abstract translation: 公开了一种半导体磁场传感器，其包括在衬底层顶部的半导体阱。 半导体阱包括第一集电区域和第二集电区域以及放置在第一集电区域和第二集电区域之间的电流发射区域。 半导体阱还包括第一MOS结构，其具有位于第一集电区和电流发射区之间的第一栅极端子和第二MOS结构，具有位于电流发射区和第二电流之间的第二栅极端 收集区域。 在操作中，第一栅极端子和第二栅极端子被偏置以增加第一电流和第二电流的偏转长度。 偏转长度垂直于由半导体磁场传感器的表面限定并平行于磁场的平面。

公开(公告)号：US20140347135A1

公开(公告)日：2014-11-27

申请号：US14284509

申请日：2014-05-22

Applicant: NXP B.V.

Inventor： Viet Thanh Dinh ,  Godefridus Adrianus Maria Hurxk ,  Tony Vanhoucke ,  Jan Slotboom ,  Anco Heringa ,  Ivan Zahariev ,  Evelyne Gridelet

IPC: H03K17/10 ,  H03F3/21 ,  H03F3/19 ,  H01L29/737 ,  H01L29/165

CPC classification number: H03K17/10 ,  G05F1/462 ,  H01L29/165 ,  H01L29/402 ,  H01L29/7327 ,  H01L29/737 ,  H03F1/34 ,  H03F3/19 ,  H03F3/21 ,  H03F2200/153

Abstract: The invention provides a bipolar transistor circuit and a method of controlling a bipolar transistor, in which the bipolar transistor has a gate terminal for controlling the electric field in a collector region of the transistor. The bias voltage applied to the gate terminal is controlled to achieve different transistor characteristics.

Abstract translation: 本发明提供了一种双极晶体管电路和双极晶体管的控制方法，其中双极晶体管具有用于控制晶体管的集电极区域中的电场的栅极端子。 施加到栅极端子的偏置电压被控制以实现不同的晶体管特性。