公开(公告)号：US20130320551A1

公开(公告)日：2013-12-05

申请号：US13890055

申请日：2013-05-08

Applicant: NXP B.V.

Inventor： Tim BOETTCHER ,  Sven WALCZYK ,  Roelf Anco Jacob GROENHUIS ,  Rolf BRENNER ,  Emiel DE BRUIN

IPC: H01L23/00

CPC classification number: H01L21/78 ,  H01L21/56 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/04105 ,  H01L2224/05016 ,  H01L2224/05088 ,  H01L2224/051 ,  H01L2224/05111 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05582 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/06181 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/20 ,  H01L2224/291 ,  H01L2224/32105 ,  H01L2224/32113 ,  H01L2224/32237 ,  H01L2224/33181 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2225/06513 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/12036 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/03 ,  H01L2224/81 ,  H01L2224/05552

Abstract: Disclosed is a discrete semiconductor device package (100) comprising a semiconductor die (110) having a first surface and a second surface opposite said first surface carrying a contact (112); a conductive body (120) on said contact; an encapsulation material (130) laterally encapsulating said conductive body; and a capping member (140, 610) such as a solder cap, a further semiconductor die or a combination thereof in conductive contact with the solder portion, said solder cap extending over the encapsulation material. A further solder cap (150) may be provided over the first surface. A method of manufacturing such a discrete semiconductor device package is also disclosed.

公开(公告)号：US20130334695A1

公开(公告)日：2013-12-19

申请号：US13910816

申请日：2013-06-05

Applicant: NXP B.V.

Inventor： Edwin TIJSSEN ,  Sven WALCZYK ,  Roelf Anco Jacob GROENHUIS ,  Rüdiger WEBER ,  Chee Wee TEE

IPC: H01L23/48 ,  H01L21/50

CPC classification number: H01L23/48 ,  H01L21/50 ,  H01L23/60 ,  H01L23/62 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L29/36 ,  H01L29/402 ,  H01L29/8611 ,  H01L2224/04026 ,  H01L2224/05599 ,  H01L2224/26145 ,  H01L2224/27013 ,  H01L2224/29116 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/37147 ,  H01L2224/4007 ,  H01L2224/40095 ,  H01L2224/40247 ,  H01L2224/73263 ,  H01L2224/83051 ,  H01L2224/8384 ,  H01L2224/84801 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/07811 ,  H01L2924/10253 ,  H01L2924/1203 ,  H01L2924/1301 ,  H01L2924/1304 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: The invention relates to an electronic device (200) for protection against transient voltages in high-power applications. The electronic device (200) comprises: i) a semiconductor substrate (220) comprising an active element (Dd) having at least two terminals (T1, T2); ii) a conductive pad (225) provided on said substrate (220) and being electrically coupled to one of said terminals (T1, T2); iii) electrically-conductive solder material (226) provided on the conductive pad (225); iv) a first conductive part (230) electrically coupled to the conductive pad (225) via the electrically-conductive interconnect material (226). The electronic device further comprises a wall (229) being provided along the periphery of the conductive pad (225) for forming a lateral confinement of the interconnect material (226) on the conductive pad (225). The invention further relates to a method of manufacturing such electronic device. The proposed invention offers a solution for two problems: a) limited interconnect coverage when using lead-solder (due to the solder limitation), and b) the limitations when using lead-free materials (due to the government restrictions).

Abstract translation: 本发明涉及一种用于在大功率应用中防止瞬态电压的电子设备（200）。 电子设备（200）包括：i）包括具有至少两个端子（T1，T2）的有源元件（Dd）的半导体衬底（220）; ii）设置在所述衬底（220）上并且电耦合到所述端子（T1，T2）中的一个的导电焊盘（225）; iii）设置在导电焊盘（225）上的导电焊料材料（226）; iv）经由导电互连材料（226）电耦合到导电焊盘（225）的第一导电部件（230）。 电子设备还包括沿着导电焊盘（225）的周边设置的壁（229），用于在导电焊盘（225）上形成互连材料（226）的侧向约束。 本发明还涉及制造这种电子设备的方法。 所提出的发明提供了两个问题的解决方案：a）当使用铅焊料（由于焊料限制））时有限的互连覆盖，以及b）当使用无铅材料（由于政府限制））时的限制。

公开(公告)号：US20150140739A1

公开(公告)日：2015-05-21

申请号：US14607587

申请日：2015-01-28

Applicant: NXP B.V.

Inventor： Tim BOETTCHER ,  Sven WALCZYK ,  Roelf Anco Jacob GROENHUIS ,  Rolf BRENNER ,  Emiel DE BRUIN

IPC: H01L21/78 ,  H01L21/56

CPC classification number: H01L21/78 ,  H01L21/56 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/04105 ,  H01L2224/05016 ,  H01L2224/05088 ,  H01L2224/051 ,  H01L2224/05111 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05582 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/06181 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/20 ,  H01L2224/291 ,  H01L2224/32105 ,  H01L2224/32113 ,  H01L2224/32237 ,  H01L2224/33181 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2225/06513 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/12036 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/03 ,  H01L2224/81 ,  H01L2224/05552

Abstract: Disclosed is a discrete semiconductor device package (100) comprising a semiconductor die (110) having a first surface and a second surface opposite said first surface carrying a contact (112); a conductive body (120) on said contact; an encapsulation material (130) laterally encapsulating said conductive body; and a capping member (140, 610) such as a solder cap, a further semiconductor die or a combination thereof in conductive contact with the solder portion, said solder cap extending over the encapsulation material. A further solder cap (150) may be provided over the first surface. A method of manufacturing such a discrete semiconductor device package is also disclosed.

Abstract translation: 公开了一种分立半导体器件封装（100），包括半导体管芯（110），其具有第一表面和与所述第一表面相对的第二表面，所述第二表面承载触点（112）; 所述接触件上的导电体（120）; 横向封装所述导电体的封装材料（130） 以及与焊料帽导电接触的诸如焊料帽，另外的半导体管芯或其组合的封盖构件（140,610），所述焊帽覆盖在封装材料上。 可以在第一表面上设置另外的焊锡帽（150）。 还公开了制造这种分立半导体器件封装的方法。