公开(公告)号：US10446694B2

公开(公告)日：2019-10-15

申请号：US15620846

申请日：2017-06-13

Applicant: National Applied Research Laboratories

Inventor： Kai-Shin Li ,  Bo-Wei Wu ,  Min-Cheng Chen ,  Jia-Min Shieh ,  Wen-Kuan Yeh

IPC: H01L29/786 ,  H01L29/08 ,  H01L29/06 ,  H01L29/24 ,  H01L29/78 ,  H01L29/66 ,  H01L21/02 ,  H01L29/423 ,  H01L29/778 ,  H01L29/10

Abstract: A field-effect transistor structure having two-dimensional transition metal dichalcogenides includes a substrate, a source/drain structure, a two-dimensional (2D) channel layer, and a gate layer. The source/drain structure is disposed on the substrate and has a surface higher than a surface of the substrate. The 2D channel layer is disposed on the source and the drain and covers the space between the source and the drain. The gate layer is disposed between the source and the drain and covers the 2D channel layer. The field-effect transistor having two-dimensional transition metal dichalcogenides is a planar field-effect transistor or a fin field-effect transistor.

公开(公告)号：US10134735B2

公开(公告)日：2018-11-20

申请号：US15632391

申请日：2017-06-26

Applicant: National Applied Research Laboratories ,  EPISTAR Corporation

Inventor： Shih-Pang Chang ,  Guang-Li Luo ,  Szu-Hung Chen ,  Wen-Kuan Yeh ,  Jen-Inn Chyi ,  Meng-Yang Chen ,  Rong-Ren Lee ,  Shih-Chang Lee ,  Ta-Cheng Hsu

IPC: H01L27/092 ,  H01L29/20 ,  H01L29/16 ,  H01L21/8238

Abstract: A heterogeneously integrated semiconductor devices includes a base substrate; a Ge-containing film formed on the base substrate; a PMOSFET transistor having a first fin formed on the Ge-containing film; and a NMOSFET transistor having a second fin formed on the Ge-containing film; wherein the PMOSFET transistor and the NMOSFET transistor compose a CMOS transistor, and the first fin comprises Ge-containing material and the second fin comprises a Group III-V compound.

公开(公告)号：US20180358474A1

公开(公告)日：2018-12-13

申请号：US15620846

申请日：2017-06-13

Applicant: National Applied Research Laboratories

Inventor： Kai-Shin Li ,  Bo-Wei Wu ,  Min-Cheng Chen ,  Jia-Min Shieh ,  Wen-Kuan Yeh

IPC: H01L29/786 ,  H01L29/08 ,  H01L29/06 ,  H01L29/24 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L29/78696 ,  H01L21/02697 ,  H01L29/0657 ,  H01L29/0688 ,  H01L29/0847 ,  H01L29/1037 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/66969 ,  H01L29/778 ,  H01L29/785 ,  H01L29/78603 ,  H01L29/78618

Abstract: A field-effect transistor structure having two-dimensional transition metal dichalcogenides includes a substrate, a source/drain structure, a two-dimensional (2D) channel layer, and a gate layer. The source/drain structure is disposed on the substrate and has a surface higher than a surface of the substrate. The 2D channel layer is disposed on the source and the drain and covers the space between the source and the drain. The gate layer is disposed between the source and the drain and covers the 2D channel layer. The field-effect transistor having two-dimensional transition metal dichalcogenides is a planar field-effect transistor or a fin field-effect transistor.

公开(公告)号：US20170373064A1

公开(公告)日：2017-12-28

申请号：US15632391

申请日：2017-06-26

Applicant: National Applied Research Laboratories ,  EPISTAR Corporation

Inventor： Shih-Pang Chang ,  Guang-Li Luo ,  Szu-Hung Chen ,  Wen-Kuan Yeh ,  Jen-Inn Chyi ,  Meng-Yang Chen ,  Rong-Ren Lee ,  Shih-Chang Lee ,  Ta-Cheng Hsu

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/16 ,  H01L29/20

CPC classification number: H01L27/0924 ,  H01L21/823821 ,  H01L29/16 ,  H01L29/161 ,  H01L29/20 ,  H01L29/66795 ,  H01L29/7853

Abstract: A heterogeneously integrated semiconductor devices includes a base substrate; a Ge-containing film formed on the base substrate; a PMOSFET transistor having a first fin formed on the Ge-containing film; and a NMOSFET transistor having a second fin formed on the Ge-containing film; wherein the PMOSFET transistor and the NMOSFET transistor compose a CMOS transistor, and the first fin comprises Ge-containing material and the second fin comprises a Group III-V compound.

公开(公告)号：US20160154128A1

公开(公告)日：2016-06-02

申请号：US14876812

申请日：2015-10-06

Applicant: National Applied Research Laboratories

Inventor： Yung-Bin Lin ,  Yu-Sheng Lai ,  Meng-Huang Gu ,  Ho-Min Chang ,  Kuo-Chun Chang ,  Yuan-Chen Liao ,  Yung-Kang Wang ,  Mei-Yi Li ,  Cheng-San Wu ,  Wen-Kuan Yeh

IPC: G01V1/30 ,  G01V1/18 ,  G01V1/16

CPC classification number: G01V1/18 ,  G01H1/00 ,  G01V1/166

Abstract: An environment monitoring system is utilized for monitoring an environmental variation status of a riverbed, a lake floor, or a seabed. The environment monitor system includes a wire drawing device configured at a monitoring point for releasing and tightening a transmission wire; a fixing pipe laid between the monitoring point and a structure layer for containing the transmission wire; a plurality of vibration sensing devices respectively configured on the transmission wire for converting sensed vibration energy to a plurality of electric signals and transmitting the plurality of electric signals by the transmission wire; an analyzing device coupled with the wire drawing device and the transmission wire for obtaining a released length of the transmission wire by the wire drawing device and determining the environmental variation status according to the released length and the plurality of electric signals to perform monitoring.

Abstract translation: 利用环境监测系统监测河床，湖底或海底的环境变化状况。 环境监视器系统包括配置在用于释放和紧固传输线的监控点处的拉丝装置; 位于监测点和用于容纳传输线的结构层之间的固定管; 分别配置在所述传输线上的多个振动感测装置，用于将检测到的振动能量转换为多个电信号，并通过所述传输线传输所述多个电信号; 与拉丝装置和传输线耦合的分析装置，用于通过拉丝装置获得传输线的释放长度，并根据释放的长度和多个电信号确定环境变化状态以进行监视。

公开(公告)号：US20200303377A1

公开(公告)日：2020-09-24

申请号：US16893348

申请日：2020-06-04

Applicant: National Applied Research Laboratories ,  EPISTAR Corporation

Inventor： Shih-Pang Chang ,  Guang-Li Luo ,  Szu-Hung Chen ,  Wen-Kuan Yeh ,  Jen-Inn Chyi ,  Meng-Yang Chen ,  Rong-Ren Lee ,  Shih-Chang Lee ,  Ta-Cheng Hsu

IPC: H01L27/092 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8238 ,  H01L29/16 ,  H01L29/20

Abstract: A method of making a semiconductor device includes: providing a substrate; forming an insulating layer on the substrate; forming a first trench in the insulating layer; forming a first semiconductor layer in the first trench; and removing a portion of the insulating layer to expose the first semiconductor layer.

公开(公告)号：US10217500B1

公开(公告)日：2019-02-26

申请号：US15722118

申请日：2017-10-02

Applicant: NATIONAL APPLIED RESEARCH LABORATORIES

Inventor： Yann-Wen Lan ,  Qiming Shao ,  Guoqiang Yu ,  Kang-Lung Wang ,  Wen-Kuan Yeh

IPC: G11C11/00 ,  G11C11/16 ,  G11C11/14 ,  G11C11/56 ,  C23C16/06 ,  C23C14/34

Abstract: The present invention relates to an inductive spin-orbit torque device and the method for fabricating the same. The method comprises steps of depositing a two-dimensional thin film using chemical vapor deposition (CVD) and sputtering a ferromagnetic material on the thin film. The crystal structure of the two-dimensional thin film includes at least one lattice plane arranged asymmetrically. The thickness of the two-dimensional thin film includes at least one unit-cell layer. The sum of the at least one unit-cell layer is an odd number. By using the vertical magnetic torque generated by the two-dimensional thin film and the miniaturization in thickness, the device size and the fabrication costs may be reduced.

公开(公告)号：US11515307B2

公开(公告)日：2022-11-29

申请号：US16893348

申请日：2020-06-04

Applicant: National Applied Research Laboratories ,  EPISTAR Corporation

Inventor： Shih-Pang Chang ,  Guang-Li Luo ,  Szu-Hung Chen ,  Wen-Kuan Yeh ,  Jen-Inn Chyi ,  Meng-Yang Chen ,  Rong-Ren Lee ,  Shih-Chang Lee ,  Ta-Cheng Hsu

IPC: H01L21/8238 ,  H01L27/092 ,  H01L29/78 ,  H01L29/66 ,  H01L29/16 ,  H01L29/20 ,  H01L29/161

Abstract: A method of making a semiconductor device includes: providing a substrate; forming an insulating layer on the substrate; forming a first trench in the insulating layer; forming a first semiconductor layer in the first trench; and removing a portion of the insulating layer to expose the first semiconductor layer.

公开(公告)号：US10727231B2

公开(公告)日：2020-07-28

申请号：US16159541

申请日：2018-10-12

Applicant: National Applied Research Laboratories ,  EPISTAR Corporation

Inventor： Shih-Pang Chang ,  Guang-Li Luo ,  Szu-Hung Chen ,  Wen-Kuan Yeh ,  Jen-Inn Chyi ,  Meng-Yang Chen ,  Rong-Ren Lee ,  Shih-Chang Lee ,  Ta-Cheng Hsu

IPC: H01L29/16 ,  H01L29/20 ,  H01L29/161 ,  H01L27/092 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8238

Abstract: A heterogeneously integrated semiconductor device includes a substrate comprising a first material; a recess formed within the substrate and having a bottom portion with a first width, a top portion with a second width and a middle portion with a third width larger than the first width and the second width; and a first semiconductor layer filled in the bottom portion and including a second material different from the first material.

公开(公告)号：US20190043862A1

公开(公告)日：2019-02-07

申请号：US16159541

申请日：2018-10-12

Applicant: National Applied Research Laboratories ,  EPISTAR Corporation

Inventor： Shih-Pang Chang ,  Guang-Li Luo ,  Szu-Hung Chen ,  Wen-Kuan Yeh ,  Jen-Inn Chyi ,  Meng-Yang Chen ,  Rong-Ren Lee ,  Shih-Chang Lee ,  Ta-Cheng Hsu

IPC: H01L27/092 ,  H01L29/16 ,  H01L21/8238 ,  H01L29/20 ,  H01L29/161

CPC classification number: H01L27/0924 ,  H01L21/823821 ,  H01L29/16 ,  H01L29/161 ,  H01L29/20 ,  H01L29/66795 ,  H01L29/7853

Abstract: A heterogeneously integrated semiconductor device includes a substrate comprising a first material; a recess formed within the substrate and having a bottom portion with a first width, a top portion with a second width and a middle portion with a third width larger than the first width and the second width; and a first semiconductor layer filled in the bottom portion and including a second material different from the first material.