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105 条记录 (耗时 0.03 秒)

    LIGHT SCAN TYPE TOUCH PANEL
    3.
    发明申请
    LIGHT SCAN TYPE TOUCH PANEL 审中-公开
    光扫类型触控面板

    公开(公告)号：US20120019484A1

    公开(公告)日：2012-01-26

    申请号：US13048686

    申请日：2011-03-15

    申请人： Hyun-Chul Do ,  Im-Su Choi ,  Young-Sun Kim

    发明人： Hyun-Chul Do ,  Im-Su Choi ,  Young-Sun Kim

    IPC分类号： G06F3/042

    CPC分类号： G06F3/0423

    摘要： A light scan type touch panel includes: at least two light scanning units located outside of a display screen at one side; a plurality of light guide units located at other sides of the display screen; and a light receiving unit located at at least one end of each of the plurality of light guide units. Each of the light guide units includes: a light guiding member having a light incidence plane and a light emission plane; a diffusion sheet located at the light incidence plane; a plurality of reflection sheets located at planes of the light guiding member other than the light incidence plane and the light emission plane; and diffuse reflection inducing units located at one side of the light guiding member, facing one of the plurality of reflection sheets.

    摘要翻译： 光扫描型触摸面板包括：位于一侧的显示屏外部的至少两个光扫描单元; 位于显示屏的另一侧的多个导光单元; 以及位于所述多个导光单元中的每一个的至少一端的光接收单元。 每个导光单元包括：具有光入射面和发光面的导光部件; 位于光入射面的扩散片; 位于所述导光部件的除了所述光入射面和所述发光面以外的平面的多个反射片; 以及位于导光构件的一侧的漫反射感应单元，面对多个反射片中的一个。

    ELECTRONIC PEN FOR DETECTING TOUCH LOCATION, CONTROLLING METHOD OF THE SAME, AND DRIVING METHOD OF PLASMA DISPLAY APPARATUS
    4.
    发明申请
    ELECTRONIC PEN FOR DETECTING TOUCH LOCATION, CONTROLLING METHOD OF THE SAME, AND DRIVING METHOD OF PLASMA DISPLAY APPARATUS 审中-公开
    用于检测触摸位置的电子笔，其控制方法和等离子体显示装置的驱动方法

    公开(公告)号：US20110175851A1

    公开(公告)日：2011-07-21

    申请号：US12850069

    申请日：2010-08-04

    申请人： Hyun-Chul Do ,  Im-Su Choi ,  Young-Sun Kim

    发明人： Hyun-Chul Do ,  Im-Su Choi ,  Young-Sun Kim

    IPC分类号： G09G3/28 ,  G06F3/042

    CPC分类号： G06F3/0386

    摘要： An electronic pen for detecting a touch location, a controlling method of the same and a driving method of a plasma display apparatus are disclosed. According to embodiments of the present invention, synchronization between the electronic pen and the plasma display apparatus may be performed. An electronic pen includes a sensor for receiving infrared emissions and for generating a plurality of sensing signals in response to the infrared emissions, a synchronization unit for determining a synchronization timing in accordance with timings of the plurality of sensing signals, and a coordinate detection unit for detecting an emission location of the infrared emissions in accordance with time differences between the synchronization timing and the timings of the plurality of sensing signals.

    摘要翻译： 公开了一种用于检测触摸位置的电子笔，其控制方法和等离子体显示装置的驱动方法。 根据本发明的实施例，可以执行电子笔和等离子体显示装置之间的同步。 电子笔包括用于接收红外发射并响应于红外发射而产生多个感测信号的传感器，用于根据多个感测信号的定时确定同步定时的同步单元，以及用于 根据同步定时与多个感测信号的定时之间的时间差来检测红外发射的发射位置。

    Memory devices comprising nano region embedded dielectric layers
    5.
    发明授权
    Memory devices comprising nano region embedded dielectric layers 失效
    包含纳米区域的介电层的存储器件

    公开(公告)号：US07964908B2

    公开(公告)日：2011-06-21

    申请号：US12111239

    申请日：2008-04-29

    申请人： Sun-Jung Kim ,  Young-Sun Kim ,  Se-Hoon Oh ,  Eun-Ha Lee ,  Young-Su Chung

    发明人： Sun-Jung Kim ,  Young-Sun Kim ,  Se-Hoon Oh ,  Eun-Ha Lee ,  Young-Su Chung

    IPC分类号： H01L29/792

    CPC分类号： H01L29/42332 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/42348 ,  H01L29/513 ,  H01L29/7881 ,  H01L29/792

    摘要： In one aspect, a memory cell includes a plurality of dielectric layers located within a charge storage gate structure. At least one of the dielectric layers includes an dielectric material including oxygen, and nano regions including oxygen embedded in the dielectric material, where an oxygen concentration of the dielectric material is the greater than an oxygen concentration of the nano regions. In another aspect, at least one of the dielectric layers includes a dielectric material and nano regions embedded in the dielectric material, where an atomic composition of the dielectric material is the same as the atomic composition of the nano regions, and a density of the dielectric material is the greater than a density of the nano regions.

    摘要翻译： 在一个方面，存储单元包括位于电荷存储栅极结构内的多个电介质层。 电介质层中的至少一个包括包含氧的介电材料和包含在介电材料中的氧的纳米区域，其中电介质材料的氧浓度大于纳米区域的氧浓度。 另一方面，电介质层中的至少一个包括介电材料和嵌入电介质材料中的纳米区域，其中介电材料的原子组成与纳米区域的原子组成相同，并且电介质的密度 材料大于纳米区域的密度。

    Method of filling a trench and method of forming an isolating layer structure using the same
    6.
    发明授权
    Method of filling a trench and method of forming an isolating layer structure using the same 有权
    填充沟槽的方法和使用其形成隔离层结构的方法

    公开(公告)号：US07858492B2

    公开(公告)日：2010-12-28

    申请号：US12339125

    申请日：2008-12-19

    申请人： Eunkee Hong ,  Kyung-Mun Byun ,  Jong-Wan Choi ,  Eun-Kyung Baek ,  Young-Sun Kim

    发明人： Eunkee Hong ,  Kyung-Mun Byun ,  Jong-Wan Choi ,  Eun-Kyung Baek ,  Young-Sun Kim

    IPC分类号： H01L21/76

    CPC分类号： H01L21/76237 ,  H01L21/76232

    摘要： A method of filling a trench in a substrate ensures that a void or seam is not left in the material occupying the trench. First, a preliminary insulating layer is formed so as to extend contiguously along the bottom and sides of the trench and along an upper surface of the substrate. Impurities are then implanted into a portion of the preliminary insulating layer adjacent the top of the first trench to form a first insulating layer having a doped region and an undoped region. The doped region is removed to form a first insulating layer pattern at the bottom and sides of the first trench, and which first insulating layer pattern defines a second trench. The second trench is then filled with insulating material.

    摘要翻译： 在衬底中填充沟槽的方法确保在占据沟槽的材料中不留下空隙或接缝。 首先，形成预备绝缘层，以沿着沟槽的底部和侧面并且沿衬底的上表面连续延伸。 然后将杂质注入到与第一沟槽的顶部相邻的初级绝缘层的一部分中，以形成具有掺杂区域和未掺杂区域的第一绝缘层。 去除掺杂区域以在第一沟槽的底部和侧面形成第一绝缘层图案，并且该第一绝缘层图案限定第二沟槽。 然后用绝缘材料填充第二沟槽。

    NONVOLATILE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME
    7.
    发明申请
    NONVOLATILE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME 失效
    非易失性存储器件及其制造方法

    公开(公告)号：US20100187595A1

    公开(公告)日：2010-07-29

    申请号：US12694655

    申请日：2010-01-27

    申请人： Sung-Hae Lee ,  Byong-Sun Ju ,  Suk-Jin Chung ,  Young-Sun Kim

    发明人： Sung-Hae Lee ,  Byong-Sun Ju ,  Suk-Jin Chung ,  Young-Sun Kim

    IPC分类号： H01L29/788 ,  H01L21/8247

    CPC分类号： H01L27/11521 ,  H01L21/28273 ,  H01L29/42324

    摘要： Nonvolatile memory devices and related methods of manufacturing the same are provided. A nonvolatile memory device includes a tunneling layer on a substrate, a floating gate on the tunneling layer, an inter-gate dielectric layer structure on the floating gate, and a control gate on the inter-gate dielectric layer structure. The inter-gate dielectric layer structure includes a first silicon oxide layer, a high dielectric layer on the first silicon oxide layer, and a second silicon oxide layer on the high dielectric layer opposite to the first silicon oxide layer The high dielectric layer may include first and second high dielectric layers laminated on each other, and the first high dielectric layer may have a lower density of electron trap sites than the second high dielectric layer and may have a larger energy band gap or conduction band-offset than the second high dielectric layer.

    摘要翻译： 提供了非易失性存储器件及其制造方法。 非易失性存储器件包括衬底上的隧道层，隧道层上的浮动栅极，浮置栅极上的栅极间电介质层结构以及栅极间电介质层结构上的控制栅极。 栅极间电介质层结构包括第一氧化硅层，第一氧化硅层上的高电介质层和与第一氧化硅层相对的高电介质层上的第二氧化硅层。高电介质层可以包括第一氧化硅层 和第二高介电层彼此层叠，并且第一高介电层可以具有比第二高介电层更低的电子陷阱位置密度，并且可以具有比第二高介电层更大的能带隙或导带偏移 。