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    Method for manufacturing a semiconductor component that inhibits formation of wormholes
    3.
    发明授权
    Method for manufacturing a semiconductor component that inhibits formation of wormholes 有权
    制造抑制虫洞形成的半导体部件的方法

    公开(公告)号：US07217660B1

    公开(公告)日：2007-05-15

    申请号：US11109964

    申请日：2005-04-19

    申请人： Connie Pin-Chin Wang ,  Paul R. Besser ,  Jinsong Yin ,  Hieu T. Pham ,  Minh Van Ngo

    发明人： Connie Pin-Chin Wang ,  Paul R. Besser ,  Jinsong Yin ,  Hieu T. Pham ,  Minh Van Ngo

    IPC分类号： H01L21/22

    CPC分类号： H01L29/7833 ,  H01L21/28518 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/76843 ,  H01L21/76846 ,  H01L29/6659

    摘要： A method for manufacturing a semiconductor component that inhibits formation of wormholes in a semiconductor substrate. A contact opening is formed in a dielectric layer disposed on a semiconductor substrate. The contact opening exposes a portion of the semiconductor substrate. A sacrificial layer of oxide is formed on the exposed portion of the semiconductor substrate and along the sidewalls of the contact opening. Silane is reacted with tungsten hexafluoride to form a hydrofluoric acid vapor and tungsten. The hydrofluoric acid vapor etches away the sacrificial oxide layer and a thin layer of tungsten is formed on the exposed portion of the semiconductor substrate. After forming the thin layer of tungsten, the reactants may be changed to more quickly fill the contact opening with tungsten.

    摘要翻译： 一种制造半导体元件的方法，该半导体元件抑制在半导体衬底中形成虫洞。 在设置在半导体衬底上的电介质层中形成接触开口。 接触开口露出半导体衬底的一部分。 在半导体衬底的暴露部分上并沿着接触开口的侧壁形成氧化物牺牲层。 硅烷与六氟化钨反应形成氢氟酸蒸汽和钨。 氢氟酸蒸气蚀刻掉牺牲氧化物层，并且在半导体衬底的暴露部分上形成薄的钨层。 在形成钨的薄层之后，可以改变反应物以更快地用钨填充接触开口。

    Method of forming a contact in a semiconductor device with engineered plasma treatment profile of barrier metal layer
    4.
    发明授权
    Method of forming a contact in a semiconductor device with engineered plasma treatment profile of barrier metal layer 有权
    在具有阻挡金属层的工程等离子体处理轮廓的半导体器件中形成接触的方法

    公开(公告)号：US08039391B1

    公开(公告)日：2011-10-18

    申请号：US11388976

    申请日：2006-03-27

    申请人： Jinsong Yin ,  Wen Yu ,  Connie Pin-Chin Wang ,  Paul Besser ,  Keizaburo Yoshie

    发明人： Jinsong Yin ,  Wen Yu ,  Connie Pin-Chin Wang ,  Paul Besser ,  Keizaburo Yoshie

    IPC分类号： H01L21/44

    CPC分类号： H01L21/28518 ,  H01L21/321 ,  H01L21/76856

    摘要： A method of forming a contact in a semiconductor device provides a titanium contact layer in a contact hole and a MOCVD-TiN barrier metal layer on the titanium contact layer. Impurities are removed from the MOCVD-TiN barrier metal layer by a plasma treatment in a nitrogen-hydrogen plasma. The time period for plasma treating the titanium nitride layer is controlled so that penetration of nitrogen into the underlying titanium contact layer is substantially prevented, preserving the titanium contact layer for subsequently forming a titanium silicide at the bottom of the contact.

    摘要翻译： 在半导体器件中形成接触的方法在接触孔中提供钛接触层和钛接触层上的MOCVD-TiN阻挡金属层。 在氮 - 氢等离子体中通过等离子体处理从MOCVD-TiN阻挡金属层除去杂质。 控制等离子体处理氮化钛层的时间段，以便基本上防止氮渗透到下面的钛接触层中，保留钛接触层以在接触的底部随后形成硅化钛。

    Semiconductor component having a contact structure and method of manufacture
    5.
    发明授权
    Semiconductor component having a contact structure and method of manufacture 有权
    具有接触结构和制造方法的半导体部件

    公开(公告)号：US07407882B1

    公开(公告)日：2008-08-05

    申请号：US10928665

    申请日：2004-08-27

    申请人： Connie Pin-Chin Wang ,  Paul R. Besser ,  Wen Yu ,  Jinsong Yin ,  Keizaburo Yoshie

    发明人： Connie Pin-Chin Wang ,  Paul R. Besser ,  Wen Yu ,  Jinsong Yin ,  Keizaburo Yoshie

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76843 ,  H01L21/28518 ,  H01L21/76814 ,  H01L21/76856

    摘要： A semiconductor component having a titanium silicide contact structure and a method for manufacturing the semiconductor component. A layer of dielectric material is formed over a semiconductor substrate. An opening having sidewalls is formed in the dielectric layer and exposes a portion of the semiconductor substrate. Titanium silicide is disposed on the dielectric layer, sidewalls, and the exposed portion of the semiconductor substrate. The titanium silicide may be formed by disposing titanium on the dielectric layer, sidewalls, and exposed portion of the semiconductor substrate and reacting the titanium with silane. Alternatively, the titanium silicide may be sputter deposited. A layer of titanium nitride is formed on the titanium silicide. A layer of tungsten is formed on the titanium nitride. The tungsten, titanium nitride, and titanium silicide are polished to form the contact structures.

    摘要翻译： 具有硅化钛接触结构的半导体部件和半导体部件的制造方法。 在半导体衬底上形成介电材料层。 在电介质层中形成具有侧壁的开口，并露出半导体衬底的一部分。 钛硅化物设置在电介质层，侧壁和半导体衬底的暴露部分上。 钛硅化物可以通过在电介质层，侧壁和半导体衬底的暴露部分上设置钛并使钛与硅烷反应而形成。 或者，可以溅射沉积钛硅化物。 在硅化钛上形成氮化钛层。 在氮化钛上形成钨层。 将钨，氮化钛和硅化钛抛光以形成接触结构。

    Method for manufacturing a memory device having a nanocrystal charge storage region
    6.
    发明授权
    Method for manufacturing a memory device having a nanocrystal charge storage region 有权
    一种具有纳米晶体电荷存储区域的存储器件的制造方法

    公开(公告)号：US07335594B1

    公开(公告)日：2008-02-26

    申请号：US11116538

    申请日：2005-04-27

    申请人： Connie Pin-Chin Wang ,  Zoran Krivokapic ,  Suzette Keefe Pangrle ,  Jinsong Yin

    发明人： Connie Pin-Chin Wang ,  Zoran Krivokapic ,  Suzette Keefe Pangrle ,  Jinsong Yin

    IPC分类号： H01L21/44

    CPC分类号： H01L21/28273 ,  B82Y10/00 ,  H01L29/42332 ,  H01L29/7881

    摘要： A method for manufacturing a memory device having a metal nanocrystal charge storage structure. A substrate is provided and a first layer of dielectric material is grown on the substrate. An absorption layer is formed on the first layer of dielectric material. The absorption layer includes a plurality of titanium atoms bonded to the first layer of dielectric material, a nitrogen atom bonded to each titanium atom, and at least one ligand bonded to the nitrogen atom. The at least one ligand is removed from the nitrogen atoms to form nucleation centers. A metal such as tungsten is bonded to the nucleation centers to form metallic islands. A dielectric material is formed on the nucleation centers and annealed to form a nanocrystal layer. A control oxide is formed over the nanocrystal layer and a gate electrode is formed on the control oxide.

    摘要翻译： 一种具有金属纳米晶电荷存储结构的存储器件的制造方法。 提供衬底并且在衬底上生长第一介电材料层。 在第一绝缘材料层上形成吸收层。 吸收层包括与第一层电介质材料键合的多个钛原子，与每个钛原子键合的氮原子和至少一个与氮原子结合的配位体。 从氮原子中除去至少一种配体以形成成核中心。 诸如钨的金属结合到成核中心以形成金属岛。 在成核中心形成电介质材料并进行退火以形成纳米晶层。 在纳米晶体层上形成控制氧化物，在控制氧化物上形成栅电极。

    Method of manufacturing semiconductor device comprising silicon-rich tasin metal gate electrode
    8.
    发明授权
    Method of manufacturing semiconductor device comprising silicon-rich tasin metal gate electrode 有权
    一种制造半导体器件的方法，所述半导体器件包括富含硅的金属栅电极

    公开(公告)号：US06861350B1

    公开(公告)日：2005-03-01

    申请号：US10464508

    申请日：2003-06-19

    申请人： Minh Van Ngo ,  Christy Mei-Chu Woo ,  Jinsong Yin ,  James Pan ,  Paul R. Besser

    发明人： Minh Van Ngo ,  Christy Mei-Chu Woo ,  Jinsong Yin ,  James Pan ,  Paul R. Besser

    IPC分类号： H01L21/28 ,  H01L21/336 ,  H01L29/49 ,  H10L21/4763 ,  H10L21/44

    CPC分类号： H01L29/66606 ,  H01L21/28088 ,  H01L29/4966 ,  H01L29/66545

    摘要： Micro-miniaturized semiconductor devices are fabricated with silicon-rich tantalum silicon nitride replacement metal gate electrodes. Embodiments include removing a removable gate, depositing a layer of tantalum nitride, as by PVD at a thickness of 25 Å to 75 Å, and then introducing silicon into the deposited tantalum nitride layer by thermal soaking in silane or silane plasma treatment to form a layer of silicon-rich tantalum silicon nitride. In another embodiment, the intermediate structure is subjected to thermal soaking in silane or silane plasma treatment before and after depositing the tantalum nitride layer. Embodiments further include pretreating the intermediate structure with silane prior to depositing the tantalum nitride layer, treating the deposited tantalum nitride layer with silane, and repeating these steps a number of times to form a plurality of sub-layers of silicon-rich tantalum silicon nitride.

    摘要翻译： 微型半导体器件由富含硅的钽氮化硅替代金属栅电极制成。 实施例包括去除可移除栅极，通过PVD沉积氮化钽层，厚度为25埃，然后通过在硅烷或硅烷等离子体处理中热浸泡形成层，将硅引入沉积的氮化钽层中 的富硅钽硅氮化物。 在另一个实施方案中，在沉积氮化钽层之前和之后，使中间体在硅烷或硅烷等离子体处理中进行热浸。 实施例还包括在沉积氮化钽层之前用硅烷预处理中间结构，用硅烷处理沉积的氮化钽层，并重复这些步骤多次以形成多个富硅钽硅氮化物的子层。

    Engineered metal gate electrode
    9.
    发明授权
    Engineered metal gate electrode 有权
    工程金属栅电极

    公开(公告)号：US07033888B2

    公开(公告)日：2006-04-25

    申请号：US10806117

    申请日：2004-03-23

    申请人： James N. Pan ,  Paul R. Besser ,  Christy Woo ,  Minh Van Ngo ,  Jinsong Yin

    发明人： James N. Pan ,  Paul R. Besser ,  Christy Woo ,  Minh Van Ngo ,  Jinsong Yin

    IPC分类号： H01L21/336

    CPC分类号： H01L29/66545 ,  H01L21/28088 ,  H01L29/4966

    摘要： A metal gate electrode is formed with an intrinsic electric field to modify its work function and the threshold voltage of the transistor. Embodiments include forming an opening in a dielectric layer by removing a removable gate, depositing one or more layers of tantalum nitride such that the nitrogen content increases from the bottom of the layer adjacent the gate dielectric layer upwardly. Other embodiments include forming the intrinsic electric field to control the work function by doping one or more metal layers and forming metal alloys. Embodiments further include the use of barrier layers when forming metal gate electrodes.

    摘要翻译： 形成具有固有电场的金属栅电极，以改变晶体管的功函数和阈值电压。 实施例包括通过去除可移除栅极来形成电介质层中的开口，沉积一层或多层氮化钽，使氮含量从邻近栅介质层的层的底部向上增加。 其他实施例包括通过掺杂一个或多个金属层并形成金属合金来形成本征电场以控制功函数。 实施例还包括在形成金属栅电极时使用阻挡层。

    Method of forming a metal gate structure with tuning of work function by silicon incorporation
    10.
    发明授权
    Method of forming a metal gate structure with tuning of work function by silicon incorporation 有权
    通过硅掺入调整功函数形成金属栅结构的方法

    公开(公告)号：US07071086B2

    公开(公告)日：2006-07-04

    申请号：US10420721

    申请日：2003-04-23

    申请人： Christy Woo ,  Paul Besser ,  Minh van Ngo ,  James Pan ,  Jinsong Yin

    发明人： Christy Woo ,  Paul Besser ,  Minh van Ngo ,  James Pan ,  Jinsong Yin

    IPC分类号： H01L21/3205

    CPC分类号： H01L29/66545 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/3215 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/78

    摘要： A method for forming a semiconductor structure having a metal gate with a controlled work function includes the step of forming a precursor having a substrate with active regions separated by a channel, a temporary gate over the channel and within a dielectric layer. The temporary gate is removed to form a recess with a bottom and sidewalls in the dielectric layer. A non-silicon containing metal layer is deposited in the recess. Silicon is incorporated into the metal layer and a metal is deposited on the metal layer. The incorporation of the silicon is achieved by silane treatments that are performed before, after or both before and after the depositing of the metal layer. The amount of silicon incorporated into the metal layer controls the work function of the metal gate that is formed.

    摘要翻译： 用于形成具有受控功函数的金属栅极的半导体结构的方法包括形成具有基板的前体的步骤，该基板具有被沟道分隔的有源区，在该沟道上的介电层内的临时栅极。 移除临时栅极以形成具有介电层中的底部和侧壁的凹部。 在凹槽中沉积非硅的金属层。 将硅结合到金属层中，并且在金属层上沉积金属。 通过在沉积金属层之前，之后或之后进行的硅烷处理来实现硅的引入。 结合到金属层中的硅的量控制形成的金属栅的功函数。