COPYBACK OPERATIONS
    1.
    发明申请
    COPYBACK OPERATIONS 审中-公开
    COPYBACK操作

    公开(公告)号:US20120110244A1

    公开(公告)日:2012-05-03

    申请号:US13046427

    申请日:2011-03-11

    IPC分类号: G06F12/16 G06F12/00

    摘要: Methods and systems for copyback operations are described. One or more methods include reading data from a first memory unit of a memory device responsive to a copyback command, performing signal processing on the data using a signal processing component local to the memory device, and programming the data to a second memory unit of the memory device.

    摘要翻译: 描述用于回溯操作的方法和系统。 一种或多种方法包括响应于回拷命令从存储器件的第一存储器单元读取数据,使用本地存储器件的信号处理组件对数据执行信号处理,以及将数据编程到第二存储器单元 存储设备。

    Flash memory mass storage architecture incorporating wear leveling
technique without using cam cells
    2.
    发明授权
    Flash memory mass storage architecture incorporating wear leveling technique without using cam cells 失效
    闪存大容量存储体系结合了不使用凸轮单元的磨损均衡技术

    公开(公告)号:US5485595A

    公开(公告)日:1996-01-16

    申请号:US131495

    申请日:1993-10-04

    摘要: A semiconductor mass storage device can be substituted for a rotating hard disk. The device avoid an erase cycle each time information stored in the mass storage is changed. Erase cycles are avoided by programming an altered data file into an empty mass storage block rather than over itself as a hard disk would. Periodically, the mass storage will need to be cleaned up. Secondly, a circuit and method are provided for evenly using all blocks in the mass storage. These advantages are achieved through the use of several flags, a map to correlate a logical address of a block to a physical address of that block and a count register for each block. In particular, flags are provided for defective blocks, used blocks, old versions of a block, a count to determine the number of times a block has been erased and written and an erase inhibit flag. Reading is performed by providing the logical block address to the memory storage. The system sequentially compares the stored logical block addresses until it finds a match. That data file is then coupled to the system.

    摘要翻译: 半导体大容量存储装置可以代替旋转硬盘。 每当存储在大容量存储器中的信息改变时,该设备避免擦除循环。 通过将更改的数据文件编程为空的大容量存储块而不是以硬盘为单位,可以避免擦除周期。 定期地,大容量存储将需要清理。 其次,提供了用于均匀地使用大容量存储器中的所有块的电路和方法。 这些优点通过使用几个标志来实现,地图将块的逻辑地址与该块的物理地址和每个块的计数寄存器相关联。 特别地,为缺陷块,使用块,块的旧版本提供标志,确定块被擦除和写入的次数的计数和擦除禁止标志。 通过向存储器存储器提供逻辑块地址来执行读取。 系统顺序地比较存储的逻辑块地址,直到找到匹配。 然后将该数据文件耦合到系统。

    Memory controllers, memory systems, solid state drives and methods for processing a number of commands
    3.
    发明授权
    Memory controllers, memory systems, solid state drives and methods for processing a number of commands 有权
    存储器控制器,存储器系统,固态驱动器以及用于处理多个命令的方法

    公开(公告)号:US08260973B2

    公开(公告)日:2012-09-04

    申请号:US13242535

    申请日:2011-09-23

    IPC分类号: G06F3/00 G06F13/00

    摘要: The present disclosure includes methods and devices for a memory controller. In one or more embodiments, a memory controller includes a plurality of back end channels, and a command queue communicatively coupled to the plurality of back end channels. The command queue is configured to hold host commands received from a host. Circuitry is configured to generate a number of back end commands at least in response to a number of the host commands in the command queue, and distribute the number of back end commands to a number of the plurality of back end channels.

    摘要翻译: 本公开包括用于存储器控制器的方法和装置。 在一个或多个实施例中,存储器控制器包括多个后端通道,以及通信地耦合到多个后端通道的命令队列。 命令队列配置为保存从主机接收的主机命令。 电路被配置为至少响应于命令队列中的主机命令的数量生成多个后端命令,并且将后端命令的数量分配给多个后端信道的数量。

    MAGNETIC RANDOM ACCESS MEMORY WITH DYNAMIC RANDOM ACCESS MEMORY (DRAM)-LIKE INTERFACE
    7.
    发明申请
    MAGNETIC RANDOM ACCESS MEMORY WITH DYNAMIC RANDOM ACCESS MEMORY (DRAM)-LIKE INTERFACE 有权
    具有动态随机存取存储器(DRAM)的磁性随机存取存储器 - 接口

    公开(公告)号:US20130073791A1

    公开(公告)日:2013-03-21

    申请号:US13303947

    申请日:2011-11-23

    申请人: Siamack Nemazie

    发明人: Siamack Nemazie

    IPC分类号: G06F12/00

    摘要: A memory device includes a magnetic memory unit for storing a burst of data during burst write operations, each burst of data includes, sequential data units with each data unit being received at a clock cycle, and written during a burst write operation, wherein the burst write operation is performed during multiple clock cycles. Further, the memory device includes a mask register coupled to the magnetic memory unit that generates a write mask during the burst write operation to inhibit or enable data units of write data, furthermore the memory device allowing burst write operation to begin while receiving data units of the next burst of data to be written or providing read data.

    摘要翻译: 存储器件包括用于在脉冲串写入操作期间存储数据突发的磁存储器单元,每个突发数据包括在每个数据单元以时钟周期接收的顺序数据单元,并且在突发写入操作期间写入, 写操作在多个时钟周期内执行。 此外,存储器件包括耦合到磁存储器单元的掩模寄存器,其在突发写入操作期间产生写掩码以禁止或启用写数据的数据单元,此外,存储器件允许突发写操作开始同时接收数据单元 要写入或提供读取数据的下一个数据组。

    Determining sector status in a memory device
    8.
    发明授权
    Determining sector status in a memory device 有权
    确定存储设备中的扇区状态

    公开(公告)号:US08276042B2

    公开(公告)日:2012-09-25

    申请号:US12364900

    申请日:2009-02-03

    IPC分类号: G06F11/00

    摘要: The present disclosure includes methods, devices, modules, and systems for operating semiconductor memory. A number of method embodiments include reading data from memory cells corresponding to a sector of data, determining a number of the memory cells in a non-erased state, and, if the number of the memory cells in a non-erased state is less than or equal to a number of errors correctable by an ECC engine, determining the sector is erased.

    摘要翻译: 本公开包括用于操作半导体存储器的方法,设备,模块和系统。 许多方法实施例包括从对应于数据扇区的存储器单元读取数据,确定处于未擦除状态的存储单元的数量,以及如果未擦除状态的存储单元的数量小于 或等于可由ECC引擎校正的错误数量,确定扇区被擦除。

    EMULATION OF STATIC RANDOM ACCESS MEMORY (SRAM) BY MAGNETIC RANDOM ACCESS MEMORY (MRAM)
    10.
    发明申请
    EMULATION OF STATIC RANDOM ACCESS MEMORY (SRAM) BY MAGNETIC RANDOM ACCESS MEMORY (MRAM) 有权
    通过磁性随机存取存储器(MRAM)对静态随机存取存储器(SRAM)进行仿真

    公开(公告)号:US20120182795A1

    公开(公告)日:2012-07-19

    申请号:US13187402

    申请日:2011-07-20

    IPC分类号: G11C11/02

    摘要: A magnetic memory system includes a magnetic random access memory (MRAM) including a plurality of magnetic memory banks and operative to store data during a write operation initiated by a write command. The magnetic memory system further includes a first-in-first-out (FIFO) interface device coupled to the MRAM and including a plurality of FIFOs Each of the magnetic memory banks is coupled to a respective one of the plurality of FIFOs, the FIFO being operative to queue write commands on a per magnetic memory bank basis and further operative to issue the queued write commands at a time when the MRAM is not in use, wherein concurrent write operations are performed to at least two of the plurality of magnetic memory banks.

    摘要翻译: 磁存储器系统包括包括多个磁存储器组的磁随机存取存储器(MRAM),并且可操作以在由写命令发起的写操作期间存储数据。 磁存储器系统还包括耦合到MRAM并且包括多个FIFO的先进先出(FIFO)接口设备。每个磁存储器组耦合到多个FIFO中的相应一个,FIFO是 可操作地在每个磁存储体的基础上排队写入命令,并进一步操作以在不使用MRAM时发出排队的写入命令,其中并行写入操作被执行到多个磁存储器组中的至少两个。