Conditional cell placement
    1.
    发明授权
    Conditional cell placement 有权
    条件细胞放置

    公开(公告)号:US08560997B1

    公开(公告)日:2013-10-15

    申请号:US13557578

    申请日:2012-07-25

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5072

    摘要: Among other things, one or more techniques for conditional cell placement are provided herein. In an embodiment, a conditional boundary is created for a first cell. For example, the conditional boundary enables the first cell to be placed relative to a second cell based on a conditional placement rule. In an embodiment, the first cell is placed in a first manner relative to the second cell based in a first scenario. In a second scenario, different than the first scenario, the first cell is placed in a second manner relative to the second cell. In this manner, conditional cell placement is provided, thus providing flexibility and improved layout efficiency with regard to semiconductor fabrication, for example.

    摘要翻译: 其中还提供了一种或多种用于条件单元放置的技术。 在一个实施例中,为第一小区创建条件边界。 例如,条件边界使得能够基于条件放置规则相对于第二单元放置第一单元。 在一个实施例中,基于第一情况,第一小区相对于第二小区以第一方式放置。 在第二种情况下,与第一种情况不同,第一单元相对于第二单元以第二种方式放置。 以这种方式,提供条件单元布置,从而提供例如关于半导体制造的灵活性和改进的布局效率。

    Power-down circuit with self-biased compensation circuit
    3.
    发明授权
    Power-down circuit with self-biased compensation circuit 有权
    具有自偏置补偿电路的掉电电路

    公开(公告)号:US07760009B2

    公开(公告)日:2010-07-20

    申请号:US12328305

    申请日:2008-12-04

    IPC分类号: H03K3/01

    CPC分类号: H03K19/0013

    摘要: A circuit includes a first power supply node at a first power supply voltage; a gated-node; and a first control device coupled between the first power supply node and the gated-node. The first control device is configured to pass the first power supply voltage to the gated-node or to disconnect the gated-node from the first power supply voltage. A second control device is coupled between the first power supply node and the gated-node. The second control device is configured to pass a gated-voltage to the gated-node or disconnect the gated-node from the gated-voltage. A voltage-drop device is coupled between the first power supply node and the gated-node, wherein the voltage-drop device is serially connected with the second control device. A negative-feedback current source is connected in parallel with the voltage-drop device. The negative-feedback current source is configured to provide a current tracking a variation of the gated-voltage at the gated-node.

    摘要翻译: 电路包括第一电源电压的第一电源节点; 门控节点; 以及耦合在第一电源节点和门控节点之间的第一控制装置。 第一控制装置被配置为将第一电源电压传递到门控节点,或者将门控节点与第一电源电压断开。 第二控制装置耦合在第一电源节点和门控节点之间。 第二控制装置被配置为将门控电压传递到门控节点或将门控节点与门控电压断开。 电压降装置耦合在第一电源节点和门控节点之间,其中降压装置与第二控制装置串联连接。 负反馈电流源与降压装置并联连接。 负反馈电流源被配置为提供电流跟踪门控节点处的门控电压的变化。

    POWER-DOWN CIRCUIT WITH SELF-BIASED COMPENSATION CIRCUIT
    4.
    发明申请
    POWER-DOWN CIRCUIT WITH SELF-BIASED COMPENSATION CIRCUIT 有权
    具有自偏置补偿电路的掉电电路

    公开(公告)号:US20100141330A1

    公开(公告)日:2010-06-10

    申请号:US12328305

    申请日:2008-12-04

    IPC分类号: H03K3/01

    CPC分类号: H03K19/0013

    摘要: A circuit includes a first power supply node at a first power supply voltage; a gated-node; and a first control device coupled between the first power supply node and the gated-node. The first control device is configured to pass the first power supply voltage to the gated-node or to disconnect the gated-node from the first power supply voltage. A second control device is coupled between the first power supply node and the gated-node. The second control device is configured to pass a gated-voltage to the gated-node or disconnect the gated-node from the gated-voltage. A voltage-drop device is coupled between the first power supply node and the gated-node, wherein the voltage-drop device is serially connected with the second control device. A negative-feedback current source is connected in parallel with the voltage-drop device. The negative-feedback current source is configured to provide a current tracking a variation of the gated-voltage at the gated-node.

    摘要翻译: 电路包括第一电源电压的第一电源节点; 门控节点; 以及耦合在第一电源节点和门控节点之间的第一控制装置。 第一控制装置被配置为将第一电源电压传递到门控节点,或者将门控节点与第一电源电压断开。 第二控制装置耦合在第一电源节点和门控节点之间。 第二控制装置被配置为将门控电压传递到门控节点或将门控节点与门控电压断开。 电压降装置耦合在第一电源节点和门控节点之间,其中降压装置与第二控制装置串联连接。 负反馈电流源与降压装置并联连接。 负反馈电流源被配置为提供电流跟踪门控节点处的门控电压的变化。

    DIGITAL LOGIC CIRCUITS HAVING A PULSE WIDTH TIMING CIRCUIT
    7.
    发明申请
    DIGITAL LOGIC CIRCUITS HAVING A PULSE WIDTH TIMING CIRCUIT 审中-公开
    具有脉冲宽度时序电路的数字逻辑电路

    公开(公告)号:US20110080201A1

    公开(公告)日:2011-04-07

    申请号:US12574998

    申请日:2009-10-07

    IPC分类号: H03K5/04

    CPC分类号: H03K7/08

    摘要: A pulse width timing includes a first complementary resistor-capacitor (RC) circuit having an input for receiving an input signal, and a second complementary RC circuit coupled to an output of the first complementary RC circuit, wherein the first and second complementary RC circuits cooperate to produce an output signal based on the input signal, the output signal being delayed and having an adjusted pulse width with respect to the input signal.

    摘要翻译: 脉冲宽度定时包括具有用于接收输入信号的输入的第一互补电阻器 - 电容器(RC)电路和耦合到第一互补RC电路的输出的第二互补RC电路,其中第一和第二互补RC电路配合 为了产生基于输入信号的输出信号,输出信号被延迟并且相对于输入信号具有调整的脉冲宽度。