INVERTED METAMORPHIC MULTIJUNCTION SOLAR CELL WITH TWO METAMORPHIC LAYERS AND HOMOJUNCTION TOP CELL
    1.
    发明申请
    INVERTED METAMORPHIC MULTIJUNCTION SOLAR CELL WITH TWO METAMORPHIC LAYERS AND HOMOJUNCTION TOP CELL 有权
    具有两个金属层和HOMOJUNCTION顶层电池的反相多晶多晶太阳能电池

    公开(公告)号:US20120211068A1

    公开(公告)日:2012-08-23

    申请号:US13401181

    申请日:2012-02-21

    Abstract: A multijunction solar cell including an upper first solar subcell, and the base-emitter junction of the upper first solar subcell being a homojunction; a second solar subcell adjacent to said first solar subcell; a third solar subcell adjacent to said second solar subcell. A first graded interlayer is provided adjacent to said third solar subcell. A fourth solar subcell is provided adjacent to said first graded interlayer, said fourth subcell is lattice mismatched with respect to said third subcell. A second graded interlayer is provided adjacent to said fourth solar subcell; and a lower fifth solar subcell is provided adjacent to said second graded interlayer, said lower fifth subcell is lattice mismatched with respect to said fourth subcell.

    Abstract translation: 一种多结太阳能电池,其包括上部第一太阳能子电池,并且所述上部第一太阳能子电池的基极 - 发射极结为同质结; 与所述第一太阳能子电池相邻的第二太阳能子电池; 与所述第二太阳能子电池相邻的第三太阳能子电池。 与所述第三太阳能子电池相邻地设置有第一梯度中间层。 与所述第一梯度中间层相邻地设置第四太阳能子电池,所述第四子电池相对于所述第三子电池晶格失配。 邻近所述第四太阳能子电池设置第二梯度中间层; 并且与所述第二梯度中间层相邻地设置较低的第五太阳能子电池,所述下部第五子电池相对于所述第四子电池晶格失配。

    RADIATION RESISTANT INVERTED METAMORPHIC MULTIJUNCTION SOLAR CELL
    3.
    发明申请
    RADIATION RESISTANT INVERTED METAMORPHIC MULTIJUNCTION SOLAR CELL 审中-公开
    耐辐射反相元件多功能太阳能电池

    公开(公告)号:US20130327378A1

    公开(公告)日:2013-12-12

    申请号:US13491390

    申请日:2012-06-07

    CPC classification number: H01L31/06875 Y02E10/544

    Abstract: A multijunction solar cell including a first solar subcell having a first band gap and a first short-circuit current; a second solar subcell disposed over the first solar subcell and having a second band gap greater than the first band gap and a second short-circuit current greater than the first short-circuit current by an amount in the range of 2% to 6%; a third solar subcell disposed over the second solar subcell and having a third band gap greater than the second band gap and a third short-circuit current less than the first short-circuit current by an amount in the range of 2% to 6%; and a fourth solar subcell disposed over the third solar subcell having a fourth band gap greater than the third band gap, and a fourth short-circuit current less than the third short-circuit current by an amount in the range of 6% to 10%, so that at an “end of life” state of the multijunction solar cell in an AM0 space environment the short-circuit current of each of the subcells are substantially identical.

    Abstract translation: 一种多结太阳能电池,包括具有第一带隙和第一短路电流的第一太阳能子电池; 第二太阳能子电池,设置在所述第一太阳能子电池上,并且具有大于所述第一带隙的第二带隙和大于所述第一短路电流的第二短路电流,所述第二短路电流的量在2%至6%的范围内; 设置在所述第二太阳能子电池上方的第三太阳能子电池,并且具有大于所述第二带隙的第三带隙和小于所述第一短路电流的第二短路电流,所述第三短路电流的量在2%至6%的范围内; 以及设置在所述第三太阳能子电池上的第四太阳能子电池,其具有大于所述第三带隙的第四带隙,以及小于所述第三短路电流的第四短路电流的范围为6%至10% ,使得在AM0空间环境中的多结太阳能电池的“寿命终止”状态下,每个子电池的短路电流基本相同。

    DIMM riser care with an angled DIMM socket and a straddle mount DIMM socket
    4.
    发明授权
    DIMM riser care with an angled DIMM socket and a straddle mount DIMM socket 有权
    DIMM提升板护理带有倾斜的DIMM插槽和跨骑式DIMM插槽

    公开(公告)号:US08873249B2

    公开(公告)日:2014-10-28

    申请号:US13439221

    申请日:2012-04-04

    CPC classification number: G06F1/185 Y10T29/49147

    Abstract: A DIMM riser card that includes a PCB having a first edge, a second edge, and one or more faces. The first edge of the PCB is configured for insertion into a main board DIMM socket. The first edge includes electrical traces that electrically couple to a memory bus. The DIMM riser card includes an angled DIMM socket mounted on one face of the PCB, where the angled DIMM socket is configured to accept a DIMM at an angle not perpendicular to the PCB and electrically couple the DIMM to the memory bus. The DIMM riser card includes a straddle mount DIMM socket mounted on the second edge of the PCB. The straddle mount DIMM socket is configured to accept a DIMM and electrically couple the DIMM to the memory bus through the electrical traces on the first edge of the PCB.

    Abstract translation: 一种DIMM转接卡,其包括具有第一边缘,第二边缘和一个或多个面部的PCB。 PCB的第一个边缘被配置为插入主板DIMM插槽。 第一个边缘包括电耦合到存储器总线的电迹线。 DIMM转接卡包括安装在PCB的一个面上的倾斜的DIMM插槽,其中倾斜的DIMM插槽被配置为以不垂直于PCB的角度接受DIMM并将DIMM电耦合到存储器总线。 DIMM转接卡包括安装在PCB第二边缘上的跨骑式DIMM插槽。 跨骑式DIMM插槽被配置为接受DIMM并通过PCB第一边缘上的电迹线将DIMM电连接到存储器总线。

    SOLAR CELL INTERCONNECT ASSEMBLY AND METHOD FOR MANUFACTURING THE SAME
    5.
    发明申请
    SOLAR CELL INTERCONNECT ASSEMBLY AND METHOD FOR MANUFACTURING THE SAME 审中-公开
    太阳能电池互连组件及其制造方法

    公开(公告)号:US20140102529A1

    公开(公告)日:2014-04-17

    申请号:US13741070

    申请日:2013-01-14

    CPC classification number: H01L31/02008 H01L31/0512 Y02E10/50

    Abstract: A solar cell interconnect assembly and a method for manufacturing the same are provided. In an embodiment, the method may include: providing a solar cell having an interconnect member formed thereon, the interconnect member comprising a metallic part formed on a surface of the solar cell and a first precursor layer formed over the metallic part; providing an interconnector comprising a second precursor layer at a surface thereof; heating the interconnector and the interconnect member to a temperature equal to or above a eutectic temperature of the materials of the first and second precursor layers and pressing one of them against the other so as to form a eutectic liquid phase; and isothermal solidifying the eutectic liquid to form a bonding layer of eutectic alloy.

    Abstract translation: 提供了一种太阳能电池互连组件及其制造方法。 在一个实施例中,该方法可以包括:提供具有形成在其上的互连构件的太阳能电池,所述互连构件包括形成在太阳能电池的表面上的金属部分和形成在金属部分上的第一前体层; 提供在其表面上包括第二前体层的互连器; 将互连器和互连构件加热到等于或高于第一和第二前体层的材料的共晶温度的温度,并将它们中的一个压在另一个之上以形成共晶液相; 等温固化共晶液体,形成共晶合金的粘结层。

    Server network diagnostic system
    6.
    发明授权
    Server network diagnostic system 有权
    服务器网络诊断系统

    公开(公告)号:US08589741B2

    公开(公告)日:2013-11-19

    申请号:US13458319

    申请日:2012-04-27

    CPC classification number: G06F11/325 H04L41/0645

    Abstract: Methods and systems for implementing such methods for providing server fault notifications, diagnostic and system management information may include, but are not limited to: receiving a network fault status request input; illuminating one or more server node fault indicators for one or more degraded server nodes having one or more faults; receiving a server node fault status request input for a degraded server node having one or more faults; and displaying one or more diagnostic service notifications for one or more faults of the degraded server node.The displaying of the diagnostic service notifications may allow for the completion of various service operations associated with the service notifications once the information specific to a fault is presented.

    Abstract translation: 用于实现用于提供服务器故障通知,诊断和系统管理信息的这种方法的方法和系统可以包括但不限于:接收网络故障状态请求输入; 为具有一个或多个故障的一个或多个退化服务器节点照亮一个或多个服务器节点故障指示符; 接收具有一个或多个故障的劣化服务器节点的服务器节点故障状态请求输入; 以及显示针对所述退化服务器节点的一个或多个故障的一个或多个诊断服务通知。 一旦出现故障特有的信息,诊断服务通知的显示可以允许完成与服务通知相关联的各种服务操作。

    Tuning a switching power supply
    7.
    发明授权
    Tuning a switching power supply 有权
    调整开关电源

    公开(公告)号:US07906950B2

    公开(公告)日:2011-03-15

    申请号:US12270477

    申请日:2008-11-13

    CPC classification number: H02M3/156

    Abstract: Tuning a switching power supply, the power supply including a switching transistor; a filter circuit; a pulse generator that drives the switching transistor; a programmable filter connected to the output of the filter circuit; a digital signal processor (‘DSP’) connected to the output of the filter circuit, the DSP configured to program the programmable filter; and a tuning control circuit connected to the output of the filter circuit, to the pulse generator, and to the DSP; including calculating by the DSP, from sampled voltage values of a tuning pulse driven through the filter circuit by the pulse generator, the actual impedance of the filter circuit; and programming, by the DSP, the programmable filter, setting the combined impedance of the filter circuit and the programmable filter to the design impedance of the filter circuit.

    Abstract translation: 调谐开关电源,电源包括开关晶体管; 滤波电路; 驱动开关晶体管的脉冲发生器; 连接到滤波电路的输出的可编程滤波器; 数字信号处理器(“DSP”)连接到滤波电路的输出端,DSP配置为对可编程滤波器进行编程; 以及调谐控制电路,连接到滤波电路的输出,脉冲发生器和DSP; 包括由DSP计算的脉冲发生器通过滤波电路驱动的调谐脉冲的采样电压值,滤波器电路的实际阻抗; 并由DSP编程可编程滤波器,将滤波电路和可编程滤波器的组合阻抗设置为滤波电路的设计阻抗。

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