Abstract:
A multijunction solar cell including an upper first solar subcell, and the base-emitter junction of the upper first solar subcell being a homojunction; a second solar subcell adjacent to said first solar subcell; a third solar subcell adjacent to said second solar subcell. A first graded interlayer is provided adjacent to said third solar subcell. A fourth solar subcell is provided adjacent to said first graded interlayer, said fourth subcell is lattice mismatched with respect to said third subcell. A second graded interlayer is provided adjacent to said fourth solar subcell; and a lower fifth solar subcell is provided adjacent to said second graded interlayer, said lower fifth subcell is lattice mismatched with respect to said fourth subcell.
Abstract:
A multijunction solar cell including an upper first solar subcell, and the base-emitter junction of the upper first solar subcell being a homojunction; a second solar subcell adjacent to said first solar subcell; a third solar subcell adjacent to said second solar subcell. A first graded interlayer is provided adjacent to said third solar subcell. A fourth solar subcell is provided adjacent to said first graded interlayer, said fourth subcell is lattice mismatched with respect to said third subcell. A second graded interlayer is provided adjacent to said fourth solar subcell; and a lower fifth solar subcell is provided adjacent to said second graded interlayer, said lower fifth subcell is lattice mismatched with respect to said fourth subcell.
Abstract:
A multijunction solar cell including a first solar subcell having a first band gap and a first short-circuit current; a second solar subcell disposed over the first solar subcell and having a second band gap greater than the first band gap and a second short-circuit current greater than the first short-circuit current by an amount in the range of 2% to 6%; a third solar subcell disposed over the second solar subcell and having a third band gap greater than the second band gap and a third short-circuit current less than the first short-circuit current by an amount in the range of 2% to 6%; and a fourth solar subcell disposed over the third solar subcell having a fourth band gap greater than the third band gap, and a fourth short-circuit current less than the third short-circuit current by an amount in the range of 6% to 10%, so that at an “end of life” state of the multijunction solar cell in an AM0 space environment the short-circuit current of each of the subcells are substantially identical.
Abstract:
A DIMM riser card that includes a PCB having a first edge, a second edge, and one or more faces. The first edge of the PCB is configured for insertion into a main board DIMM socket. The first edge includes electrical traces that electrically couple to a memory bus. The DIMM riser card includes an angled DIMM socket mounted on one face of the PCB, where the angled DIMM socket is configured to accept a DIMM at an angle not perpendicular to the PCB and electrically couple the DIMM to the memory bus. The DIMM riser card includes a straddle mount DIMM socket mounted on the second edge of the PCB. The straddle mount DIMM socket is configured to accept a DIMM and electrically couple the DIMM to the memory bus through the electrical traces on the first edge of the PCB.
Abstract:
A solar cell interconnect assembly and a method for manufacturing the same are provided. In an embodiment, the method may include: providing a solar cell having an interconnect member formed thereon, the interconnect member comprising a metallic part formed on a surface of the solar cell and a first precursor layer formed over the metallic part; providing an interconnector comprising a second precursor layer at a surface thereof; heating the interconnector and the interconnect member to a temperature equal to or above a eutectic temperature of the materials of the first and second precursor layers and pressing one of them against the other so as to form a eutectic liquid phase; and isothermal solidifying the eutectic liquid to form a bonding layer of eutectic alloy.
Abstract:
Methods and systems for implementing such methods for providing server fault notifications, diagnostic and system management information may include, but are not limited to: receiving a network fault status request input; illuminating one or more server node fault indicators for one or more degraded server nodes having one or more faults; receiving a server node fault status request input for a degraded server node having one or more faults; and displaying one or more diagnostic service notifications for one or more faults of the degraded server node.The displaying of the diagnostic service notifications may allow for the completion of various service operations associated with the service notifications once the information specific to a fault is presented.
Abstract:
Tuning a switching power supply, the power supply including a switching transistor; a filter circuit; a pulse generator that drives the switching transistor; a programmable filter connected to the output of the filter circuit; a digital signal processor (‘DSP’) connected to the output of the filter circuit, the DSP configured to program the programmable filter; and a tuning control circuit connected to the output of the filter circuit, to the pulse generator, and to the DSP; including calculating by the DSP, from sampled voltage values of a tuning pulse driven through the filter circuit by the pulse generator, the actual impedance of the filter circuit; and programming, by the DSP, the programmable filter, setting the combined impedance of the filter circuit and the programmable filter to the design impedance of the filter circuit.
Abstract:
The present invention assesses memory (DIMM) strength by calculating frequency content of a radiated field which is collected by an apparatus, such as a dipole antenna. Radiated field is created by accelerated charge, which is a function of the slew rate or DIMM strength. Radiated power is directly proportional to the frequency at which bits are driven. By separating the radiated field from the near field or stored field, the DIMM strength content is isolated from other functional DIMM issues, such as tRCD latency, refresh cycles, addressing mode, etc. By examining the radiated power, the disadvantages of the prior art, such as by probing the DIMM's contacts, are avoided.
Abstract:
A novel Flame Temperature Analyzer (FTA) method and apparatus for measuring combustible gas concentration and oxygen content in a sample gas includes supplying a mixture of oxidant and fuel to a sensing flame and measuring the temperature of the flame as the sample is added to the combustion chamber.
Abstract:
A method for testing a printed circuit board to determining the dielectric loss associated with the circuit board material relative to a standard. Dielectric losses in the material generate heat when a high frequency electronic signal, such as a microwave frequency signal, is communicated through a microstrip that is embedded within the printed circuit board. The temperature or spectrum at the surface of printed circuit board is measured and compared against the temperature or spectrum of the standard to determine whether the material under test is acceptable. While various temperature measurement devices may be used, the temperature is preferably measured without contacting the surface, such as using an infrared radiation probe.