ARBITRATING BUS TRANSACTIONS ON A COMMUNICATIONS BUS BASED ON BUS DEVICE HEALTH INFORMATION AND RELATED POWER MANAGEMENT
    4.
    发明申请
    ARBITRATING BUS TRANSACTIONS ON A COMMUNICATIONS BUS BASED ON BUS DEVICE HEALTH INFORMATION AND RELATED POWER MANAGEMENT 审中-公开
    根据总线设备健康信息和相关电源管理对通信总线进行总线交易

    公开(公告)号:US20150234761A1

    公开(公告)日:2015-08-20

    申请号:US14706203

    申请日:2015-05-07

    Abstract: Devices, systems, methods, and computer-readable mediums for arbitrating bus transactions on a communications bus based on health information are disclosed. Health information of master devices can be used to adjust priorities of bus transactions from master devices to meet quality of service requirements of the master devices. In one embodiment, a bus interconnect is provided and configured to communicate bus transactions from any of a plurality of master devices to slave device(s) coupled the bus interconnect. The bus interconnect is further configured to map health information for each of the plurality of master devices into virtual priority space. The bus interconnect is further configured to translate the virtual priority space into a physical priority level for each of the plurality of master devices. The bus interconnect is further configured to arbitrate bus transactions for the plurality of master devices based on physical priority level for the plurality of master devices.

    Abstract translation: 公开了用于基于健康信息在通信总线上仲裁总线事务的设备,系统,方法和计算机可读介质。 主设备的健康信息可用于调整主设备总线事务的优先级,以满足主设备的服务质量要求。 在一个实施例中,总线互连被提供和配置为将总线事务从多个主设备中的任一个传送到耦合总线互连的从设备。 总线互连还被配置为将多个主设备中的每一个的健康信息映射到虚拟优先级空间中。 总线互连还被配置为将虚拟优先级空间转换为多个主设备中的每一个的物理优先级。 总线互连还被配置为基于多个主设备的物理优先级来仲裁多个主设备的总线事务。

    System and method for uniform interleaving of data across a multiple-channel memory architecture with asymmetric storage capacity
    9.
    发明授权
    System and method for uniform interleaving of data across a multiple-channel memory architecture with asymmetric storage capacity 有权
    通过具有不对称存储容量的多通道存储架构进行数据均匀交织的系统和方法

    公开(公告)号:US09465735B2

    公开(公告)日:2016-10-11

    申请号:US14045784

    申请日:2013-10-03

    CPC classification number: G06F12/0607

    Abstract: Systems and methods for uniformly interleaving memory accesses across physical channels of a memory space with a non-uniform storage capacity across the physical channels are disclosed. An interleaver is arranged in communication with one or more processors and a system memory. The interleaver identifies locations in a memory space supported by the memory channels and is responsive to logic that defines virtual sectors having a desired storage capacity. The interleaver accesses the asymmetric storage capacity uniformly across the virtual sectors in response to requests to access the memory space.

    Abstract translation: 公开了跨物理通道具有不均匀存储容量的存储器空间的物理信道的均匀交织的系统和方法。 交织器布置成与一个或多个处理器和系统存储器通信。 交织器识别由存储器通道支持的存储器空间中的位置,并响应于定义具有期望存储容量的虚拟扇区的逻辑。 响应于访问存储器空间的请求,交织器跨虚拟扇区均匀地访问非对称存储容量。

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