-
公开(公告)号：US11626336B2
公开(公告)日：2023-04-11
申请号：US16590299
申请日：2019-10-01
Applicant: QUALCOMM Incorporated
Inventor： Daniel Garcia , Kinfegebriel Amera Mengistie , Francesco Carrara , Chang-Ho Lee , Ashish Alawani , Mark Kuhlman , John Jong-Hoon Lee , Jeongkeun Kim , Xiaoju Yu , Supatta Niramarnkarn
IPC: H01L23/16 , H01L21/48 , H01L21/56 , H01L23/31 , H01L23/498 , H01L23/552 , H01L23/00
Abstract: A package that includes a substrate having a first surface; a solder resist layer coupled to the first surface of the substrate; a device located over the solder resist layer such that a portion of the device touches the solder resist layer; and an encapsulation layer located over the solder resist layer such that the encapsulation layer encapsulates the device. The solder resist layer is configured as a seating plane for the device. The device is located over the solder resist layer such that a surface of the device facing the substrate is approximately parallel to the first surface of the substrate. The solder resist layer includes at least one notch. The device is located over the solder resist layer such that at least one corner of the device touches the at least one notch.
-
公开(公告)号：US10069469B2
公开(公告)日：2018-09-04
申请号：US15271518
申请日：2016-09-21
Applicant: QUALCOMM INCORPORATED
Inventor： Woonyun Kim , Chang-Ho Lee , Minsik Ahn , Jeongwon Cha
Abstract: A circuit includes a first transistor comprising a gate, a source, and a drain, and an inductor coupled between the gate and the source of the first transistor, wherein the source is further coupled to a current source and the gate is further coupled to an amplifier.
-
公开(公告)号：US20170222608A1
公开(公告)日：2017-08-03
申请号：US15271518
申请日：2016-09-21
Applicant: QUALCOMM INCORPORATED
Inventor： Woonyun Kim , Chang-Ho Lee , Minsik Ahn , Jeongwon Cha
CPC classification number: H03F3/45179 , H03F1/0266 , H03F3/193 , H03F3/245 , H03F3/45188 , H03F2200/165 , H03F2200/168 , H03F2200/18 , H03F2200/294 , H03F2200/336 , H03F2200/451 , H03F2203/45244
Abstract: A circuit includes a first transistor comprising a gate, a source, and a drain, and an inductor coupled between the gate and the source of the first transistor, wherein the source is further coupled to a current source and the gate is further coupled to an amplifier.
-
Patent Agency Ranking
公开(公告)号：US20140266448A1
公开(公告)日：2014-09-18
申请号：US13828646
申请日：2013-03-14
Applicant: QUALCOMM INCORPORATED
Inventor： Jeongwon Cha , Chang-Ho Lee , Woonyun Kim , Aristotele Hadjichristos , Yu Zhao
CPC classification number: H03F3/193 , H03F1/0211 , H03F1/0261 , H03F1/22 , H03F1/223 , H03F1/3205 , H03F3/21 , H03F3/2171 , H03F3/245 , H03F2200/18 , H03F2200/61
Abstract: Exemplary embodiments are related to an envelope-tracking power amplifier. A device may include a first transistor of a plurality of transistors in a stacked configuration configured to receive a supply voltage varying with an envelope of a radio-frequency (RF) input signal. The device may further include a second transistor of the plurality in the stacked configuration coupled to a reference voltage and configured to receive a dynamic bias voltage varying inversely proportional to the supply voltage.
Abstract translation: 示例性实施例涉及包络跟踪功率放大器。 器件可以包括堆叠配置中的多个晶体管的第一晶体管，其被配置为接收随着射频（RF）输入信号的包络而变化的电源电压。 器件还可包括多个堆叠配置中的第二晶体管，其耦合到参考电压并被配置为接收与电源电压成反比变化的动态偏置电压。
-
公开(公告)号：US09160377B2
公开(公告)日：2015-10-13
申请号：US13720851
申请日：2012-12-19
Applicant: QUALCOMM Incorporated
Inventor： Chang-Ho Lee , Woonyun Kim , Minsik Ahn , Jeongwon Cha , Yunseo Park , Aristotele Hadjichristos
CPC classification number: H04B1/0458 , H03F1/0277 , H03F3/72 , H03F2203/7239 , H03H7/38 , H04B1/0483
Abstract: Exemplary embodiments are directed to an amplifier module which may comprise a transmit path including a first amplifier and a second amplifier. The exemplary amplifier module may further include a transformer coupled between the first amplifier and the second amplifier and switchably configured for coupling the first amplifier in series with the second amplifier in a first mode and coupling the first amplifier to bypass the second amplifier in a second mode.
Abstract translation: 示例性实施例涉及放大器模块，其可以包括包括第一放大器和第二放大器的发射路径。 示例性放大器模块还可以包括耦合在第一放大器和第二放大器之间的变压器，并且可切换地配置用于以第一模式将第一放大器与第二放大器串联耦合，并且以第二模式耦合第一放大器旁路第二放大器 。
-
公开(公告)号：US20150050901A1
公开(公告)日：2015-02-19
申请号：US13720851
申请日：2012-12-19
Applicant: QUALCOMM INCORPORATED
Inventor： Chang-Ho Lee , Woonyun Kim , Minsik Ahn , Jeongwon Cha , Yunseo Park , Aristotele Hadjichristos
IPC: H04B1/04
CPC classification number: H04B1/0458 , H03F1/0277 , H03F3/72 , H03F2203/7239 , H03H7/38 , H04B1/0483
Abstract: Exemplary embodiments are directed to an amplifier module which may comprise a transmit path including a first amplifier and a second amplifier. The exemplary amplifier module may further include a transformer coupled between the first amplifier and the second amplifier and switchably configured for coupling the first amplifier in series with the second amplifier in a first mode and coupling the first amplifier to bypass the second amplifier in a second mode.
Abstract translation: 示例性实施例涉及放大器模块，其可以包括包括第一放大器和第二放大器的发射路径。 示例性放大器模块还可以包括耦合在第一放大器和第二放大器之间的变压器，并且可切换地配置用于以第一模式将第一放大器与第二放大器串联耦合，并且以第二模式耦合第一放大器旁路第二放大器 。
-
公开(公告)号：US20140139288A1
公开(公告)日：2014-05-22
申请号：US13678923
申请日：2012-11-16
Applicant: QUALCOMM INCORPORATED
Inventor： Jeongwon Cha , Chang-Ho Lee , Aristotele Hadjichristos
IPC: H03F3/45
CPC classification number: H03F1/0277 , H03F1/223 , H03F1/523 , H03F3/211 , H03F3/245 , H03F2200/61 , H03K17/102
Abstract: Techniques for providing adjustable gain in an amplifier. In an aspect, a composite amplifier having adjustable gain includes a plurality of amplifiers coupled in parallel, wherein each of the amplifiers may be turned on or off to adjust the overall gain of the composite amplifier. Each amplifier may include an input transistor and at least two cascode transistors. To turn each amplifier off, the gate voltage of a second or lowermost cascode transistor coupled to the input transistor may be grounded, and the gate voltage of a first cascode transistor coupled to the output voltage may be coupled to a first turn-off voltage to reduce the drain-to-gate voltage drop across the first cascode transistor. Further aspects provide for decoupling a capacitor coupled to the gates of the cascode transistors from AC ground when the amplifier is turned off
Abstract translation: 在放大器中提供可调增益的技术。 在一方面，具有可调增益的复合放大器包括并联耦合的多个放大器，其中每个放大器可被导通或关断以调整复合放大器的总体增益。 每个放大器可以包括输入晶体管和至少两个共源共栅晶体管。 为了关闭每个放大器，耦合到输入晶体管的第二或最低共源共栅晶体管的栅极电压可以接地，并且耦合到输出电压的第一共源共栅晶体管的栅极电压可以耦合到第一截止电压到 降低跨越第一共源共栅晶体管的漏极 - 栅极电压降。 另外的方面提供了当放大器关闭时将耦合到共源共栅晶体管的栅极的电容器与AC地耦合的去耦合
-
公开(公告)号：US08928415B2
公开(公告)日：2015-01-06
申请号：US13678923
申请日：2012-11-16
Applicant: QUALCOMM Incorporated
Inventor： Jeongwon Cha , Chang-Ho Lee , Aristotele Hadjichristos
CPC classification number: H03F1/0277 , H03F1/223 , H03F1/523 , H03F3/211 , H03F3/245 , H03F2200/61 , H03K17/102
Abstract: Techniques for providing adjustable gain in an amplifier. In an aspect, a composite amplifier having adjustable gain includes a plurality of amplifiers coupled in parallel, wherein each of the amplifiers may be turned on or off to adjust the overall gain of the composite amplifier. Each amplifier may include an input transistor and at least two cascode transistors. To turn each amplifier off, the gate voltage of a second or lowermost cascode transistor coupled to the input transistor may be grounded, and the gate voltage of a first cascode transistor coupled to the output voltage may be coupled to a first turn-off voltage to reduce the drain-to-gate voltage drop across the first cascode transistor. Further aspects provide for decoupling a capacitor coupled to the gates of the cascode transistors from AC ground when the amplifier is turned off.
Abstract translation: 在放大器中提供可调增益的技术。 在一方面，具有可调增益的复合放大器包括并联耦合的多个放大器，其中每个放大器可被导通或关断以调整复合放大器的总体增益。 每个放大器可以包括输入晶体管和至少两个共源共栅晶体管。 为了关闭每个放大器，耦合到输入晶体管的第二或最低共源共栅晶体管的栅极电压可以接地，并且耦合到输出电压的第一共源共栅晶体管的栅极电压可以耦合到第一关断电压 降低跨越第一共源共栅晶体管的漏极 - 栅极电压降。 另外的方面提供了当放大器关闭时将耦合到共源共栅晶体管的栅极的电容器与AC地耦合的去耦合。
-
-
-
-
-
-
-
Search Results
8
records
(took 0.015 seconds)
