STARTUP CIRCUIT AND METHODS OF USE FOR AUDIO ACCESSORIES

    公开(公告)号:US20180146276A1

    公开(公告)日:2018-05-24

    申请号:US15472017

    申请日:2017-03-28

    CPC classification number: H04R1/1041 G06F3/165 H03H7/32 H04R2420/09

    Abstract: An accessory device, configured to be interfaced with a master device, and configured to operate in an analog mode and in a digital mode, the accessory device including: a startup circuit including: a first transistor that interfaces the accessory device to the master device, wherein the first transistor is configured with a first resistive capacitive (RC) circuit to turn on the first transistor according to a time constant of the first RC circuit; a second transistor coupled between ground and the first RC circuit, wherein the second transistor is configured to control a gate of the first transistor in response to a control signal; and a diode having an anode coupled to the first node and a cathode coupled to a body terminal of the first transistor.

    DELAY-FREE POLY-PHASE QUANTIZER AND QUANTIZATION METHOD FOR PWM MISMATCH SHAPING

    公开(公告)号:US20180234101A1

    公开(公告)日:2018-08-16

    申请号:US15435155

    申请日:2017-02-16

    CPC classification number: H03M1/0617 H03M3/42 H03M3/432 H03M3/47 H03M3/50

    Abstract: A system and method for pulse-width modulation (PWM) mismatch shaping. The method includes receiving a multi-bit pulse-code modulated (PCM) signal and generating a voltage ramp signal. The method includes generating a first corrected signal based on a first feedback signal and the multi-bit PCM signal. The method includes generating a first single-bit PWM signal based on the first corrected signal and the voltage ramp signal. The method includes delaying the voltage-ramp signal and generating a second corrected signal based on a second feedback signal and the multi-bit PCM signal. The method includes generating a second single-bit PWM signal based on the second corrected signal and the delayed voltage ramp signal and generating a multi-bit pulse-density modulation (PDM) signal based on the first single-bit PWM signal and the second single-bit PWM signal.

    Protection of a speaker from thermal damage

    公开(公告)号:US09749739B2

    公开(公告)日:2017-08-29

    申请号:US14858306

    申请日:2015-09-18

    CPC classification number: H04R3/007 H04R29/001 H04R2203/00 H04R2430/01

    Abstract: A method of protecting a speaker from thermal damage includes determining a first load current through a first resistor that is coupled to the speaker. The method also includes converting the first load current to a digital value using a second load current through a second resistor as a reference input. The second resistor is part of a circuit that reduces an effect of a temperature coefficient of resistance of the first resistor. The method also includes comparing the digital value of the first load current to a threshold value. The method further includes, responsive to the first load current being larger than the threshold value, generating an instruction to take an action to protect the speaker.

    Voltage-to-current architecture and error correction schemes

    公开(公告)号:US11536749B2

    公开(公告)日:2022-12-27

    申请号:US17154758

    申请日:2021-01-21

    Abstract: Certain aspects of the present disclosure are generally directed to circuitry and techniques for voltage-to-current conversion. For example, certain aspects provide a circuit for signal amplification including a first amplifier; a first transistor, a gate of the first transistor being coupled to an output of the first amplifier and a drain of the first transistor being coupled to an output node of circuit; a first resistive element coupled between a first input node of the circuit and an input of the first amplifier; a second amplifier; a second transistor, a gate of the second transistor being coupled to an output of the second amplifier and a drain of the second transistor being coupled to the output node of circuit; and a second resistive element coupled between a second input node of the circuit and an input of the second amplifier.

    Delay-free poly-phase quantizer and quantization method for PWM mismatch shaping

    公开(公告)号:US10164650B2

    公开(公告)日:2018-12-25

    申请号:US15435155

    申请日:2017-02-16

    Abstract: A system and method for pulse-width modulation (PWM) mismatch shaping. The method includes receiving a multi-bit pulse-code modulated (PCM) signal and generating a voltage ramp signal. The method includes generating a first corrected signal based on a first feedback signal and the multi-bit PCM signal. The method includes generating a first single-bit PWM signal based on the first corrected signal and the voltage ramp signal. The method includes delaying the voltage-ramp signal and generating a second corrected signal based on a second feedback signal and the multi-bit PCM signal. The method includes generating a second single-bit PWM signal based on the second corrected signal and the delayed voltage ramp signal and generating a multi-bit pulse-density modulation (PDM) signal based on the first single-bit PWM signal and the second single-bit PWM signal.

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