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公开(公告)号:US20190198703A1
公开(公告)日:2019-06-27
申请号:US16188985
申请日:2018-11-13
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Tomoo NAKAYAMA , Shinichi WATANUKI , Futoshi KOMATSU , Teruhiro KUWAJIMA , Takashi OGURA , Hiroyuki OKUAKI , Shigeaki SHIMIZU
IPC: H01L31/105 , H01L31/18 , G02B6/122 , G02B6/136
Abstract: In order to improve the performance of a semiconductor device, a semiconductor layer EP is formed over a p-type semiconductor PR. An n-type semiconductor layer NR1 is formed over the semiconductor layer EP. The semiconductor layer PR, the semiconductor layer EP, and the semiconductor layer NR1 respectively configure part of a photoreceiver. A cap layer of a material different from that of the semiconductor layer EP is formed over the semiconductor layer EP, and a silicide layer, which is a reaction product of a metal and the material included in the cap layer, is formed within the cap layer. A plug having a barrier metal film BM1 is formed over the cap layer through the silicide layer. Here, a reaction product of the metal and the material included in the semiconductor layer NR1 is not formed within the semiconductor layer NR1.
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公开(公告)号:US20160043036A1
公开(公告)日:2016-02-11
申请号:US14809070
申请日:2015-07-24
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Takashi OGURA , Tatsuya USAMI , Satoshi KODAMA , Shuuichirou UENO , Satoshi ITOU , Takamasa ITOU
IPC: H01L23/532 , H01L49/02
CPC classification number: H01L23/53266 , H01L21/76829 , H01L21/76831 , H01L21/76841 , H01L21/76843 , H01L23/53223 , H01L23/5329 , H01L23/53295 , H01L27/10885 , H01L2924/0002 , H01L2924/00
Abstract: A conductor provided in an interconnection layer is allowed to have a low resistance. An insulator film is provided over a substrate, and is comprised of SiO(1-x)Nx (where x>0.5 in an XRD analysis result). An interconnection is provided over the insulator film, and includes a first layer and a second layer. The first layer includes at least one of TiN, TaN, WN, and RuN. The second layer is provided over the first layer, and is formed of a material having a resistance lower than the first layer, for example, W.
Abstract translation: 设置在互连层中的导体允许具有低电阻。 绝缘膜设置在衬底上,由SiO(1-x)Nx(XRD分析结果中x> 0.5)组成。 在绝缘膜上设置互连,并且包括第一层和第二层。 第一层包括TiN,TaN,WN和RuN中的至少一种。 第二层设置在第一层之上,并且由具有低于第一层的电阻的材料形成,例如W.
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公开(公告)号:US20180138325A1
公开(公告)日:2018-05-17
申请号:US15797230
申请日:2017-10-30
Applicant: Renesas Electronics Corporation
Inventor: Shinichi WATANUKI , Futoshi KOMATSU , Tomoo NAKAYAMA , Takashi OGURA , Teruhiro KUWAJIMA
IPC: H01L31/028 , H01L31/0232 , H01L31/02
CPC classification number: H01L31/028 , H01L31/02005 , H01L31/02161 , H01L31/022408 , H01L31/02327 , H01L31/105
Abstract: Germanium (Ge) contamination to a semiconductor manufacturing apparatus is suppressed. Germanium is a dissimilar material in a silicon semiconductor process. A semiconductor device is provided with a Ge photodiode including an n-type germanium layer, and a plug capacitively coupled to the n-type germanium layer. In other words, the n-type germanium layer of the Ge photodiode and the plug are not in direct contact with each other but are capacitively coupled to each other.
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公开(公告)号:US20170012143A1
公开(公告)日:2017-01-12
申请号:US15186521
申请日:2016-06-19
Applicant: Renesas Electronics Corporation
Inventor: Tatsuya USAMI , Takashi OGURA
IPC: H01L31/0288 , H01L31/0352 , H01L31/18
Abstract: A germanium optical receiver in which a dark current is small is achieved. The germanium optical receiver is formed of a p-type germanium layer, a non-doped i-type germanium layer, and an n-type germanium layer that are sequentially stacked on an upper surface of a p-type silicon core layer, a first cap layer made of silicon is formed on the side surface of the i-type germanium layer, and a second cap layer made of silicon is formed on the upper surface and side surface of the n-type germanium layer. The n-type germanium layer is doped with such an element as phosphorus or boron having a covalent bonding radius smaller than a covalent bonding radius of germanium.
Abstract translation: 实现了暗电流小的锗光接收器。 锗光接收器由p型锗层,非掺杂i型锗层和n型锗层构成,其依次层叠在p型硅芯层的上表面上,第一 在i型锗层的侧表面上形成由硅制成的盖层,并且在n型锗层的上表面和侧表面上形成由硅制成的第二盖层。 n型锗层掺杂有诸如磷或硼的元素,其共价键半径小于锗的共价键半径。
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公开(公告)号:US20220158005A1
公开(公告)日:2022-05-19
申请号:US16950479
申请日:2020-11-17
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor: Shotaro KUDO , Shinichi WATANUKI , Takashi OGURA
IPC: H01L31/0232 , H01L31/18
Abstract: A Semiconductor device includes an insulating layer, an optical waveguide, a first dummy semiconductor film, a second semiconductor film and a third semiconductor film. The optical waveguide is formed on the insulating layer. The first dummy semiconductor film is formed on the insulating layer and is spaced apart from the optical waveguide. The first dummy semiconductor film is formed on the first semiconductor film. The second semiconductor film is integrally formed with the optical waveguide as a single member on the insulating layer. The third semiconductor film is formed on the second semiconductor film. A material of the first dummy semiconductor film is different from a material of the optical waveguide. In plan view, a distance between the optical waveguide and the first dummy semiconductor film in a first direction perpendicular to an extending direction of the optical waveguide is greater than a thickness of the insulating layer.
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