公开(公告)号：US20160071850A1

公开(公告)日：2016-03-10

申请号：US14931235

申请日：2015-11-03

Applicant: Renesas Electronics Corporation

Inventor： Misato SAKAMOTO ,  Yoshitake KATO ,  Youichi YAMAMOTO ,  Hitoshi KASAI ,  Satoshi ITOU

IPC: H01L27/108

CPC classification number: H01L27/10808 ,  H01L21/02181 ,  H01L21/02183 ,  H01L21/02189 ,  H01L21/28556 ,  H01L21/28568 ,  H01L21/3212 ,  H01L27/10814 ,  H01L27/10817 ,  H01L27/10852 ,  H01L27/10855 ,  H01L27/10885 ,  H01L27/10888 ,  H01L28/60 ,  H01L28/87 ,  H01L28/91

Abstract: A capacitive element has improved electrical properties. The capacitive element is configured in a DRAM cell and has a lower electrode, a capacitive insulator film formed over the lower electrode, and an upper electrode formed over the capacitive insulator film. The upper electrode has a structure in which from the capacitive insulator film side of this electrode, a first upper electrode, a second upper electrode and a third upper electrode are stacked in turn. The third upper electrode is a tungsten film that may contain an impurity. Between the first and third upper electrodes, the second upper electrode is interposed which is a barrier film for preventing the possible impurity in the third upper electrode from diffusing into the capacitive insulator film.

Abstract translation: 电容元件具有改善的电性能。 电容元件配置在DRAM单元中，并且具有下电极，形成在下电极上的电容绝缘膜，以及形成在电容绝缘膜上的上电极。 上部电极具有从该电极的电容绝缘膜侧，第一上部电极，第二上部电极和第三上部电极依次层叠的结构。 第三上电极是可能含有杂质的钨膜。 在第一和第三上部电极之间，插入第二上部电极，其是用于防止第三上部电极中可能的杂质扩散到电容绝缘膜中的阻挡膜。

公开(公告)号：US20160043036A1

公开(公告)日：2016-02-11

申请号：US14809070

申请日：2015-07-24

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Takashi OGURA ,  Tatsuya USAMI ,  Satoshi KODAMA ,  Shuuichirou UENO ,  Satoshi ITOU ,  Takamasa ITOU

IPC: H01L23/532 ,  H01L49/02

CPC classification number: H01L23/53266 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76841 ,  H01L21/76843 ,  H01L23/53223 ,  H01L23/5329 ,  H01L23/53295 ,  H01L27/10885 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A conductor provided in an interconnection layer is allowed to have a low resistance. An insulator film is provided over a substrate, and is comprised of SiO(1-x)Nx (where x>0.5 in an XRD analysis result). An interconnection is provided over the insulator film, and includes a first layer and a second layer. The first layer includes at least one of TiN, TaN, WN, and RuN. The second layer is provided over the first layer, and is formed of a material having a resistance lower than the first layer, for example, W.

Abstract translation: 设置在互连层中的导体允许具有低电阻。 绝缘膜设置在衬底上，由SiO（1-x）Nx（XRD分析结果中x> 0.5）组成。 在绝缘膜上设置互连，并且包括第一层和第二层。 第一层包括TiN，TaN，WN和RuN中的至少一种。 第二层设置在第一层之上，并且由具有低于第一层的电阻的材料形成，例如W.

公开(公告)号：US20160013142A1

公开(公告)日：2016-01-14

申请号：US14792461

申请日：2015-07-06

Applicant: Renesas Electronics Corporation

Inventor： Takehiko MAEDA ,  Akira YAJIMA ,  Satoshi ITOU ,  Fumiyoshi KAWASHIRO

IPC: H01L23/00

CPC classification number: H01L24/05 ,  H01L24/03 ,  H01L24/06 ,  H01L24/08 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05084 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05553 ,  H01L2224/05582 ,  H01L2224/05644 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/05678 ,  H01L2224/05684 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/48505 ,  H01L2224/48799 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/01008 ,  H01L2924/01074

Abstract: An improvement is achieved in the reliability of a semiconductor device. Over a semiconductor substrate, an interlayer insulating film is formed and, over the interlayer insulating film, a pad is formed. Over the interlayer insulating film, an insulating film is formed so as to cover the pad. In the insulating film, an opening is formed to expose a part of the pad. The pad is a pad to which a copper wire is to be electrically coupled and which includes an Al-containing conductive film containing aluminum as a main component. Over the Al-containing conductive film in a region overlapping the opening in plan view, a laminated film including a barrier conductor film, and a metal film over the barrier conductor film is formed. The metal film is in an uppermost layer. The barrier conductor film is a single-layer film or a laminated film including one or more layers of films selected from the group consisting of a Ti film, a TiN film, a Ta film, a TaN film, a W film, a WN film, a TiW film, and a TaW film. The metal film is made of one or more metals selected from the group consisting of Pd, Au, Ru, Rh, Pt, and Ir.

Abstract translation: 半导体器件的可靠性得到改善。 在半导体衬底上形成层间绝缘膜，并且在层间绝缘膜上形成衬垫。 在层间绝缘膜之上，形成绝缘膜以覆盖该焊盘。 在绝缘膜中形成开口以露出垫的一部分。 焊盘是铜导线电耦合的焊盘，其包括含有铝作为主要成分的含Al导电膜。 在平面图中与开口重叠的区域中的含Al导电膜上形成包含阻挡导体膜的层叠膜和阻挡导体膜上的金属膜。 金属膜位于最上层。 阻挡导电膜是单层膜或包含选自Ti膜，TiN膜，Ta膜，TaN膜，W膜，WN膜中的一层或多层膜的层压膜 ，TiW膜和TaW膜。 金属膜由选自Pd，Au，Ru，Rh，Pt和Ir中的一种或多种金属制成。

公开(公告)号：US20150270271A1

公开(公告)日：2015-09-24

申请号：US14661734

申请日：2015-03-18

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Misato SAKAMOTO ,  Yoshitake KATO ,  Youichi YAMAMOTO ,  Hitoshi KASAI ,  Satoshi ITOU

IPC: H01L27/108 ,  H01L21/02 ,  H01L21/321 ,  H01L49/02 ,  H01L21/285

CPC classification number: H01L27/10808 ,  H01L21/02181 ,  H01L21/02183 ,  H01L21/02189 ,  H01L21/28556 ,  H01L21/28568 ,  H01L21/3212 ,  H01L27/10814 ,  H01L27/10817 ,  H01L27/10852 ,  H01L27/10855 ,  H01L27/10885 ,  H01L27/10888 ,  H01L28/60 ,  H01L28/87 ,  H01L28/91

Abstract: A capacitive element has improved electrical properties. The capacitive element is configured in a DRAM cell and has a lower electrode, a capacitive insulator film formed over the lower electrode, and an upper electrode formed over the capacitive insulator film. The upper electrode has a structure in which from the capacitive insulator film side of this electrode, a first upper electrode, a second upper electrode and a third upper electrode are stacked in turn. The third upper electrode is a tungsten film that may contain an impurity. Between the first and third upper electrodes, the second upper electrode is interposed which is a barrier film for preventing the possible impurity in the third upper electrode from diffusing into the capacitive insulator film.

Abstract translation: 电容元件具有改善的电性能。 电容元件配置在DRAM单元中，并且具有下电极，形成在下电极上的电容绝缘膜，以及形成在电容绝缘膜上的上电极。 上部电极具有从该电极的电容绝缘膜侧，第一上部电极，第二上部电极和第三上部电极依次层叠的结构。 第三上电极是可能含有杂质的钨膜。 在第一和第三上部电极之间，插入第二上部电极，其是用于防止第三上部电极中可能的杂质扩散到电容绝缘膜中的阻挡膜。