Technique for increasing adhesion of metallization layers by providing dummy vias
    1.
    发明授权
    Technique for increasing adhesion of metallization layers by providing dummy vias 有权
    通过提供虚拟通孔增加金属化层附着力的技术

    公开(公告)号:US07611991B2

    公开(公告)日:2009-11-03

    申请号:US11470024

    申请日:2006-09-05

    IPC分类号: H01L21/44

    摘要: By providing dummy vias below electrically non-functional metal regions, the risk for metal delamination in subsequent processes may be significantly reduced. Moreover, in some embodiments, the mechanical strength of the resulting metallization layers may be even more enhanced by providing dummy metal regions, which may act as anchors for an overlying non-functional metal region. In addition, dummy vias may also be provided in combination with electrically functional metal lines and regions, thereby also enhancing the mechanical stability and the electrical performance thereof.

    摘要翻译: 通过在电气非功能金属区域之下提供虚拟通孔,可以显着降低后续工艺中金属分层的风险。 而且,在一些实施例中,所得到的金属化层的机械强度甚至可以通过提供虚拟金属区域来进一步增强,虚拟金属区域可以用作覆盖的非功能性金属区域的锚点。 此外,还可以与电功能金属线和区域组合提供虚拟通孔,从而也增强机械稳定性及其电性能。

    TECHNIQUE FOR INCREASING ADHESION OF METALLIZATION LAYERS BY PROVIDING DUMMY VIAS
    2.
    发明申请
    TECHNIQUE FOR INCREASING ADHESION OF METALLIZATION LAYERS BY PROVIDING DUMMY VIAS 有权
    通过提供DUMMY VIAS来增加金属化层粘合的技术

    公开(公告)号:US20070123009A1

    公开(公告)日:2007-05-31

    申请号:US11470024

    申请日:2006-09-05

    IPC分类号: H01L21/20

    摘要: By providing dummy vias below electrically non-functional metal regions, the risk for metal delamination in subsequent processes may be significantly reduced. Moreover, in some embodiments, the mechanical strength of the resulting metallization layers may be even more enhanced by providing dummy metal regions, which may act as anchors for an overlying non-functional metal region. In addition, dummy vias may also be provided in combination with electrically functional metal lines and regions, thereby also enhancing the mechanical stability and the electrical performance thereof.

    摘要翻译: 通过在电气非功能金属区域之下提供虚拟通孔,可以显着降低后续工艺中金属分层的风险。 而且,在一些实施例中,所得到的金属化层的机械强度甚至可以通过提供虚拟金属区域来进一步增强,虚拟金属区域可以用作覆盖的非功能性金属区域的锚点。 此外,还可以与电功能金属线和区域组合提供虚拟通孔,从而也增强机械稳定性及其电性能。

    TECHNIQUE FOR PATTERNING DIFFERENTLY STRESSED LAYERS FORMED ABOVE TRANSISTORS BY ENHANCED ETCH CONTROL STRATEGIES
    5.
    发明申请
    TECHNIQUE FOR PATTERNING DIFFERENTLY STRESSED LAYERS FORMED ABOVE TRANSISTORS BY ENHANCED ETCH CONTROL STRATEGIES 有权
    通过增强蚀刻控制策略形成上述晶体管上的不同应力层的技术

    公开(公告)号:US20080206905A1

    公开(公告)日:2008-08-28

    申请号:US11868789

    申请日:2007-10-08

    IPC分类号: H01L21/66

    摘要: During the patterning of stressed layers having different types of intrinsic stress, the effects of the deposition of a silicon dioxide based etch indicator material between the first and second dielectric layers may be significantly reduced by a controlled etch on the basis of optical measurement data indicating the etch rate and, thus, the performance of the respective etch process. In other cases, highly efficient etch indicator species may be incorporated into the stressed dielectric layers or may be formed on a surface portion thereof with reduced layer thickness, thereby providing an enhanced endpoint detection signal without creating the negative effects of silicon dioxide based indicator layers. In one illustrative embodiment, a stressed silicon, nitrogen and carbon-containing layer may be combined with a stressed silicon and nitrogen-containing layer, wherein the carbon species provides a prominent endpoint detection signal.

    摘要翻译: 在具有不同类型的固有应力的应力层的图案化期间,可以通过基于表示第二和第二电介质层的光学测量数据的受控蚀刻来显着地减少基于二氧化硅的蚀刻指示剂材料沉积的影响 蚀刻速率,因此,各个蚀刻工艺的性能。 在其他情况下,可以将高效的蚀刻指示剂物质结合到应力介电层中,或者可以在其表面部分上形成具有减小的层厚度,从而提供增强的端点检测信号,而不产生基于二氧化硅的指示剂层的负面影响。 在一个说明性实施例中,应力硅,氮和碳的层可以与应力硅和含氮层组合,其中碳类提供突出的端点检测信号。

    Technique for patterning differently stressed layers formed above transistors by enhanced etch control strategies
    7.
    发明授权
    Technique for patterning differently stressed layers formed above transistors by enhanced etch control strategies 有权
    通过增强的蚀刻控制策略对形成在晶体管上方的不同应力层进行图案化的技术

    公开(公告)号:US07883629B2

    公开(公告)日:2011-02-08

    申请号:US11868789

    申请日:2007-10-08

    摘要: During the patterning of stressed layers having different types of intrinsic stress, the effects of the deposition of a silicon dioxide based etch indicator material between the first and second dielectric layers may be significantly reduced by a controlled etch on the basis of optical measurement data indicating the etch rate and, thus, the performance of the respective etch process. In other cases, highly efficient etch indicator species may be incorporated into the stressed dielectric layers or may be formed on a surface portion thereof with reduced layer thickness, thereby providing an enhanced endpoint detection signal without creating the negative effects of silicon dioxide based indicator layers. In one illustrative embodiment, a stressed silicon, nitrogen and carbon-containing layer may be combined with a stressed silicon and nitrogen-containing layer, wherein the carbon species provides a prominent endpoint detection signal.

    摘要翻译: 在具有不同类型的固有应力的应力层的图案化期间,可以通过基于表示第二和第二电介质层的光学测量数据的受控蚀刻来显着地减少基于二氧化硅的蚀刻指示剂材料沉积的影响 蚀刻速率,因此,各个蚀刻工艺的性能。 在其他情况下,可以将高效的蚀刻指示剂物质结合到应力介电层中,或者可以在其表面部分上形成具有减小的层厚度,从而提供增强的端点检测信号,而不产生基于二氧化硅的指示剂层的负面影响。 在一个说明性实施例中,应力硅,氮和碳的层可以与应力硅和含氮层组合,其中碳类提供突出的端点检测信号。