公开(公告)号：US20060061426A1

公开(公告)日：2006-03-23

申请号：US11234402

申请日：2005-09-23

申请人： Reiner Bidenbach ,  Ulrich Theus ,  Wilfried Gehrig

发明人： Reiner Bidenbach ,  Ulrich Theus ,  Wilfried Gehrig

IPC分类号： H03K3/03

CPC分类号： H03K3/0315

摘要： To suppress oscillation modes, in particular, higher-order oscillation modes, in a ring oscillator comprising delay elements forming the oscillator ring and being linked by nodes in the ring, and further comprising a gate element located in the oscillator ring which is activated by a control signal to open and close the gate element, the control signal is derived from at least one of the levels of the oscillator signal at the nodes. The control signal is such that the normal oscillation mode, that is, the fundamental oscillation and/or another desired higher-order oscillation, is not affected by the gate. However, unwanted oscillation modes (e.g., the higher oscillation modes) are effectively suppressed in the case of the fundamental oscillation representing the normal oscillation mode.

摘要翻译： 为了抑制振荡模式，特别是高阶振荡模式，在环形振荡器中，包括构成振荡环的延迟元件并由环中的节点链接，并且还包括位于振荡器环中的门元件，该栅极元件由 控制信号来打开和关闭栅极元件，控制信号从节点处的振荡器信号的电平中的至少一个导出。 控制信号使得正常振荡模式，即基本振荡和/或另一期望的高阶振荡不受栅极的影响。 然而，在表示正常振荡模式的基本振荡的情况下，有效地抑制了不想要的振荡模式（例如较高的振荡模式）。

公开(公告)号：US06501322B1

公开(公告)日：2002-12-31

申请号：US09611599

申请日：2000-07-07

申请人： Reiner Bidenbach ,  Ulrich Theus

发明人： Reiner Bidenbach ,  Ulrich Theus

IPC分类号： H03K1792

CPC分类号： G06G7/186

摘要： In integrators which integrate the analog photocurrent of a photodiode (PD), the amplification-bandwidth product is relatively small on account of the parallel parasitic capacitance (Cp) of the photodiode (PD). However, in a design with a switched capacitor (C1), the bandwidth and at the same time the DC amplification must be large, so as to assure the integrator function even at low frequencies. So as to fulfill both of these mutually contradictory requirements for large bandwidth and high DC amplification, a reference voltage (V1) is present at a voltage divider that includes a resistor (R2) and a circuit section (R1) connected in series thereto, as well as at the photodiode (PD). The connection point of the voltage divider is connected to the inverting input of the transconductance amplifier (V). In a preferred embodiment, the circuit section (R1) is realized as a switched capacitor (C1), and the resistance (R2) is realized as an MOS transistor (T1). As an integrated switching circuit, the invention is especially suited for sigma-delta-analog converters.

摘要翻译： 在集成了光电二极管（PD）的模拟光电流的积分器中，由于光电二极管（PD）的并联寄生电容（Cp），放大带宽乘积相对较小。 然而，在具有开关电容器（C1）的设计中，带宽并且同时DC放大必须大，以便即使在低频下也能确保积分器的功能。 为了满足这两个相互矛盾的大带宽和高直流放大的要求，在包括电阻器（R2）和串联连接的电路部分（R1）的分压器上存在参考电压（V1），如 以及光电二极管（PD）。 分压器的连接点连接到跨导放大器（V）的反相输入端。 在优选实施例中，电路部分（R1）被实现为开关电容器（C1），并且电阻（R2）被实现为MOS晶体管（T1）。 作为集成开关电路，本发明特别适用于Σ-Δ模拟转换器。

公开(公告)号：US06300806B1

公开(公告)日：2001-10-09

申请号：US09448049

申请日：1999-11-23

申请人： Ulrich Theus ,  Reiner Bidenbach

发明人： Ulrich Theus ,  Reiner Bidenbach

IPC分类号： H03K300

CPC分类号： G06G7/28

摘要： A function generator includes a switching stage for forming a defined signal waveform. The switching stage includes switching transistors that are turned on in a predetermined sequence of undelayed and delayed clock signals, with an output node summing the output currents of the switching transistors. The function generator also includes a delay device that generates the undelayed and delayed clock signals from an applied clock signal. The delays of the delayed clock signals define predetermined instants within at least one period of the applied clock signal. The switching edge is divided into different time ranges whose respective edge steepnesses are adjustable independently of each other. By point-mirroring the signal waveform about a medium value of the signal edge, frequencies at twice, four times, six times, etc. the frequency of the fundamental signal frequency are reduced. Due to the sinusoidal shape of the switching edges, electromagnetic emissions are reduced because of the reduced amplitude of the harmonics. The electromagnetic emission reduction applies both to pure clock signals and to other digital signals, including control, data, or supply lines.

摘要翻译： 函数发生器包括用于形成定义的信号波形的切换级。 开关级包括以预定顺序的未延迟和延迟的时钟信号导通的开关晶体管，输出节点对开关晶体管的输出电流求和。 函数发生器还包括延迟器件，其从施加的时钟信号产生未延迟和延迟的时钟信号。 延迟的时钟信号的延迟在施加的时钟信号的至少一个周期内限定预定时刻。 切换边缘被分成不同的时间范围，其各个边缘陡度彼此独立地可调。 通过对信号边缘的中值的信号波形进行点反射，减少了基频信号频率的两倍，四倍，六倍等频率。 由于开关边缘的正弦形状，由于谐波的幅度减小，电磁辐射减少。 电磁辐射减少既适用于纯时钟信号，又适用于其他数字信号，包括控制，数据或电源线。

公开(公告)号：US07761756B2

公开(公告)日：2010-07-20

申请号：US11803853

申请日：2007-05-15

申请人： Reiner Bidenbach ,  Joerg Franke ,  Joachim Ritter ,  Christian Jung

发明人： Reiner Bidenbach ,  Joerg Franke ,  Joachim Ritter ,  Christian Jung

IPC分类号： G01R31/28

CPC分类号： G01R31/31713 ,  G01R31/2844 ,  G01R31/2884

摘要： The invention relates to a circuit configuration with a serial test interface (TIF) to control a test operation mode, a freely programmable digital processor (CPU), a housing (G) for the accommodation of a test interface (TIF) and the processor (CPU) with terminals or connectors (C0, C1) for data and/or signal exchange with external components and setups. At one of the terminals (C1), a modulated supply voltage (VDD) can be received the transfer of data (d) and or a clock (T) by using at least two voltage levels (V2, V3) that can be controlled and which are different from a supply voltage level (V1) that is designed to feed the circuitry with a supply operating voltage. Furthermore, the invention relates to a serial test operation method for such a circuit configuration.

摘要翻译： 本发明涉及具有用于控制测试操作模式的串行测试接口（TIF）的电路配置，可自由编程的数字处理器（CPU），用于容纳测试接口（TIF）和处理器（TIF）的外壳 CPU），带有端子或连接器（C0，C1），用于与外部组件和设置进行数据和/或信号交换。 在其中一个端子（C1）中，可以通过使用至少两个可被控制的电压电平（V2，V3）接收调制电源电压（VDD）数据传输（d）和/或时钟（T）， 其不同于被设计用于将电路馈送到电源工作电压的电源电压电平（V1）。 此外，本发明涉及一种用于这种电路配置的串行测试操作方法。

公开(公告)号：US08125070B2

公开(公告)日：2012-02-28

申请号：US12336862

申请日：2008-12-17

申请人： Stefan Kredler ,  Reiner Bidenbach ,  Jens Schubert ,  Klaus Heberle

发明人： Stefan Kredler ,  Reiner Bidenbach ,  Jens Schubert ,  Klaus Heberle

IPC分类号： H01L23/02

CPC分类号： H01L23/3107 ,  H01L22/34 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/91 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/16145 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/49431 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor component has at least one semiconductor chip in which an electrical circuit is integrated. The semiconductor chip is surrounded by an electrically insulating encapsulating compound and has on its surface at least one termination surface for a test signal, which is covered by the encapsulating compound. The termination surface is connected in an electrically conductive manner to an analysis contact that projects above the surface of the semiconductor chip, that is located in the interior of the encapsulating compound at a distance from its exterior surface, and that can be exposed by removing a layer of the encapsulating compound located near the exterior.

摘要翻译： 半导体部件具有至少一个集成有电路的半导体芯片。 半导体芯片由电绝缘的封装化合物包围，并且在其表面上具有至少一个终端表面用于测试信号，其被封装化合物覆盖。 端接表面以导电的方式连接到分析触点，该分析触点突出在半导体芯片的表面之上，半导体芯片的表面位于封装化合物的内部与其外表面一定距离处，并且可以通过去除 位于外部附近的封装化合物层。

公开(公告)号：US20060284612A1

公开(公告)日：2006-12-21

申请号：US11455912

申请日：2006-06-19

申请人： Reiner Bidenbach ,  Jens Schubert ,  Stefan Kredler ,  Ralf Janke

发明人： Reiner Bidenbach ,  Jens Schubert ,  Stefan Kredler ,  Ralf Janke

IPC分类号： G01R33/07

CPC分类号： G01R31/2829 ,  G01R31/2831

摘要： A method for testing a Hall magnetic field sensor on a wafer includes generating a current flow in a Hall plate of the Hall magnetic field sensor. At least one voltage value across first and second nodes is measured and a measured voltage signal is provided indicative thereof. An electrical resistance based upon the measured voltage and the current is then determined, in the absence of an applied test magnet field.

摘要翻译： 用于在晶片上测试霍尔磁场传感器的方法包括在霍尔磁场传感器的霍尔板中产生电流。 测量第一和第二节点之间的至少一个电压值，并且提供测量的电压信号来指示它们。 然后在没有施加的测试磁体场的情况下，确定基于所测量的电压和电流的电阻。

公开(公告)号：US08378672B2

公开(公告)日：2013-02-19

申请号：US12046833

申请日：2008-03-12

申请人： Reiner Bidenbach ,  Klaus Heberle

发明人： Reiner Bidenbach ,  Klaus Heberle

IPC分类号： G01R33/07

CPC分类号： G01R35/00 ,  G01R31/2829 ,  G01R31/2884 ,  G01R33/07

摘要： A semiconductor component on a semiconductor chip comprises at least one sensor element for measuring a physical quantity and an evaluator. The semiconductor component can be switched between a first and a second operating mode. In the first operating mode, the sensor element is sensitive to the physical quantity to be measured and a measurement signal output of the sensor element is connected to an input connection of the evaluator. In the second operating mode, the sensor element is not sensitive to the physical quantity to be measured and/or the signal path between the measurement signal output and the input connection is interrupted. A test signal source for generating a test signal simulating the measurement signal of the sensor element is arranged on the semiconductor chip. In the second operating mode, the test signal source is connected or capable of being connected to the input connection of the evaluator.

摘要翻译： 半导体芯片上的半导体部件包括至少一个用于测量物理量的传感器元件和评估器。 半导体部件可以在第一和第二操作模式之间切换。 在第一操作模式中，传感器元件对待测量的物理量敏感，并且传感器元件的测量信号输出连接到评估器的输入连接。 在第二操作模式中，传感器元件对待测物理量不敏感，和/或测量信号输出与输入连接之间的信号路径中断。 用于产生模拟传感器元件的测量信号的测试信号的测试信号源被布置在半导体芯片上。 在第二操作模式中，测试信号源被连接或能够连接到评估器的输入连接。

公开(公告)号：US08138750B2

公开(公告)日：2012-03-20

申请号：US12093262

申请日：2006-11-10

申请人： Hans-Jorg Fink ,  Martin Bayer ,  Reiner Bidenbach ,  Yoshiyuki Kono

发明人： Hans-Jorg Fink ,  Martin Bayer ,  Reiner Bidenbach ,  Yoshiyuki Kono

IPC分类号： G01R33/07 ,  G01B7/14

CPC分类号： G01D3/08

摘要： Disclosed is an integrated electronic circuit comprising a core circuit that generates a useful signal as well as a buffer for storing the useful signal. The buffer stores the last read value of the useful signal for a predetermined period of time when the power supply is interrupted, and the buffer is disconnected from the power supply of the other circuits.

摘要翻译： 公开了一种集成电子电路，其包括产生有用信号的核心电路以及用于存储有用信号的缓冲器。 缓冲器在电源中断的预定时间段存储有用信号的最后读取值，并且缓冲器与其他电路的电源断开。

公开(公告)号：US07492178B2

公开(公告)日：2009-02-17

申请号：US11455912

申请日：2006-06-19

申请人： Reiner Bidenbach ,  Jens Schubert ,  Stefan Kredler ,  Ralf Janke

发明人： Reiner Bidenbach ,  Jens Schubert ,  Stefan Kredler ,  Ralf Janke

IPC分类号： G01R31/02

CPC分类号： G01R31/2829 ,  G01R31/2831

摘要： A method for testing a Hall magnetic field sensor on a wafer includes generating a current flow in a Hall plate of the Hall magnetic field sensor. At least one voltage value across first and second nodes is measured and a measured voltage signal is provided indicative thereof. An electrical resistance based upon the measured voltage and the current is then determined, in the absence of an applied test magnet field.

摘要翻译： 用于在晶片上测试霍尔磁场传感器的方法包括在霍尔磁场传感器的霍尔板中产生电流。 测量第一和第二节点之间的至少一个电压值，并且提供测量的电压信号来指示它们。 然后在没有施加的测试磁体场的情况下，确定基于所测量的电压和电流的电阻。

公开(公告)号：US08249095B2

公开(公告)日：2012-08-21

申请号：US12350580

申请日：2009-01-08

申请人： Reiner Bidenbach ,  Martin Bayer ,  Hans-Jörg Fink

发明人： Reiner Bidenbach ,  Martin Bayer ,  Hans-Jörg Fink

IPC分类号： H04L12/403

CPC分类号： H04L7/044 ,  H04J3/0638 ,  H04L12/4035 ,  H04L2012/40267

摘要： Disclosed is a method and device for transmitting data between at least two transmitters and a receiver which are connected to a bus. A synchronization signal is applied to the bus and a number of data volume counters corresponding to the number of transmitters reduced by one is set to a predefined initial value. A first transmitter transmits in the form of data elements a predefined data volume allocated to the transmitter over the bus to the receiver. The data volume values of the other transmitters are selected so that only one transmitter at any given time simultaneously transmits on the bus.

摘要翻译： 公开了一种用于在连接到总线的至少两个发射机和接收机之间传送数据的方法和装置。 同步信号被施加到总线，并且与减少一个的发送器的数量相对应的数量的数据量计数器被设置为预定的初始值。 第一发射机以数据元素的形式将通过总线分配给发射机的预定数据量传输到接收机。 选择其他发射机的数据音量值，使得任何给定时间只有一个发射机同时在总线上发射。