公开(公告)号：US20250140740A1

公开(公告)日：2025-05-01

申请号：US18921312

申请日：2024-10-21

Applicant: Renesas Electronics Corporation

Inventor： Ryusei TAKAISHI ,  Koichi HASEGAWA

IPC: H01L23/00

Abstract: A method of manufacturing a semiconductor device includes, after a wire bonding step, a step of determining a quality as to whether or not a whole of an end portion of a wire is located within a bonding region. A semiconductor chip includes a plurality of position determining opening patterns arranged in a region located around a main opening portion including the bonding region in plan view. The bonding region has a rectangular shape having an area smaller than an opening area of the main opening portion in plan view. The bonding region is defined by the plurality of position determining opening patterns.

公开(公告)号：US20240170375A1

公开(公告)日：2024-05-23

申请号：US17993390

申请日：2022-11-23

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Tatsuaki TSUKUDA ,  Tomohiro NISHIYAMA ,  Toshiyuki HATA ,  Koichi HASEGAWA

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49575 ,  H01L23/3107 ,  H01L23/49562 ,  H01L24/32 ,  H01L24/40 ,  H01L24/48 ,  H01L24/37 ,  H01L24/45 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/37147 ,  H01L2224/40175 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48145 ,  H01L2224/48245 ,  H01L2224/73265

Abstract: The on-resistance of a semiconductor device is reduced. A package structure composing the semiconductor device includes a die pad, a plurality of leads, a first semiconductor chip having a power transistor and mounted on the die pad, and a second semiconductor chip including a control circuit for controlling the power transistor and mounted on the first semiconductor chip. Here, a source pad of the first semiconductor chip is electrically connected to a first lead and a seventh lead of the plurality of leads via a clip made of a material which is copper as a main component, and the width (and cross-sectional area) of the clip is larger than the width (and diameter) of a wire in plan view.

公开(公告)号：US20240243198A1

公开(公告)日：2024-07-18

申请号：US18407125

申请日：2024-01-08

Applicant: Renesas Electronics Corporation

Inventor： Hiroshi YANAGIGAWA ,  Yasutaka NAKASHIBA ,  Kazuhisa MORI ,  Koichi HASEGAWA

IPC: H01L29/78 ,  G01K7/01 ,  H01L23/00 ,  H01L29/06 ,  H01L29/66

CPC classification number: H01L29/7813 ,  G01K7/01 ,  H01L24/45 ,  H01L24/48 ,  H01L29/0696 ,  H01L29/66734 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48464 ,  H01L2224/48472 ,  H01L2924/13091

Abstract: According to this present application, a reliability of a semiconductor device can be improved. The semiconductor device has a first region where a MOSFET is formed, and a second region where a temperature sensor transistor is formed. A body region is formed in a semiconductor substrate of the first region, and a base region is formed in the semiconductor substrate of the second region. A source region is formed in the body region and an emitter region is formed in the base region. A first column region is formed in the semiconductor substrate located below the body region, and a second column region is formed in the semiconductor substrate located below the base region.

公开(公告)号：US20240006275A1

公开(公告)日：2024-01-04

申请号：US18307394

申请日：2023-04-26

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Noriko NUMATA ,  Koichi HASEGAWA ,  Tatsuaki TSUKUDA

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56

CPC classification number: H01L23/49562 ,  H01L23/49513 ,  H01L23/3121 ,  H01L24/40 ,  H01L24/84 ,  H01L24/48 ,  H01L24/45 ,  H01L21/56 ,  H01L2224/40175 ,  H01L2224/32245 ,  H01L24/32 ,  H01L2224/73263 ,  H01L24/73 ,  H01L2224/84897 ,  H01L2224/48175 ,  H01L2224/45147 ,  H01L2224/73221

Abstract: A source pad electrically coupled with a source of a MOSFET of a semiconductor chip and located at a position below a lead in cross-sectional view is electrically connected with the lead for source via a conductive member bonded to the source pad and a wire bonded to the conductive member.