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公开(公告)号：US09343451B2
公开(公告)日：2016-05-17
申请号：US14685145
申请日：2015-04-13
Applicant: Renesas Electronics Corporation
Inventor： Katsuhiko Funatsu , Tomoaki Uno , Toru Ueguri , Yukihiro Sato
IPC: H01L25/00 , H01L21/56 , H01L23/00 , H01L23/31 , H01L23/495 , H01L21/683 , H01L21/78 , H01L25/18 , H01L21/48
CPC classification number: H01L25/50 , H01L21/4835 , H01L21/4839 , H01L21/56 , H01L21/561 , H01L21/6836 , H01L21/78 , H01L23/3107 , H01L23/495 , H01L23/49503 , H01L23/49537 , H01L23/49541 , H01L23/49548 , H01L23/49562 , H01L23/49575 , H01L24/34 , H01L24/36 , H01L24/37 , H01L24/40 , H01L24/83 , H01L24/97 , H01L25/18 , H01L2221/68327 , H01L2221/68331 , H01L2224/05554 , H01L2224/0603 , H01L2224/29139 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/49171 , H01L2224/49175 , H01L2224/73221 , H01L2224/73265 , H01L2224/83801 , H01L2224/8385 , H01L2224/83851 , H01L2224/84801 , H01L2224/92247 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/30107 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
Abstract: To improve the reliability in applying a tape to the rear surface of a substrate while securing the heat resistance of the tape applied to the rear surface of the substrate. There is a gap between a bottom surface of a ditch provided in a support member and an upper surface of a driver IC chip. On the other hand, the upper surface side of a lead frame is supported by the support member so that the bottom surface of the ditch contacts the upper surface of a Low-MOS clip mounted over a Low-MOS chip. Thus, even in a state where the driver IC chip and the Low-MOS chip are mounted on the upper surface side of the lead frame, the tape can be reliably applied to the rear surface of the lead frame (in particular, to the rear surface of the product region).
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公开(公告)号：US20150214209A1
公开(公告)日：2015-07-30
申请号：US14685145
申请日：2015-04-13
Applicant: Renesas Electronics Corporation
Inventor： Katsuhiko Funatsu , Tomoaki Uno , Toru Ueguri , Yukihiro Sato
IPC: H01L25/00 , H01L21/78 , H01L21/48 , H01L21/56 , H01L23/495 , H01L21/683 , H01L25/18 , H01L23/00
CPC classification number: H01L25/50 , H01L21/4835 , H01L21/4839 , H01L21/56 , H01L21/561 , H01L21/6836 , H01L21/78 , H01L23/3107 , H01L23/495 , H01L23/49503 , H01L23/49537 , H01L23/49541 , H01L23/49548 , H01L23/49562 , H01L23/49575 , H01L24/34 , H01L24/36 , H01L24/37 , H01L24/40 , H01L24/83 , H01L24/97 , H01L25/18 , H01L2221/68327 , H01L2221/68331 , H01L2224/05554 , H01L2224/0603 , H01L2224/29139 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/49171 , H01L2224/49175 , H01L2224/73221 , H01L2224/73265 , H01L2224/83801 , H01L2224/8385 , H01L2224/83851 , H01L2224/84801 , H01L2224/92247 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/30107 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
Abstract: To improve the reliability in applying a tape to the rear surface of a substrate while securing the heat resistance of the tape applied to the rear surface of the substrate. There is a gap between a bottom surface of a ditch provided in a support member and an upper surface of a driver IC chip. On the other hand, the upper surface side of a lead frame is supported by the support member so that the bottom surface of the ditch contacts the upper surface of a Low-MOS clip mounted over a Low-MOS chip. Thus, even in a state where the driver IC chip and the Low-MOS chip are mounted on the upper surface side of the lead frame, the tape can be reliably applied to the rear surface of the lead frame (in particular, to the rear surface of the product region).
Abstract translation: 为了提高将带施加到基板的后表面上的带的可靠性，同时确保施加到基板的后表面的带的耐热性。 在支撑构件中设置的沟槽的底表面和驱动器IC芯片的上表面之间存在间隙。 另一方面，引线框架的上表面侧由支撑构件支撑，使得沟槽的底表面接触安装在低MOS芯片上的低MOS片的上表面。 因此，即使在驱动IC芯片和Low-MOS芯片安装在引线框架的上表面侧的状态下，也可以将带子可靠地施加到引线框架（特别是后端）的后表面 产品区域的表面）。
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公开(公告)号：US09029197B2
公开(公告)日：2015-05-12
申请号：US14037360
申请日：2013-09-25
Applicant: Renesas Electronics Corporation
Inventor： Katsuhiko Funatsu , Tomoaki Uno , Toru Ueguri , Yukihiro Sato
CPC classification number: H01L25/50 , H01L21/4835 , H01L21/4839 , H01L21/56 , H01L21/561 , H01L21/6836 , H01L21/78 , H01L23/3107 , H01L23/495 , H01L23/49503 , H01L23/49537 , H01L23/49541 , H01L23/49548 , H01L23/49562 , H01L23/49575 , H01L24/34 , H01L24/36 , H01L24/37 , H01L24/40 , H01L24/83 , H01L24/97 , H01L25/18 , H01L2221/68327 , H01L2221/68331 , H01L2224/05554 , H01L2224/0603 , H01L2224/29139 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/49171 , H01L2224/49175 , H01L2224/73221 , H01L2224/73265 , H01L2224/83801 , H01L2224/8385 , H01L2224/83851 , H01L2224/84801 , H01L2224/92247 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/30107 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
Abstract: To improve the reliability in applying a tape to the rear surface of a substrate while securing the heat resistance of the tape applied to the rear surface of the substrate. There is a gap between a bottom surface of a ditch provided in a support member and an upper surface of a driver IC chip. On the other hand, the upper surface side of a lead frame is supported by the support member so that the bottom surface of the ditch contacts the upper surface of a Low-MOS clip mounted over a Low-MOS chip. Thus, even in a state where the driver IC chip and the Low-MOS chip are mounted on the upper surface side of the lead frame, the tape can be reliably applied to the rear surface of the lead frame (in particular, to the rear surface of the product region).
Abstract translation: 为了提高将带施加到基板的后表面上的带的可靠性，同时确保施加到基板的后表面的带的耐热性。 在支撑构件中设置的沟槽的底表面和驱动器IC芯片的上表面之间存在间隙。 另一方面，引线框架的上表面侧由支撑构件支撑，使得沟槽的底表面接触安装在低MOS芯片上的低MOS片的上表面。 因此，即使在驱动IC芯片和Low-MOS芯片安装在引线框架的上表面侧的状态下，也可以将带子可靠地施加到引线框架的后表面（特别是后端） 产品区域的表面）。
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Patent Agency Ranking
公开(公告)号：US09704844B2
公开(公告)日：2017-07-11
申请号：US15133032
申请日：2016-04-19
Applicant: Renesas Electronics Corporation
Inventor： Katsuhiko Funatsu , Tomoaki Uno , Toru Ueguri , Yukihiro Sato
IPC: H01L23/495 , H01L25/00 , H01L21/56 , H01L21/48 , H01L23/00 , H01L23/31 , H01L21/683 , H01L21/78 , H01L25/18
CPC classification number: H01L25/50 , H01L21/4835 , H01L21/4839 , H01L21/56 , H01L21/561 , H01L21/6836 , H01L21/78 , H01L23/3107 , H01L23/495 , H01L23/49503 , H01L23/49537 , H01L23/49541 , H01L23/49548 , H01L23/49562 , H01L23/49575 , H01L24/34 , H01L24/36 , H01L24/37 , H01L24/40 , H01L24/83 , H01L24/97 , H01L25/18 , H01L2221/68327 , H01L2221/68331 , H01L2224/05554 , H01L2224/0603 , H01L2224/29139 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/49171 , H01L2224/49175 , H01L2224/73221 , H01L2224/73265 , H01L2224/83801 , H01L2224/8385 , H01L2224/83851 , H01L2224/84801 , H01L2224/92247 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/30107 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
Abstract: To improve the reliability in applying a tape to the rear surface of a substrate while securing the heat resistance of the tape applied to the rear surface of the substrate. There is a gap between a bottom surface of a ditch provided in a support member and an upper surface of a driver IC chip. On the other hand, the upper surface side of a lead frame is supported by the support member so that the bottom surface of the ditch contacts the upper surface of a Low-MOS clip mounted over a Low-MOS chip. Thus, even in a state where the driver IC chip and the Low-MOS chip are mounted on the upper surface side of the lead frame, the tape can be reliably applied to the rear surface of the lead frame (in particular, to the rear surface of the product region).
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公开(公告)号：US09029995B2
公开(公告)日：2015-05-12
申请号：US14037489
申请日：2013-09-26
Applicant: Renesas Electronics Corporation
Inventor： Katsuhiko Funatsu , Tomoaki Uno , Toru Ueguri , Yasushi Takahashi
IPC: H01L23/48 , H01L23/495 , H01L21/56 , H01L23/00 , H01L23/31
CPC classification number: H01L23/49513 , H01L21/56 , H01L21/565 , H01L23/3107 , H01L23/3142 , H01L23/4924 , H01L23/495 , H01L23/49524 , H01L23/49562 , H01L23/49575 , H01L24/34 , H01L24/37 , H01L24/38 , H01L24/40 , H01L24/97 , H01L2224/05554 , H01L2224/32245 , H01L2224/371 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/49171 , H01L2224/73221 , H01L2224/73265 , H01L2224/83801 , H01L2224/84801 , H01L2224/97 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
Abstract: To enhance the reliability of connection between a semiconductor chip and a metal plate by ensuring sufficiently the thickness of a conductive material interposed between the semiconductor chip and the metal plate. A lead frame is arranged over a jig and a clip frame is arranged over protruding portions provided on the jig. In this state, a heating process (reflow) is performed. In this case, high melting point solders filling first spaces are melted in a state in which the first space is formed between a High-MOS chip and a High-MOS clip and the first space is formed between a Low-MOS chip and a Low-MOS clip. At this time, even when the high melting point solder is melted in the first space, the size (in particular, the height) of the first space does not change and the first space is maintained.
Abstract translation: 通过确保插入在半导体芯片和金属板之间的导电材料的厚度充分地提高半导体芯片和金属板之间的连接的可靠性。 引线框架布置在夹具上方，并且夹具框架布置在设置在夹具上的突出部分上。 在该状态下，进行加热处理（回流）。 在这种情况下，填充第一空间的高熔点焊料在高MOS芯片和高MOS夹之间形成第一空间的状态下熔化，并且第一空间形成在低MOS芯片与低电压 -MOS剪辑。 此时，即使高熔点焊料在第一空间中熔化，第一空间的尺寸（特别是高度）也不变，保持第一空间。
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公开(公告)号：US20150228559A1
公开(公告)日：2015-08-13
申请号：US14696448
申请日：2015-04-26
Applicant: Renesas Electronics Corporation
Inventor： Katsuhiko Funatsu , Tomoaki Uno , Toru Ueguri , Yasushi Takahashi
IPC: H01L23/495 , H01L23/31 , H01L23/492
CPC classification number: H01L23/49513 , H01L21/56 , H01L21/565 , H01L23/3107 , H01L23/3142 , H01L23/4924 , H01L23/495 , H01L23/49524 , H01L23/49562 , H01L23/49575 , H01L24/34 , H01L24/37 , H01L24/38 , H01L24/40 , H01L24/97 , H01L2224/05554 , H01L2224/32245 , H01L2224/371 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/49171 , H01L2224/73221 , H01L2224/73265 , H01L2224/83801 , H01L2224/84801 , H01L2224/97 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
Abstract: To enhance the reliability of connection between a semiconductor chip and a metal plate by ensuring sufficiently the thickness of a conductive material interposed between the semiconductor chip and the metal plate. A lead frame is arranged over a jig and a clip frame is arranged over protruding portions provided on the jig. In this state, a heating process (reflow) is performed. In this case, high melting point solders filling first spaces are melted in a state in which the first space is formed between a High-MOS chip and a High-MOS clip and the first space is formed between a Low-MOS chip and a Low-MOS clip. At this time, even when the high melting point solder is melted in the first space, the size (in particular, the height) of the first space does not change and the first space is maintained.
Abstract translation: 通过确保插入在半导体芯片和金属板之间的导电材料的厚度充分地提高半导体芯片和金属板之间的连接的可靠性。 引线框架布置在夹具上方，并且夹具框架布置在设置在夹具上的突出部分上。 在该状态下，进行加热处理（回流）。 在这种情况下，填充第一空间的高熔点焊料在高MOS芯片和高MOS夹之间形成第一空间的状态下熔化，并且第一空间形成在低MOS芯片与低电压 -MOS剪辑。 此时，即使高熔点焊料在第一空间中熔化，第一空间的尺寸（特别是高度）也不变，保持第一空间。
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公开(公告)号：US20140087520A1
公开(公告)日：2014-03-27
申请号：US14037360
申请日：2013-09-25
Applicant: Renesas Electronics Corporation
Inventor： Katsuhiko Funatsu , Tomoaki Uno , Toru Ueguri , Yukihiro Sato
IPC: H01L21/56
CPC classification number: H01L25/50 , H01L21/4835 , H01L21/4839 , H01L21/56 , H01L21/561 , H01L21/6836 , H01L21/78 , H01L23/3107 , H01L23/495 , H01L23/49503 , H01L23/49537 , H01L23/49541 , H01L23/49548 , H01L23/49562 , H01L23/49575 , H01L24/34 , H01L24/36 , H01L24/37 , H01L24/40 , H01L24/83 , H01L24/97 , H01L25/18 , H01L2221/68327 , H01L2221/68331 , H01L2224/05554 , H01L2224/0603 , H01L2224/29139 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/49171 , H01L2224/49175 , H01L2224/73221 , H01L2224/73265 , H01L2224/83801 , H01L2224/8385 , H01L2224/83851 , H01L2224/84801 , H01L2224/92247 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/30107 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
Abstract: To improve the reliability in applying a tape to the rear surface of a substrate while securing the heat resistance of the tape applied to the rear surface of the substrate. There is a gap between a bottom surface of a ditch provided in a support member and an upper surface of a driver IC chip. On the other hand, the upper surface side of a lead frame is supported by the support member so that the bottom surface of the ditch contacts the upper surface of a Low-MOS clip mounted over a Low-MOS chip. Thus, even in a state where the driver IC chip and the Low-MOS chip are mounted on the upper surface side of the lead frame, the tape can be reliably applied to the rear surface of the lead frame (in particular, to the rear surface of the product region).
Abstract translation: 为了提高将带施加到基板的后表面上的带的可靠性，同时确保施加到基板的后表面的带的耐热性。 在支撑构件中设置的沟槽的底表面和驱动器IC芯片的上表面之间存在间隙。 另一方面，引线框架的上表面侧由支撑构件支撑，使得沟槽的底表面接触安装在低MOS芯片上的低MOS片的上表面。 因此，即使在驱动IC芯片和Low-MOS芯片安装在引线框架的上表面侧的状态下，也可以将带子可靠地施加到引线框架的后表面（特别是后端） 产品区域的表面）。
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公开(公告)号：US20140084436A1
公开(公告)日：2014-03-27
申请号：US14037489
申请日：2013-09-26
Applicant: Renesas Electronics Corporation
Inventor： Katsuhiko Funatsu , Tomoaki Uno , Toru Ueguri , Yasushi Takahashi
IPC: H01L23/495 , H01L21/56
CPC classification number: H01L23/49513 , H01L21/56 , H01L21/565 , H01L23/3107 , H01L23/3142 , H01L23/4924 , H01L23/495 , H01L23/49524 , H01L23/49562 , H01L23/49575 , H01L24/34 , H01L24/37 , H01L24/38 , H01L24/40 , H01L24/97 , H01L2224/05554 , H01L2224/32245 , H01L2224/371 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/49171 , H01L2224/73221 , H01L2224/73265 , H01L2224/83801 , H01L2224/84801 , H01L2224/97 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
Abstract: To enhance the reliability of connection between a semiconductor chip and a metal plate by ensuring sufficiently the thickness of a conductive material interposed between the semiconductor chip and the metal plate. A lead frame is arranged over a jig and a clip frame is arranged over protruding portions provided on the jig. In this state, a heating process (reflow) is performed. In this case, high melting point solders filling first spaces are melted in a state in which the first space is formed between a High-MOS chip and a High-MOS clip and the first space is formed between a Low-MOS chip and a Low-MOS clip. At this time, even when the high melting point solder is melted in the first space, the size (in particular, the height) of the first space does not change and the first space is maintained.
Abstract translation: 通过确保插入在半导体芯片和金属板之间的导电材料的厚度充分地提高半导体芯片和金属板之间的连接的可靠性。 引线框架布置在夹具上方，并且夹具框架布置在设置在夹具上的突出部分上。 在该状态下，进行加热处理（回流）。 在这种情况下，填充第一空间的高熔点焊料在高MOS芯片和高MOS夹之间形成第一空间的状态下熔化，并且第一空间形成在低MOS芯片与低电压 -MOS剪辑。 此时，即使高熔点焊料在第一空间中熔化，第一空间的尺寸（特别是高度）也不变，保持第一空间。
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