-
公开(公告)号：US07229484B2
公开(公告)日：2007-06-12
申请号：US10307274
申请日：2002-11-27
CPC分类号： C09K3/14 , B24B37/044 , C09K3/1436 , C09K3/1463
摘要： The present invention relates to the manufacture and use of novel pre-coated abrasive particles and particle slurries for the chemical mechanical polishing (CMP) of semiconductor wafers, thin films, inter-layer dielectric, metals, and other components during integrated circuit, flat panel display, or MEMS manufacturing. For example, polishing slurry abrasive particles can be pre-coated with additives, such as, inhibitors and/or surfactants during manufacture of the abrasive particles or slurry. The additive's opportunity to react directly with the abrasive particles early in the particle manufacturing process provides a slurry having a more stable, selectable, and predictable ratio of abrasive particles pre-coated with a more stable, selectable, and predictable amount and type of additives.
摘要翻译： 本发明涉及在集成电路，平板中的半导体晶片，薄膜，层间电介质，金属和其它部件的化学机械抛光（CMP）的新型预涂磨料颗粒和颗粒浆料的制造和使用 显示器件或MEMS制造。 例如，抛光浆料磨料颗粒可以在制造磨料颗粒或浆料期间用添加剂例如抑制剂和/或表面活性剂预涂覆。 添加剂在颗粒制造过程早期与磨料颗粒直接反应的机会提供了具有更稳定，可选择和可预测的磨料颗粒比例的浆料，该磨料颗粒预涂有更稳定，可选择和可预测的量和类型的添加剂。
-
公开(公告)号：US06976907B2
公开(公告)日：2005-12-20
申请号：US10738549
申请日：2003-12-17
IPC分类号： B24B53/007 , B24B53/017 , B24B53/12 , B24B1/00
CPC分类号： B24B53/017 , B24B53/12
摘要： An apparatus for conditioning a polishing pad of a CMP apparatus for making semiconductor wafers is provided which includes a control arm configured to extend at least partially over a polishing pad. The apparatus also includes at least one cylindrical conditioning piece coupled to the control arm where the control arm is configured to apply the at least one cylindrical conditioning piece to the polishing pad.
摘要翻译： 提供了一种用于调节用于制造半导体晶片的CMP设备的抛光垫的设备，其包括被配置为至少部分地延伸到抛光垫上的控制臂。 该装置还包括耦合到控制臂的至少一个圆柱形调节件，其中控制臂构造成将至少一个圆柱形调节件施加到抛光垫。
-
公开(公告)号：US07084053B2
公开(公告)日：2006-08-01
申请号：US10676294
申请日：2003-09-30
IPC分类号： H01L21/44
CPC分类号： H01L21/76843 , H01L21/76849 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A method of forming and a device including an interconnect structure having a unidirectional electrical conductive material is described. The unidirectional conductive material may overlie interconnect materials, and/or may surround interconnect materials, such as by lining the walls and base of a trench and via. The unidirectional conductive material may be configured to conduct electricity in a direction corresponding to a projection to or from a contact point and conductive material overlying the unidirectional conductive material, but have no substantial electrical conductivity in other directions. Moreover, the unidirectional conductive material may be electrically conductive in a direction normal to a surface over which it is formed or in directions along or across a plane, but have no substantial electrical conductivity in other directions. Finally, the unidirectional conductive material may have properties tending to reduce metal diffusion, reduce electron migration, provide adhesion or bonding, and/or act as an etch stop.
-
公开(公告)号：US07405419B2
公开(公告)日：2008-07-29
申请号：US11321127
申请日：2005-12-28
CPC分类号： H01L21/76843 , H01L21/76849 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A method of forming and a device including an interconnect structure having a unidirectional electrical conductive material is described. The unidirectional conductive material may overlie interconnect materials, and/or may surround interconnect materials, such as by lining the walls and base of a trench and via. The unidirectional conductive material may be configured to conduct electricity in a direction corresponding to a projection to or from a contact point and conductive material overlying the unidirectional conductive material, but have no substantial electrical conductivity in other directions. Moreover, the unidirectional conductive material may be electrically conductive in a direction normal to a surface over which it is formed or in directions along or across a plane, but have no substantial electrical conductivity in other directions. Finally, the unidirectional conductive material may have properties tending to reduce metal diffusion, reduce electron migration, provide adhesion or bonding, and/or act as an etch stop.
摘要翻译： 描述了一种形成方法和包括具有单向导电材料的互连结构的器件。 单向导电材料可以覆盖互连材料，和/或可以围绕互连材料，例如通过衬套沟槽和通孔的壁和底座。 单向导电材料可以被配置为在对应于与接触点的突出物相对应的方向上导电，并且覆盖在单向导电材料上方的导电材料，但是在其它方向上没有实质的导电性。 此外，单向导电材料可以在垂直于其形成的表面的方向或沿着或跨平面的方向上导电，但在其它方向上不具有实质的导电性。 最后，单向导电材料可能具有倾向于减少金属扩散，减少电子迁移，提供粘附或粘结和/或用作蚀刻停止的性质。
-
公开(公告)号：US06875086B2
公开(公告)日：2005-04-05
申请号：US10340876
申请日：2003-01-10
IPC分类号： B24B53/007 , B24B53/017 , B24B53/12 , B24B1/00
CPC分类号： B24B53/017 , B24B53/12
摘要： Embodiments of methods and apparatus in accordance with the present invention provide a chemical mechanical planarization (CMP) process that provides single or multiple polishing pads to have a different rotational velocity, applied pressure and oscillation frequency on the surface of the substrate to address and compensate for the WIW (with-in-substrate) and WID (with-in-die) non-uniformities in planarization ability. The velocity of each polishing pad is adjustable providing a closer match to the substrate surface velocity over a particular zone to yield a linear velocity on the surface of the substrate.
摘要翻译： 根据本发明的方法和设备的实施例提供了一种化学机械平面化（CMP）工艺，其提供单个或多个抛光垫，以在衬底的表面上具有不同的旋转速度，施加的压力和振荡频率，以解决和补偿 WED（带衬底）和WID（带模）在平坦化能力方面的不均匀性。 每个抛光垫的速度是可调整的，以提供与特定区域上的衬底表面速度更接近的匹配，以在衬底的表面上产生线速度。
-
公开(公告)号：US07470450B2
公开(公告)日：2008-12-30
申请号：US10764193
申请日：2004-01-23
IPC分类号： C23C16/00
CPC分类号： C07F7/025 , C23C16/345 , H01L21/0217 , H01L21/02219 , H01L21/02222 , H01L21/02271 , H01L21/02274
摘要： A silicon nitride film may be deposited on a work piece using conventional deposition techniques and a selected source for use as a silicon precursor. A nitrogen precursor may also be selected for film deposition. Using the selected precursor(s), the temperature for deposition may be 500° C., or less.
摘要翻译： 氮化硅膜可以使用常规沉积技术和所选择的源用作硅前体而沉积在工件上。 也可以选择氮前体用于膜沉积。 使用所选择的前体，沉积温度可以为500℃以下。
-
公开(公告)号：US07125321B2
公开(公告)日：2006-10-24
申请号：US11014889
申请日：2004-12-17
IPC分类号： B24B1/00
CPC分类号： H01L21/31053 , B24B27/0076 , B24B37/042
摘要： A multi-platen, multi-slurry chemical mechanical polishing method comprises providing a substrate having a surface that includes at least one nitride structure and an oxide layer atop the nitride structure, performing a first CMP process on the substrate using a first platen with a silica based slurry to remove a bulk portion of the oxide layer without exposing the nitride structure, performing a second CMP process on the substrate using a second platen with a ceria based slurry to remove a residual portion of the oxide layer and to expose at least a portion of the nitride structure, and performing a third CMP process on the substrate using the first platen with a silica based slurry to remove at least one defect caused by the ceria based slurry.
摘要翻译： 多压板多浆化学机械抛光方法包括提供具有包括至少一个氮化物结构和氮化物结构顶部的氧化物层的表面的衬底，使用具有二氧化硅的第一压板在衬底上进行第一CMP工艺 在不暴露氮化物结构的情况下去除氧化物层的主体部分，使用具有二氧化铈基浆料的第二压板在衬底上执行第二CMP工艺以除去氧化物层的残余部分并暴露至少一部分 的氮化物结构，并且使用具有二氧化硅基浆料的第一压板在衬底上进行第三CMP处理以除去由二氧化铈基浆料引起的至少一个缺陷。
-
公开(公告)号：US06365521B1
公开(公告)日：2002-04-02
申请号：US09001265
申请日：1997-12-31
申请人： Jan V. Shubert , Glen Wada , Mansour Moinpour , Yang-Chin Shih , Ken Schatz
发明人： Jan V. Shubert , Glen Wada , Mansour Moinpour , Yang-Chin Shih , Ken Schatz
IPC分类号： H01L21302
CPC分类号： H01L23/3192 , H01L23/3171 , H01L2924/0002 , H01L2924/00
摘要： A method of passivating an integrated circuit comprising providing an integrated circuit having a top side including a bond pad, depositing a first dielectric over said top side of said integrated circuit, exposing a first area portion of a top side of said bond pad, depositing a second dielectric of one of a material that is substantially impermeable to moisture over said top side of said integrated circuit, and exposing a second area portion of said top side of said bond pad, said second area portion within said first area portion is disclosed.
摘要翻译： 一种钝化集成电路的方法，包括提供具有包括接合焊盘的顶侧的集成电路，在所述集成电路的所述顶侧上沉积第一电介质，暴露所述接合焊盘的顶侧的第一区域部分， 在所述集成电路的所述顶侧基本上不透水的材料之一的第二电介质，以及暴露所述接合焊盘的所述顶侧的第二区域部分，所述第二区域部分在所述第一区域部分内。
-
公开(公告)号：US20090253270A1
公开(公告)日：2009-10-08
申请号：US12061584
申请日：2008-04-02
IPC分类号： H01L21/316 , C23C18/44
CPC分类号： H01L21/316 , C23C18/1216 , C23C18/1225 , C23C18/1245
摘要： A method for depositing a high-k dielectric material on a semiconductor substrate is disclosed. The method includes applying a chemical bath to a surface of a substrate, rinsing the surface, applying a co-reactant bath to the surface of the substrate, and rinsing the surface. The chemical bath includes a metal precursor which includes at least a hafnium compound, an aluminium compound, a titanium compound, zirconium compound, a scandium compound, a yttrium compound or a lanthanide compound.
摘要翻译： 公开了一种在半导体衬底上沉积高k电介质材料的方法。 该方法包括将化学浴施加到基底表面上，冲洗表面，向基底表面施加共反应物浴，并漂洗该表面。 化学浴包括至少包含铪化合物，铝化合物，钛化合物，锆化合物，钪化合物，钇化合物或镧系元素化合物的金属前体。
-
公开(公告)号：US20060151003A1
公开(公告)日：2006-07-13
申请号：US11032858
申请日：2005-01-10
IPC分类号： C23G1/00 , B08B7/00 , B05D3/02 , B05D5/00 , H01L21/304
CPC分类号： H01L21/67046 , B08B1/04 , B08B3/04
摘要： In a formulation of a wafer cleaning brush, forming a polymer solution with a plurality of nano-scale porogens or with a synthetic pore forming agent and curing the polymer solution to form a porous polymeric material.
摘要翻译： 在晶片清洁刷的配方中，用多个纳米级致孔剂或合成成孔剂形成聚合物溶液并固化聚合物溶液以形成多孔聚合材料。
-
-
-
-
-
-
-
-
-
搜索结果
30 条记录 (耗时 0.016 秒)
